* Track which process (XXX really, vmspace) owns the mapping. When
we sync the map, if the mapping doesn't belong to the kernel or to
the current process (XXX really, vmspace), then no cache fobbing
is necessary, since the cache is Wb-Inv'd on context switch (XXX need
to revisit this when we support FCSE).
* Be smarter about which cache operation we do when sync'ing the map:
- PREREAD -- Invalidate D$ (XXX right now, we actually do Wb-Inv)
- PREWRITE -- Write-back D$ (note, we do NOT invalidate here)
- PREREAD|PREWRITE -- Wb-Inv D$
More work is needed here. In particular, a version for CPUs
with write-through caches should be provided, to eliminate
the write-back steps (which are noops on such CPUs, but skipping
two branches would be nice).
Thorpe as an extension to the bus_space(9) API.
Only the mainbus has a working mmap... iomd, podulebus and isa dont have
one yet. Its trivial to add the iomd and isa's memory part but am a bit
hessistant to add it without knowing its implications by heart.
Podulebus might be implemented in 32 bits EASI but otherwise its not really
transparent since there is AFAIK no function to explicitly read one byte or
so .. or is this implemented in a higher level ?
ARM26 and arch/arm32/dnard (Shark) kernels compile and RiscPC and Shark
kernels are tested and function OK.
Implications of other ARM systems like hpcarm and ebarm are propably
minimal or solved trivially.