Commit Graph

21772 Commits

Author SHA1 Message Date
simonb 9308187dbf Remove redundant decl of consinit() - it's in <sys/systm.h>.
Remove duplicate definition of delay() - we only need one in this file.
2000-03-29 03:54:03 +00:00
simonb 0edd529101 Extern declaration of cputype. 2000-03-29 03:50:40 +00:00
simonb 5b911637a1 Remove redundant decl for phys_map - it's in <vm/vm_kern.h>. 2000-03-29 03:49:48 +00:00
simonb 868578431b Remove redundant decl for physmem - it's in <sys/systm.h>. 2000-03-29 03:49:02 +00:00
simonb e764ed49e6 Remove redundant decl of msgbufmapped - it's in <sys/msgbuf.h>. 2000-03-29 03:48:20 +00:00
simonb 9ff7681a33 Don't need to include <sys/conf.h> here. 2000-03-29 03:43:31 +00:00
enami 4feca5e9ea Remove unnecessary cast in previous. Pointed out by shin@netbsd.org. 2000-03-29 03:09:15 +00:00
simonb d7a08fd8c5 Don't declare a variable in the 'struct platform' declaration - we declare
an extern for 'struct platform platform' further down this file anyway,
and this would have declared a 'platform' variable in any userland code
including this file.
2000-03-29 02:59:18 +00:00
simonb 2f1fef39b3 Centralise the declarations of cpu_model, machine, machine_arch,
osrelease, and ostype and remove "extern char foo[];" (for hostname
and domainname too).

Also delete redunctant decl of boottime in kern_info_43.c.
2000-03-28 23:57:24 +00:00
is 91d927ae42 synchronize to GENERIC 2000-03-28 20:17:14 +00:00
thorpej 6b45fb25a9 The assembler understands rdmsr, wrmsr, rdtsc, and rdpmc, so there's
no need to use .byte.
2000-03-28 19:17:29 +00:00
thorpej fd21635b22 Extern cpu_id and cpu_vendor[] here. 2000-03-28 19:16:05 +00:00
thorpej a142c171d0 Add: cmpxchg8b, wrmsr, rdtsc, rdmsr, rdpmc, rsm. From FreeBSD. 2000-03-28 19:15:40 +00:00
nisimura 1b0c1f4d0d Abandon the initial microscale optimization of pmap_alloc_asid(),
leaving the second change intact.  It'd be rather less costly to
extend the case analysis.
2000-03-28 05:58:33 +00:00
simonb 6060929e8e Move fpcurproc declaration to <mips/cpu.h>. 2000-03-28 03:11:26 +00:00
simonb ef89d70178 Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
2000-03-28 02:58:44 +00:00
simonb ea6aa0dc3c Use the recent alpha solution to getting the printf() format right in
mips_init_msgbuf().
2000-03-28 02:53:18 +00:00
thorpej 0c4b7c7531 Add functions to read the TSC and Performance Counters. 2000-03-28 01:38:22 +00:00
simonb 338105f94b Make declaration of curpcb variable extern. 2000-03-28 01:06:04 +00:00
simonb a833cd73e8 Remove duplicate declaration of pmap_is_page_ro() (in <mips/pte.h> and
pmap_zero_page() (in <vm/pmap.h>).
2000-03-28 01:04:22 +00:00
nisimura 464669d1ef The previous microscale optimazation in pmap_asid_alloc() was
half-baked and resulted in one superfluous ASID bump if new pmaps
are created when pmap_asid_generation > 0.   Need to initialize pmap
fields correctly.

Yet, this possibly might not be the perfect solution.  If one
process bumped pmap_asid_generation _after_ a new pmap was created
and initialized with then-current pmap_asid_generation value.  In
that case, the new pmap would have another (superfluous) ASID bump
when 2nd (not 1st) CPU tick is assigned.  I'm not sure if this case
would happen.

Have pmap_max_asid variable to hold the maximum number of ASID
(TLBpid) supported by processor anticipating the possible runtime
cost of ((CPUISMIPS3)? MIPS3_TLB_NUM_ASIDS : MIPS1_TLB_NUM_PIDS).
2000-03-28 01:00:00 +00:00
simonb 8ae7eeef11 Remove redundant declarations of mips3_cycle_count(), stacktrace(),
logstacktrace(), mips_idle() and cpu_switch() - these are already
declared in various header files.
2000-03-28 00:55:33 +00:00
simonb d0e1814cba Remove duplication declarations of Sysmap and Sysmapsize - these are
in <mips/pte.h>
2000-03-28 00:52:57 +00:00
nisimura 73fa1ce87f Change 'goto cpu_switch1' to 'goto cpu_switch_queuescan' in vr_idle.S
and make the jump destination global.
2000-03-28 00:24:04 +00:00
thorpej f4f96605b9 Add/correct some MSRs, from Intel Architecture Software Developer's Manual,
Volume 3 (System Programming).
2000-03-27 23:15:57 +00:00
scottr 10c763efa3 The declaration for esp has moved to conf/files. (Hi Charles!) 2000-03-27 21:47:46 +00:00
nonaka c1a7a27642 rewrite some bus_space functions like port-i386. 2000-03-27 16:45:41 +00:00
msaitoh 35ba37f2f7 fix the sci[f]cninit() bugs to work both SCI and SCIF at the same time. 2000-03-27 16:24:08 +00:00
minoura 87bc025f49 Move par under intio. 2000-03-27 15:53:04 +00:00
minoura f23d278c1d Make this compile (typo in callout change). 2000-03-27 15:49:34 +00:00
leo d4ff1a5f4e This file was forgotten in the commit with log message:
Move the ite_default_* variables to ite.c. They are generic ite.
2000-03-27 14:08:39 +00:00
soda ccc163be60 -Wmissing-prototypes cleanup 2000-03-27 11:29:32 +00:00
soda 4531dedece fix typo in timeout -> callout transition. 2000-03-27 11:22:51 +00:00
nisimura fa6012454d It's not necessary to (re-) assign pmap->pm_asidgen whenever ASID
(TLBpid) is bumped.  It's ok just in the case when pmap_asid_generation
is bumped.
2000-03-27 08:56:21 +00:00
enami b31c6d62e2 Fix previous in a different way. 2000-03-27 06:41:02 +00:00
nisimura 06b4feb7d6 Have TBIA/TBIAP an argument refering to a global variable instead
of a compile time constant.
2000-03-27 05:30:40 +00:00
nisimura 5987070300 - Rename some of TLB ops to have handy abbrivations hired from VAX and
ALPHA; mips1_TBIA, mips1_TBIAP, mips1_TBIS.
- Make sure TBIA and TBIAP ops to have an argument for the size of TLB
  which varies across even for MIPS1 implementations.
- Nuke the unused cpu_isa field from processor personality list.

- XXX XXX XXX
  it's less-than-optimal and likely a mistake to have TLBUpdate().
  It's costy to try to invalidate a single TLB entry whenver a certain
  PTE is going to be modified by traversing the entire TLB looking
  for the modified PTE because the PTE in question is not in TLB in
  most cases.  ASID bump could do the invalidation smartly.  Solution
  is planned for now.
2000-03-27 05:23:42 +00:00
nisimura cbab853044 Rename sw1 label found in cpu_switch() to cpu_switch_queuescan,
abandoning unnecessary .globl because switch_exit() is handsomely
common between MIPS1 and MIPS3.
2000-03-27 04:52:11 +00:00
enami 24a0efebab Fix compilation error (printf format mismatch) due to recent round_page()
change.  While I'm here I fold the long line.
2000-03-27 04:01:54 +00:00
nisimura 24571569fa Nuke MIPS_16K_PAGE conditional which should be commited in. It
was used for debugg'n purposes which only make senses on particular
hardware configurations and has never been intended to extend pagesize
of NetBSD/mips.
2000-03-27 02:55:13 +00:00
nisimura 0076cd46eb - Nuke unnecessary cast.
- Change comments on cpu_startup() so as what it does (XXX found mostly
  common across ports).
- Retain UNIX heritage of /* Good {morning,afternoon,evening,night} */.
2000-03-27 01:51:17 +00:00
nisimura 795ee9db8e Remove unnecessary bzero() op for proc0's USPACE as pmap_steal_memory()
returns a nullified area.
2000-03-27 01:24:55 +00:00
mycroft b0a227745b Add IPsec. 2000-03-26 21:35:48 +00:00
kleink 230876cf26 Merge parts of chs-ubc2 into the trunk:
* Remove the casts to vaddr_t from the round_page() and trunc_page() macros to
  make them type-generic, which is necessary i.e. to operate on file offsets
  without truncating them.
* In due course, cast pointer arguments to these macros to an appropriate
  integral type (paddr_t, vaddr_t).

Originally done by Chuck Silvers, updated by myself.
2000-03-26 20:42:21 +00:00
martin 0a1221cb28 Added a PCI frontend for the legacy ISA joystick driver.
Some PCI soundcards don't seem to use the generic gameport function with
interface 0x10 used here, but have either an own BAR dedicated to this
(i.e. Sonic Vibes or ESS Solo-1) or specify their own device (see
PCI_PRODUCT_CREATIVELABS_SBJOY in sys/dev/pci/pcidevs.h).
Probably these use a similar simple sheme and adding a frontend for them would
be trivial, but I don't own any of these cards, so I didn't.
2000-03-26 15:36:48 +00:00
ragge aef1518cd8 Implement bi_intr_establish(). Add some fields about which CPU to interrupt. 2000-03-26 11:41:25 +00:00
ragge dd359f65dd Need some vectors and pointers to be set before IPL is lowered. 2000-03-26 11:40:31 +00:00
ragge b81cd3fa6b Identify ourselves. 2000-03-26 11:39:45 +00:00
nisimura ae55376f19 - Remove unused bt459reg.h.
- sfbvar.h has gone, placing patch on holes for now.  Every TC framebuffer
  has a single explosure of xxfb_cnattach() which could be bridged by MI
  land.
2000-03-26 10:32:51 +00:00
frueauf 440814a0b5 Add "struct device sc_dev;" to struct par_softc.
Reviewed by Ignatios Souvatzis.
2000-03-26 10:15:32 +00:00
tsubai ffdaae73e0 Enable gmac ethernet. 2000-03-26 09:16:01 +00:00
tsubai f8a898cb1d Use ring buffer on tx side, too. 2000-03-26 09:15:17 +00:00
tsubai 5684221bbd esp declaration was moved to conf/files. 2000-03-26 08:34:20 +00:00
tsubai d806694e39 Fix typo. 2000-03-26 08:29:12 +00:00
is 40b550935e provide CCITT includes, and work around namespace collision 2000-03-26 07:52:58 +00:00
nisimura c4dd0cba64 Add 'struct callout repeat_ch;' in ACCESS.bus softc storage. 2000-03-26 06:51:46 +00:00
nisimura 99806742c0 Remove local implementation switching to accelerated MI sfb.c. 2000-03-26 05:52:17 +00:00
tsutsui 5513a809b2 Remove duplicated "audio* at uaudio?" line. 2000-03-26 04:31:39 +00:00
scw 8b9e435d47 Nuke some warnings when KERNEL_DEBUG is defined. 2000-03-25 21:26:47 +00:00
frueauf 01643c9f97 Fix typo: calllout_reset -> callout_reset. 2000-03-25 20:14:44 +00:00
uch 398dafb09a enable USB staff. 2000-03-25 19:05:45 +00:00
tsutsui 9100212ef0 Add a "sc_rev" member to ncr5380_softc and handle CXD1180 quirk
in MI ncr5380sbc.
2000-03-25 15:27:54 +00:00
uch 807350797d cosmetic change. 2000-03-25 15:12:04 +00:00
uch 7832b88a4a -G 30 -> -G 24 2000-03-25 15:11:08 +00:00
uch f9204d0a57 TOSHIBA TC6358TB(PLUM2) OHCI module support. 2000-03-25 15:08:26 +00:00
uch 58bae8effe bus_dma. taken from pmax. 2000-03-25 15:04:32 +00:00
nisimura 61609b54e2 Make sure proc0 PCB has spl0 condition in CP0 status register field.
cpu_fork() mistakenly created processes forked by proc0, including
kthreads, in splhigh condition, because [1] proc0's PCB was zero
cleared during initialization, and [2] value 0 in status register
field made processes to have splhigh condition when CPU tick was
assigned for them.  This mostly doesn't matter as forked processes
dive immediately into user mode through proc_trampoline code path,
however, kthreads never do that and remain in splhigh.

Reported by Ethan Solomita <ethan@geocast.com>.
2000-03-25 10:14:13 +00:00
nisimura b6b06284ce Add QED RM7000 PrID. 2000-03-25 06:33:50 +00:00
nonaka 567afae35f add some devices 2000-03-25 04:13:54 +00:00
nonaka 31dc574dbc more fixup pci base address 2000-03-25 04:12:20 +00:00
msaitoh ddb9af1bfe set SQMD bit when sh4 2000-03-25 03:07:29 +00:00
msaitoh b39aeb4493 use BSC_PCR_VAL 2000-03-25 02:51:57 +00:00
soren 573160e03b Revert previous. 2000-03-24 23:06:03 +00:00
soren c535ede30b Move sysctl definitions from arch/mips to arch/foo. 2000-03-24 21:30:58 +00:00
soren 5f168212c9 Fix typo. 2000-03-24 21:25:32 +00:00
soren a0c624dd3d Remove FPU PRIDs that are identical to the CPU ones. 2000-03-24 20:48:20 +00:00
soren b2386045f0 Protect against multiple inclusion. 2000-03-24 20:16:27 +00:00
thorpej e84ce772ff Add some MSR-related calls. From FreeBSD. 2000-03-24 19:07:12 +00:00
thorpej b05796c812 Add some Model Specific Register definitions. From FreeBSD. 2000-03-24 19:06:07 +00:00
soren 059fe2fbb2 One instruction per line. 2000-03-24 18:16:33 +00:00
soren 2531a231d2 Missing in previous; set cache alias mask properly on processors with
two-way set associative L1 caches.
2000-03-24 18:15:41 +00:00
ws b7570cae85 Update several ports to at least work again without IPKDB
after the update of that.
Sorry for breaking this with my last changes :-(.
Fixes PR#9671 by Lennart Augustsson.
2000-03-24 17:05:30 +00:00
soren 0a40850f62 Let's try NCR_IOMAPPED. 2000-03-24 13:08:30 +00:00
hannken 43e3ea96f3 Fix typos from last commit (callout). 2000-03-24 11:46:46 +00:00
hannken f7049d302a Fix a typo from last commit. 2000-03-24 10:30:12 +00:00
nisimura 58e4b0efbe A minimal fix to make this compilable. 2000-03-24 08:24:29 +00:00
nisimura 3af954d380 Have ST_REG_SR mnemonic for status register consistent with others. 2000-03-24 02:02:03 +00:00
thorpej 4ad898818b Fallout from callout. 2000-03-24 01:04:11 +00:00
is 128258c1a2 Initial IOBlix support. Only lpt and com; lpt untested; com assumes 24 MHz
clock (needs autoprobe of clock speed).
2000-03-23 22:44:42 +00:00
soren 1c965174b0 Make MIPS1+MIPS3 compile again. 2000-03-23 14:49:29 +00:00
ad 9753adee2f Previous was incomplete. Tsk. 2000-03-23 13:49:49 +00:00
nisimura 608ce86497 - Have physical address for MIPS_PHYS_TO_KSEG1() macro.
- Make consistent function declarations.
- White spaces.
2000-03-23 08:09:54 +00:00
thorpej 7b918b4088 New callout mechanism with two major improvements over the old
timeout()/untimeout() API:
- Clients supply callout handle storage, thus eliminating problems of
  resource allocation.
- Insertion and removal of callouts is constant time, important as
  this facility is used quite a lot in the kernel.

The old timeout()/untimeout() API has been removed from the kernel.
2000-03-23 06:40:33 +00:00
thorpej b667a5a357 New callout mechanism with two major improvements over the old
timeout()/untimeout() API:
- Clients supply callout handle storage, thus eliminating problems of
  resource allocation.
- Insertion and removal of callouts is constant time, important as
  this facility is used quite a lot in the kernel.

The old timeout()/untimeout() API has been removed from the kernel.
2000-03-23 06:30:07 +00:00
mycroft 58d6d5d60c Add awi. 2000-03-23 04:43:41 +00:00
thorpej 3e93b28029 Use a software interrupt for tty input processing, not a callout. 2000-03-23 01:04:10 +00:00
soren f3ca63ef9e Note that this is just for compatibility. 2000-03-22 21:15:59 +00:00
ws 7da71e5f9e Make IPKDB working again.
Add support for i386 debugging and pci-based ne2000 boards.
2000-03-22 20:58:25 +00:00
soren 5be5f12199 The firmware uses the clock in BCD mode. 2000-03-22 20:38:22 +00:00
soren 793382b291 Revert to the same scheme as the other MBR-using ports. 2000-03-22 20:38:05 +00:00