need to understand the locking around that field. Instead of setting
B_ERROR, set b_error instead. b_error is 'owned' by whoever completes
the I/O request.
in PR port-alpha/36628:
- make jensenio_eisa_maxslots() return 8 (instead of 16) since
EISA config for slot 8-15 on jensen could return invalid values
- pass eisa_chipset_tag_t to eisa_init() and check eisa_maxslots()
on probing EISA config space
- pass M_ZERO to malloc(9) and make sure malloc(9) doesn't fail
- fix typo in a debug printf, add more debug printfs, and
use #ifdef EISA_DEBUG to enable them
- cast uint8_t value to uint32_t before shift more than 8 bits
- check buffer region on reading compressed data from EISA config space
- use todr(9) API with MI mc146818(4) driver and remove homegrown
todr stuff from MD alpha/clock.c and alpha/mcclock.c
- also remove obsolete cc_microtime stuff from MD code
- add ci_pcc_freq member in struct cpu_info for cpu_frequency(), and
calibrate it with mc146818 interval clock in mcclock attachment
- call cc_init() in cpu_initclocks(9) because all alpha cpus have
a pcc counter
Tested on DEC 3000/300 and AlphaPC 164, but not on any SMP machines yet.
lpt at jensenio doesn't seem to have a specific interrupt vector
but uses a normal EISA interrupt.
Fixes another part of PR port-alpha/36628 and PR port-alpha/20386.
link context instead of NULL. Otherwise, if we got a signal while the
lwp had a link context set, the link context would be set to NULL upon
return from signal delivery.
christos@tech-kern: "I think you are right."
All alpha machines use arch/alpha/alpha/mcclock.c for hardclock(9)
and it always sets MC_RATE_1024_Hz.
The default HZ value also affects tick and tickadj in conf/param.c.
to the beginning so they can still be accessed in assymbly code using 8 bit
offsets. The addition of a big structure in cpu_data moved these outside
the range of the addq instruction. Gas should have complained that the
immediate value was too large, but just silently truncated it. I can now
run multiprocessor again.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
pool_init() is supposed to do, and actual usage of that argument in
pool_init()'s implementation, add use of IPL_VM to the TLB shootdown
job queue pool initialization to get this building again.
Someone suggested an IPL_XXX_ASK_ANDY constant be introduced...
locators for uhub because a hub can't have sub-devices.
This might be sanity-checked eventually.
Same for ubt now after the change to device attachment.
with newlock2 merge:
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
int _bus_dmatag_subregion(bus_dma_tag_t tag,
bus_addr_t min_addr,
bus_addr_t max_addr,
bus_dma_tag_t *newtag,
int flags)
void _bus_dmatag_destroy(bus_dma_tag_t tag)
that allow a (normally broken/limited) device to restrict the bus address
range it can talk to. this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.
all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.
XXX: bus_dma(9) needs an update still.
P_*/L_* naming convention, and rename the in-kernel flags to avoid
conflict. (P_ -> PK_, L_ -> LW_ ). Add back the (now unused) LSDEAD
constant.
Restores source compatibility with pre-newlock2 tools like ps or top.
Reviewed by Andrew Doran.
