- Add mpu at cmpci attachment.
- Fix panic during attach on alpha.
- Change register of SPDIF input phase (but undocumented, either).
- Change code for mixer initialization.
- Return 1, not 0, when an interrupt is processed.
More changes to the mixer are pending....
in how interrupts are down- the 23XX has not only a different place to check
for an interrupt, but unlike all other QLogic cards, you have to read the
status as a 32 bit word- not 16 bit words. Rather than have device specific
functions as called from the core module (in isp_intr), it makes more sense
to have the platform/bus modules do the gruntwork of splitting out the
isr, semaphore register and the first outgoing mailbox register (if needed)
*prior* to calling isp_intr (if calling isp_intr is necessary at all).
If all devices can handle 66MHz, then use 66MHz.
Triple the number of configured I/O ranges that we can handle on a bus
(8 was insufficient--originally didn't consider multifunction devices)
Allow one to specify which types of memory to configure, I/O, ROM, or
MEM--for example, one could configure only ROM or only non-ROM.
Ensure that the ROM is disabled if we're not configuring it.
Only set PCI_COMMAND_IO_ENABLE/PCI_COMMAND_MEM_ENABLE if there are valid
memory ranges configured.
bus (and optionally maps expansion ROMs), and an optional second
pass to disable expansion ROMs that are mapped. This would allow
MD code to possibly execute the expansion ROMs (possibly in an x86
emulator) to configure a device (e.g. a VGA card, which pretty much
needs to be configured by its ROM).
the expansion ROMs on cards, since address decoders may be shared between
the ROM and PCI memory space on some cards (i.e. "only map the ROM if you're
going to use it, and then unmap it when you're done" is the intended
usage).
driver uses direct DMA to mbufs (like other PCI network drivers,
and unlike the old "le at pci" driver), and also supports communication
with the MII-connected PHYs on the 10/100 boards.
PCI_NETBSD_CONFIGURE, which tells machine dependent code
to enable the specified (by a bitmask) PCI IDE channels in
the southbridge, in the event that system firmware does not
do so.
thorpej