Instead of erroring out due to the unknown function alloca, lint now
warns about a pointer/integer mismatch since it wrongly assumes that all
__builtin functions return int. The warning is still better than a
failing build though.
HOST_CPPFLAGS, HOST_CXXFLAGS, but not LIBRARY_PATH because it breaks
the build. These variables are necessary to support building NetBSD
from a GNU Guix or NixOS host, where /usr/include, /lib, and all
but /bin/sh do not exist. In many cases, support for HOST_CPPFLAGS
was incomplete. From Ryan Sundberg
Changes between GMP version 6.2.0 and 6.2.1
BUGS FIXED
* A possible overflow of type int is avoided for mpz_cmp on huge operands.
* Overflows are more carefully detected and reported for mpz_pow_ui.
* A bug in longlong.h for aarch64 sub_ddmmss, not affecting GMP, was healed.
FEATURES
* C90 compliance.
* Initial support for Darwin on arm64, and improved portability.
* Support for more processors.
Cherry-picked from upstream:
https://git.savannah.gnu.org/gitweb/?p=config.git;a=commit;h=1c4398015583eb77bc043234f5734be055e64bea
Everything except external/apache2/llvm/dist/llvm/cmake/config.guess
is patched, which is under vendor tag and cannot be modified. I expect
that this file is not actually used as we use hand-crafted version of
configure script instead of cmake for building LLVM.
Note that external/apache2/llvm/autoconf/autoconf/config.guess has
already been committed on Oct. 20, but commit message disappeared as
cvs aborted due to "permission denied" when trying to modify the file
mentioned above. Sorry for confusing you.
Also note that GMP uses its own config.guess Patch for
external/lgpl3/gmp/dist/config.guess is provided by ryo@. Thanks!
- Bug fixes to gmp_snprintf, conversion to double, mpz_powm,
and mpf_set_str.
- New functions for factorial, primorial, fibonacci, mpz_2fac_ui,
and mpz_mfac_uiui.
- MIPS r6 cores are now supported.
- Various speeds ups.
notes:
- support for thumb-less ARM chips was in our port of 5.1.3, but a
similar method has been provided upstream now
- someone should look at the AVX failure reports, and fix them
Changes between GMP version 6.1.0 and 6.1.1
FEATURES
* Work around faulty cpuid on some recent Intel chips (this allows GMP to run
on Skylake Pentiums).
* Support thumb-less ARM chips.
Changes between GMP version 6.0.* and 6.1.0
BUGS FIXED
* The public function mpn_com is now correctly declared in gmp.h.
* Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for
some obsolete CPUs.
* Various problems related to precision for mpf have been fixed.
* Fixed ABI incompatible stack alignment in calls from assembly code.
* Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI.
SPEEDUPS
* Speedup for Intel Broadwell and Skylake through assembly code making use of
new ADX instructions.
* Square root is now faster when the remainder is not needed. Also the speed
to compute the k-th root improved, for small sizes.
FEATURES
* New C++ functions gcd and lcm for mpz_class.
* New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap.
* New public mpq_cmp_z function, to efficiently compare rationals with
integers.
* Support for more 32-bit arm processors.
* Support for AVX-less modern x86 CPUs. (Such support might be missing either
because the CPU vendor chose to disable AVX, or because the running kernel
lacks AVX context switch support.)
* Support for NetBSD under Xen; we switch off AVX unconditionally under
NetBSD since a bug in NetBSD makes AVX fail under Xen.
MISC
* Tuned values for FFT multiplications are provided for larger number on
many platforms.
Changes between GMP version 5.1.* and 6.0.0
BUGS FIXED
* The function mpz_invert now considers any number invertible in Z/1Z.
* The mpn multiply code now handles operands of more than 2^31 limbs
correctly. (Note however that the mpz code is limited to 2^32 bits on
32-bit hosts and 2^37 bits on 64-bit hosts.)
SPEEDUPS
* Plain division of large operands is faster and more monotonous in operand
size.
* Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved
assembly.
* Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten
and vastly expanded assembly support. Speedup also for the older Core 2
and Nehalem.
* Faster mixed arithmetic between mpq_class and double.
FEATURES
* Support for new Intel and AMD CPUs.
* New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel
silent multiplication and squaring.
* New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing
side-channel silent division.
* New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent
conditional addition and subtraction.
* New public function mpn_sec_powm, implementing side-channel silent modexp.
* New public function mpn_sec_invert, implementing side-channel silent
modular inversion.
* Better support for applications which use the mpz_t type, but nevertheless
need to call some of the lower-level mpn functions. See the documentation
for mpz_limbs_read and related functions.
introducing since release of software to be recognised. This should hopefully
allow the builds to progress a littles further on systems such as the POWER8
which features a little endian 64-bit PowerPC CPU identified as ppc64le.
christos