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Fix RV32 so it gets to the same point as RV64

This commit is contained in:
skrll 2022-09-28 05:02:02 +00:00
parent e3b627187d
commit ff805ca327
2 changed files with 11 additions and 5 deletions
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4
sys/arch/riscv/conf/Makefile.riscv
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile.riscv,v 1.7 2021/05/01 07:13:21 skrll Exp $
# $NetBSD: Makefile.riscv,v 1.8 2022/09/28 05:02:02 skrll Exp $
# Makefile for NetBSD
#
@ -71,7 +71,7 @@ locore.o: ${RISCV}/riscv/locore.S assym.h
.if ${MACHINE_ARCH} == "riscv64" && ${LP64:Uyes} == "yes"
TEXTADDR?= 0xFFFFFFC000000000
.else
TEXTADDR?= 0xC0001000
TEXTADDR?= 0x80200000
.endif
KERNLDSCRIPT?= ${RISCV}/conf/kern.ldscript
EXTRA_LINKFLAGS= ${LDOPTS} --relax

12
sys/arch/riscv/riscv/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.26 2022/09/27 08:18:21 skrll Exp $ */
/* $NetBSD: locore.S,v 1.27 2022/09/28 05:02:02 skrll Exp $ */
/*-
* Copyright (c) 2014, 2022 The NetBSD Foundation, Inc.
@ -221,12 +221,17 @@ ENTRY_NP(start)
#endif
VPRINTX(s3)
#endif
#endif
VPRINTS(": ")
VPRINTXNL(t0)
VPRINTS("\n\r")
#endif // _LP64
#if ((VM_MIN_KERNEL_ADDRESS >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
li t1, ((VM_MIN_KERNEL_ADDRESS >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
add s2, s2, t1
#endif
#if PGSHIFT < PTE_PPN_SHIFT
#error Code assumes PGSHIFT is greater than PTE_PPN_SHIFT
@ -240,7 +245,8 @@ ENTRY_NP(start)
// Fill in the PDEs for kernel.
//
PTR_LA s0, start
srli s0, s0, (PGSHIFT - PTE_PPN_SHIFT)
srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in
slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN
or s0, s0, s7
.Lfill:
VPRINTS("kern ")