Switch to the MI 53c710 driver recently committed by Izumi Tsutsui.
This commit is contained in:
scw
parent
dfc69462fd
commit
ff4a29679f
@ -1,8 +1,8 @@
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# $NetBSD: GENERIC,v 1.23 2000/12/19 10:42:05 bouyer Exp $
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# $NetBSD: GENERIC,v 1.24 2001/04/30 09:05:58 scw Exp $
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include "arch/mvme68k/conf/std.mvme68k"
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#ident "GENERIC-$Revision: 1.23 $"
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#ident "GENERIC-$Revision: 1.24 $"
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# Boards this kernel supports
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options MVME147
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@ -97,7 +97,7 @@ vmetwo0 at mainbus0
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memc* at pcctwo? ipl 6
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clock0 at pcctwo? ipl 5
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ie0 at pcctwo? ipl 3
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ncrsc0 at pcctwo? ipl 2
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osiop0 at pcctwo? ipl 2
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# MVME162/MVME172 specific devices
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zsc* at pcctwo? ipl 4
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@ -117,7 +117,7 @@ vme0 at vmetwo0
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#foo0 at vme0 addr 0x00ef0000 irq 3 vect 0x80
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scsibus* at wdsc?
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scsibus* at ncrsc?
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scsibus* at osiop?
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sd* at scsibus? target ? lun ?
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st* at scsibus? target ? lun ?
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@ -1,4 +1,4 @@
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# $NetBSD: VME162,v 1.4 2000/12/07 08:40:06 scw Exp $
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# $NetBSD: VME162,v 1.5 2001/04/30 09:05:59 scw Exp $
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include "arch/mvme68k/conf/std.mvme68k"
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@ -63,7 +63,7 @@ memc* at pcctwo? ipl 6
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clock0 at pcctwo? ipl 5
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zsc* at pcctwo? ipl 4
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ie0 at pcctwo? ipl 3
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ncrsc0 at pcctwo? ipl 2
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osiop0 at pcctwo? ipl 2
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zstty* at zsc? channel ?
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@ -75,7 +75,7 @@ vme0 at vmetwo0
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#foo0 at vme0 addr 0x10001000 am 0x0d irq 3 vect 0x80
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# SCSI Bus Support
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scsibus* at ncrsc?
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scsibus* at osiop?
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sd* at scsibus? target ? lun ?
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st* at scsibus? target ? lun ?
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@ -1,4 +1,4 @@
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# $NetBSD: VME167,v 1.8 2000/12/07 08:40:06 scw Exp $
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# $NetBSD: VME167,v 1.9 2001/04/30 09:05:59 scw Exp $
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include "arch/mvme68k/conf/std.mvme68k"
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@ -63,7 +63,7 @@ memc* at pcctwo? ipl 6
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clock0 at pcctwo? ipl 5
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clmpcc0 at pcctwo? ipl 4
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ie0 at pcctwo? ipl 3
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ncrsc0 at pcctwo? ipl 2
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osiop0 at pcctwo? ipl 2
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lpt0 at pcctwo? ipl 1
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# VMEbus Support
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@ -74,7 +74,7 @@ vme0 at vmetwo0
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#foo0 at vme0 addr 0x10001000 am 0x0d irq 3 vect 0x80
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# SCSI Bus Support
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scsibus* at ncrsc?
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scsibus* at osiop?
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sd* at scsibus? target ? lun ?
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st* at scsibus? target ? lun ?
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@ -1,4 +1,4 @@
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# $NetBSD: VME172,v 1.4 2000/12/07 08:40:06 scw Exp $
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# $NetBSD: VME172,v 1.5 2001/04/30 09:05:59 scw Exp $
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include "arch/mvme68k/conf/std.mvme68k"
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@ -62,7 +62,7 @@ memc* at pcctwo? ipl 6
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clock0 at pcctwo? ipl 5
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zsc* at pcctwo? ipl 4
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ie0 at pcctwo? ipl 3
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ncrsc0 at pcctwo? ipl 2
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osiop0 at pcctwo? ipl 2
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zstty* at zsc? channel ?
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@ -74,7 +74,7 @@ vme0 at vmetwo0
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#foo0 at vme0 addr 0x10001000 am 0x0d irq 3 vect 0x80
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# SCSI Bus Support
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scsibus* at ncrsc?
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scsibus* at osiop?
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sd* at scsibus? target ? lun ?
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st* at scsibus? target ? lun ?
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@ -1,4 +1,4 @@
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# $NetBSD: VME177,v 1.4 2000/12/07 08:40:06 scw Exp $
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# $NetBSD: VME177,v 1.5 2001/04/30 09:05:59 scw Exp $
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include "arch/mvme68k/conf/std.mvme68k"
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@ -62,7 +62,7 @@ memc* at pcctwo? ipl 6
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clock0 at pcctwo? ipl 5
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clmpcc0 at pcctwo? ipl 4
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ie0 at pcctwo? ipl 3
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ncrsc0 at pcctwo? ipl 2
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osiop0 at pcctwo? ipl 2
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lpt0 at pcctwo? ipl 1
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# VMEbus Support
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@ -73,7 +73,7 @@ vme0 at vmetwo0
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#foo0 at vme0 addr 0x10001000 am 0x0d irq 3 vect 0x80
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# SCSI Bus Support
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scsibus* at ncrsc?
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scsibus* at osiop?
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sd* at scsibus? target ? lun ?
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st* at scsibus? target ? lun ?
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@ -1,4 +1,4 @@
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# $NetBSD: files.mvme68k,v 1.42 2001/01/17 00:07:29 fvdl Exp $
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# $NetBSD: files.mvme68k,v 1.43 2001/04/30 09:05:59 scw Exp $
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# config file for mvme68k
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@ -104,13 +104,8 @@ device wdsc: sbic, scsi
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attach wdsc at pcc with wdsc_pcc
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file arch/mvme68k/dev/wdsc.c wdsc_pcc
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# NCR53C710 SCSI ...
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define msiop
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file arch/mvme68k/dev/siop.c msiop
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# ... on everything else
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device ncrsc: msiop, scsi
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attach ncrsc at pcctwo with ncrsc_pcctwo
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# NCR53C710 SCSI on everything else
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attach osiop at pcctwo with ncrsc_pcctwo
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file arch/mvme68k/dev/ncrsc_pcctwo.c ncrsc_pcctwo
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file arch/mvme68k/mvme68k/autoconf.c
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@ -1,4 +1,4 @@
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/* $NetBSD: ncrsc_pcctwo.c,v 1.8 2001/04/25 17:53:16 bouyer Exp $ */
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/* $NetBSD: ncrsc_pcctwo.c,v 1.9 2001/04/30 09:05:59 scw Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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@ -58,8 +58,9 @@
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <mvme68k/dev/siopreg.h>
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#include <mvme68k/dev/siopvar.h>
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#include <dev/ic/osiopreg.h>
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#include <dev/ic/osiopvar.h>
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#include <mvme68k/dev/pcctworeg.h>
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#include <mvme68k/dev/pcctwovar.h>
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@ -68,22 +69,12 @@ int ncrsc_pcctwo_match __P((struct device *, struct cfdata *, void *));
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void ncrsc_pcctwo_attach __P((struct device *, struct device *, void *));
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struct cfattach ncrsc_pcctwo_ca = {
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sizeof(struct siop_softc), ncrsc_pcctwo_match, ncrsc_pcctwo_attach
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sizeof(struct osiop_softc), ncrsc_pcctwo_match, ncrsc_pcctwo_attach
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};
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static int ncrsc_pcctwo_intr __P((void *));
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extern struct cfdriver ncrsc_cd;
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/*
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* Define 'scsi_nosync = 0x00' to enable sync SCSI mode.
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* (Required by the main SIOP driver. This was also used by
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* the 147's SBIC driver, but sync scsi is so unreliable on
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* that board that I disabled it permanently. '167 sync.
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* scsi appears to work very well, on the other hand.)
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*/
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u_long scsi_nosync = 0;
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int shift_nosync = 0;
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extern struct cfdriver osiop_cd;
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/* ARGSUSED */
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int
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@ -96,7 +87,7 @@ ncrsc_pcctwo_match(parent, cf, args)
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pa = args;
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if (strcmp(pa->pa_name, ncrsc_cd.cd_name))
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if (strcmp(pa->pa_name, osiop_cd.cd_name))
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return (0);
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pa->pa_ipl = cf->pcctwocf_ipl;
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@ -112,12 +103,11 @@ ncrsc_pcctwo_attach(parent, self, args)
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void *args;
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{
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struct pcctwo_attach_args *pa;
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struct siop_softc *sc;
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bus_space_handle_t bush;
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struct osiop_softc *sc;
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int clk, ctest7;
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pa = (struct pcctwo_attach_args *) args;
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sc = (struct siop_softc *) self;
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sc = (struct osiop_softc *) self;
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/*
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* On the '17x the siop's clock is the same as the cpu clock.
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@ -130,53 +120,35 @@ ncrsc_pcctwo_attach(parent, self, args)
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ctest7 = 0;
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} else {
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clk = cpuspeed * 2;
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ctest7 = SIOP_CTEST7_SC0;
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ctest7 = OSIOP_CTEST7_SC0;
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}
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printf(": %dMHz ncr53C710 SCSI I/O Processor\n", clk);
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/* XXXSCW: This is a hack until siop is bus-spaced */
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bus_space_map(pa->pa_bust, pa->pa_offset, 0x40, 0, &bush);
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sc->sc_siopp = (siop_regmap_p) bush;
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sc->sc_bst = pa->pa_bust;
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sc->sc_dmat = pa->pa_dmat;
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(void) bus_space_map(sc->sc_bst, pa->pa_offset, OSIOP_NREGS,
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0, &sc->sc_reg);
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sc->sc_clock_freq = clk;
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sc->sc_ctest7 = ctest7 | SIOP_CTEST7_TT1;
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sc->sc_dcntl = SIOP_DCNTL_EA;
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sc->sc_ctest7 = ctest7 | OSIOP_CTEST7_TT1;
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sc->sc_dcntl = OSIOP_DCNTL_EA;
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sc->sc_id = 7; /* XXX: Could use NVRAM setting */
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sc->sc_adapter.adapt_dev = &sc->sc_dev;
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sc->sc_adapter.adapt_nchannels = 1;
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sc->sc_adapter.adapt_openings = 7;
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sc->sc_adapter.adapt_max_periph = 1;
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sc->sc_adapter.adapt_ioctl = NULL;
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sc->sc_adapter.adapt_minphys = siop_minphys;
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sc->sc_adapter.adapt_request = siop_scsi_request;
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sc->sc_channel.chan_adapter = &sc->sc_adapter;
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sc->sc_channel.chan_bustype = &scsi_bustype;
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sc->sc_channel.chan_channel = 0;
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sc->sc_channel.chan_ntargets = 8;
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sc->sc_channel.chan_nluns = 8;
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sc->sc_channel.chan_id = 7; /* Could use NVRAM setting */
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/* Chip-specific initialisation */
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siopinitialize(sc);
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/* Attach main MI driver */
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osiop_attach(sc);
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/* Hook the chip's interrupt */
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pcctwointr_establish(PCCTWOV_SCSI, ncrsc_pcctwo_intr, pa->pa_ipl, sc);
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(void) config_found(self, &sc->sc_channel, scsiprint);
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}
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static int
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ncrsc_pcctwo_intr(arg)
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void *arg;
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{
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struct siop_softc *sc;
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siop_regmap_p rp;
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struct osiop_softc *sc = (struct osiop_softc *) arg;
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u_char istat;
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sc = arg;
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/*
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* Catch any errors which can happen when the SIOP is
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* local bus master...
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@ -188,23 +160,23 @@ ncrsc_pcctwo_intr(arg)
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istat |= PCCTWO_ERR_SR_SCLR;
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pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS, istat);
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}
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/* This is potentially nasty, since the IRQ is level triggered... */
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if (sc->sc_flags & SIOP_INTSOFF)
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if (sc->sc_flags & OSIOP_INTSOFF)
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return (0);
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rp = sc->sc_siopp;
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istat = rp->siop_istat;
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istat = osiop_read_1(sc, OSIOP_ISTAT);
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if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
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if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
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return (0);
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/* Save interrupt details for the back-end interrupt handler */
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sc->sc_sstat0 = rp->siop_sstat0;
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sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
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sc->sc_istat = istat;
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sc->sc_dstat = rp->siop_dstat;
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sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT);
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/* Deal with the interrupt */
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siopintr(sc);
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osiop_intr(sc);
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return (1);
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}
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File diff suppressed because it is too large
Load Diff
@ -1,219 +0,0 @@
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/* $NetBSD: siop_script.out,v 1.1 1999/02/20 00:12:00 scw Exp $ */
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/*
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* NOTE:
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*
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* Support for 17 DMA chain elements added by "hand-hacking" this
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* file.
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*
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* This file was _not_ generated from siop_script.ss.
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* However, siop_script.ss *has* been updated such that it will
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* generate the same object code, minus my comments.
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* And all because the man lacked a script compiler...
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*/
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unsigned long scripts[] = {
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/* switch */
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0x47000000, 0x00000118, /* 000 - 0 */
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0x878b0000, 0x00000030, /* 008 - 8 */
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0x868a0000, 0x00000168, /* 010 - 16 */
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0x828a0000, 0x00000170, /* 018 - 24 */
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0x808a0000, 0x00000180, /* 020 - 32 */
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0x818a0000, 0x00000288, /* 028 - 40 */
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0x838a0000, 0x00000390, /* 030 - 48 */
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0x98080000, 0x0000ff05, /* 038 - 56 */
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/* msgin */
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0x1f000024, 0x00000024, /* 040 - 64 */
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0x808c0001, 0x00000040, /* 048 - 72 */
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0x808c0004, 0x00000078, /* 050 - 80 */
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0x808c0002, 0x00000088, /* 058 - 88 */
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0x808c0007, 0x00000010, /* 060 - 96 */
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0x808c0003, 0x00000008, /* 068 - 104 */
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0x98080000, 0x0000ff06, /* 070 - 112 */
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/* msg_rdp */
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/* msg_rej */
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0x60000040, 0x00000000, /* 078 - 120 */
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0x60000008, 0x00000000, /* 080 - 128 */
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0x80880000, 0xffffff78, /* 088 - 136 */
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/* ext_msg */
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0x60000040, 0x00000000, /* 090 - 144 */
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0x1f00002c, 0x0000002c, /* 098 - 152 */
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0x808c0003, 0x00000008, /* 0a0 - 160 */
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0x98080000, 0x0000ff07, /* 0a8 - 168 */
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/* sync_msg */
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0x60000040, 0x00000000, /* 0b0 - 176 */
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0x1f000034, 0x00000034, /* 0b8 - 184 */
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0x60000040, 0x00000000, /* 0c0 - 192 */
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0x80880000, 0xffffff38, /* 0c8 - 200 */
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/* disc */
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0x60000040, 0x00000000, /* 0d0 - 208 */
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0x48000000, 0x00000000, /* 0d8 - 216 */
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0x98080000, 0x0000ff02, /* 0e0 - 224 */
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/* msg_sdp */
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0x60000040, 0x00000000, /* 0e8 - 232 */
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0x87830000, 0xffffff10, /* 0f0 - 240 */
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0x1f00002c, 0x0000002c, /* 0f8 - 248 */
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0x98040004, 0x0000ff08, /* 100 - 256 */
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0x60000040, 0x00000000, /* 108 - 264 */
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0x48000000, 0x00000000, /* 110 - 272 */
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0x98080000, 0x0000ff01, /* 118 - 280 */
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/* wait_reselect */
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0x54000000, 0x00000038, /* 120 - 288 */
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0x72230000, 0x00000000, /* 128 - 296 */
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0x6a340000, 0x00000000, /* 130 - 304 */
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0x9f030000, 0x0000ff09, /* 138 - 312 */
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0x1f00001c, 0x0000001c, /* 140 - 320 */
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0x98080000, 0x0000ff03, /* 148 - 328 */
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0x60000040, 0x00000000, /* 150 - 336 */
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0x80880000, 0xfffffea8, /* 158 - 344 */
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/* select_adr */
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0x74011000, 0x00000000, /* 160 - 352 */
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0x980c0000, 0x0000ff04, /* 168 - 360 */
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0x74164000, 0x00000000, /* 170 - 368 */
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0x80880000, 0xffffffa0, /* 178 - 376 */
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/* msgout */
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0x1e000004, 0x00000004, /* 180 - 384 */
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0x80880000, 0xfffffe78, /* 188 - 392 */
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/* command_phase */
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0x60000008, 0x00000000, /* 190 - 400 */
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0x1a00000c, 0x0000000c, /* 198 - 408 */
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0x80880000, 0xfffffe60, /* 1a0 - 416 */
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/* dataout */
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0x1800003c, 0x0000003c, /* 1a8 - 424 */ /* ds_Data1 */
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0x88830000, 0xfffffe50, /* 1b0 - 432 */
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0x18000044, 0x00000044, /* 1b8 - 440 */ /* ds_Data2 */
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0x88830000, 0xfffffe40, /* 1c0 - 448 */
|
||||
0x1800004c, 0x0000004c, /* 1c8 - 456 */ /* ds_Data3 */
|
||||
0x88830000, 0xfffffe30, /* 1d0 - 464 */
|
||||
0x18000054, 0x00000054, /* 1d8 - 472 */ /* ds_Data4 */
|
||||
0x88830000, 0xfffffe20, /* 1e0 - 480 */
|
||||
0x1800005c, 0x0000005c, /* 1e8 - 488 */ /* ds_Data5 */
|
||||
0x88830000, 0xfffffe10, /* 1f0 - 496 */
|
||||
0x18000064, 0x00000064, /* 1f8 - 504 */ /* ds_Data6 */
|
||||
0x88830000, 0xfffffe00, /* 200 - 512 */
|
||||
0x1800006c, 0x0000006c, /* 208 - 520 */ /* ds_Data7 */
|
||||
0x88830000, 0xfffffdf0, /* 210 - 528 */
|
||||
0x18000074, 0x00000074, /* 218 - 536 */ /* ds_Data8 */
|
||||
0x88830000, 0xfffffde0, /* 220 - 544 */
|
||||
0x1800007c, 0x0000007c, /* 228 - 552 */ /* ds_Data9 */
|
||||
0x88830000, 0xfffffdd0, /* 230 - 560 */
|
||||
|
||||
0x18000084, 0x00000084, /* 238 */ /* ds_Data10 */
|
||||
0x88830000, 0xfffffdc0, /* 240 */
|
||||
0x1800008c, 0x0000008c, /* 248 */ /* ds_Data11 */
|
||||
0x88830000, 0xfffffdb0, /* 250 */
|
||||
0x18000094, 0x00000094, /* 258 */ /* ds_Data12 */
|
||||
0x88830000, 0xfffffda0, /* 260 */
|
||||
0x1800009c, 0x0000009c, /* 268 */ /* ds_Data13 */
|
||||
0x88830000, 0xfffffd90, /* 270 */
|
||||
0x180000a4, 0x000000a4, /* 278 */ /* ds_Data14 */
|
||||
0x88830000, 0xfffffd80, /* 280 */
|
||||
0x180000ac, 0x000000ac, /* 288 */ /* ds_Data15 */
|
||||
0x88830000, 0xfffffd70, /* 290 */
|
||||
0x180000b4, 0x000000b4, /* 298 */ /* ds_Data16 */
|
||||
0x88830000, 0xfffffd60, /* 2a0 */
|
||||
0x180000bc, 0x000000bc, /* 2a8 */ /* ds_Data17 */
|
||||
0x88880000, 0xfffffd50, /* 2b0 */
|
||||
|
||||
/* datain */
|
||||
0x1900003c, 0x0000003c, /* 2b8 */ /* ds_Data1 */
|
||||
0x89830000, 0xfffffd40, /* 2c0 */
|
||||
0x19000044, 0x00000044, /* 2c8 */ /* ds_Data2 */
|
||||
0x89830000, 0xfffffd30, /* 2d0 */
|
||||
0x1900004c, 0x0000004c, /* 2d8 */ /* ds_Data3 */
|
||||
0x89830000, 0xfffffd20, /* 2e0 */
|
||||
0x19000054, 0x00000054, /* 2e8 */ /* ds_Data4 */
|
||||
0x89830000, 0xfffffd10, /* 2f0 */
|
||||
0x1900005c, 0x0000005c, /* 2f8 */ /* ds_Data5 */
|
||||
0x89830000, 0xfffffd00, /* 300 */
|
||||
0x19000064, 0x00000064, /* 308 */ /* ds_Data6 */
|
||||
0x89830000, 0xfffffcf0, /* 310 */
|
||||
0x1900006c, 0x0000006c, /* 318 */ /* ds_Data7 */
|
||||
0x89830000, 0xfffffce0, /* 320 */
|
||||
0x19000074, 0x00000074, /* 328 */ /* ds_Data8 */
|
||||
0x89830000, 0xfffffcd0, /* 330 */
|
||||
0x1900007c, 0x0000007c, /* 338 */ /* ds_Data9 */
|
||||
0x89830000, 0xfffffcc0, /* 340 */
|
||||
|
||||
0x19000084, 0x00000084, /* 348 */ /* ds_Data10 */
|
||||
0x89830000, 0xfffffcb0, /* 350 */
|
||||
0x1900008c, 0x0000008c, /* 358 */ /* ds_Data11 */
|
||||
0x89830000, 0xfffffca0, /* 360 */
|
||||
0x19000094, 0x00000094, /* 368 */ /* ds_Data12 */
|
||||
0x89830000, 0xfffffc90, /* 370 */
|
||||
0x1900009c, 0x0000009c, /* 378 */ /* ds_Data13 */
|
||||
0x89830000, 0xfffffc80, /* 380 */
|
||||
0x190000a4, 0x000000a4, /* 388 */ /* ds_Data14 */
|
||||
0x89830000, 0xfffffc70, /* 390 */
|
||||
0x190000ac, 0x000000ac, /* 398 */ /* ds_Data15 */
|
||||
0x89830000, 0xfffffc60, /* 3a0 */
|
||||
0x190000b4, 0x000000b4, /* 3a8 */ /* ds_Data16 */
|
||||
0x89830000, 0xfffffc50, /* 3b0 */
|
||||
0x190000bc, 0x000000bc, /* 3b8 */ /* ds_Data17 */
|
||||
0x88880000, 0xfffffc40, /* 3c0 */
|
||||
|
||||
/* end */
|
||||
0x1b000014, 0x00000014, /* 3c8 */
|
||||
0x9f030000, 0x0000ff0a, /* 3d0 */
|
||||
0x1f00001c, 0x0000001c, /* 3d8 */
|
||||
0x60000040, 0x00000000, /* 3e0 */
|
||||
0x48000000, 0x00000000, /* 3e8 */
|
||||
0x98080000, 0x0000ff00, /* 3f0 */
|
||||
0x80880000, 0xfffffd20, /* 3f8 */
|
||||
};
|
||||
|
||||
#define A_ds_Device 0x00000000
|
||||
#define A_ds_MsgOut 0x00000004
|
||||
#define A_ds_Cmd 0x0000000c
|
||||
#define A_ds_Status 0x00000014
|
||||
#define A_ds_Msg 0x0000001c
|
||||
#define A_ds_MsgIn 0x00000024
|
||||
#define A_ds_ExtMsg 0x0000002c
|
||||
#define A_ds_SyncMsg 0x00000034
|
||||
#define A_ds_Data1 0x0000003c
|
||||
#define A_ds_Data2 0x00000044
|
||||
#define A_ds_Data3 0x0000004c
|
||||
#define A_ds_Data4 0x00000054
|
||||
#define A_ds_Data5 0x0000005c
|
||||
#define A_ds_Data6 0x00000064
|
||||
#define A_ds_Data7 0x0000006c
|
||||
#define A_ds_Data8 0x00000074
|
||||
#define A_ds_Data9 0x0000007c
|
||||
#define A_ds_Data10 0x00000084
|
||||
#define A_ds_Data11 0x0000008c
|
||||
#define A_ds_Data12 0x00000094
|
||||
#define A_ds_Data13 0x0000009c
|
||||
#define A_ds_Data14 0x000000a4
|
||||
#define A_ds_Data15 0x000000ac
|
||||
#define A_ds_Data16 0x000000b4
|
||||
#define A_ds_Data17 0x000000bc
|
||||
#define A_ok 0x0000ff00
|
||||
#define A_err1 0x0000ff01
|
||||
#define A_err2 0x0000ff02
|
||||
#define A_err3 0x0000ff03
|
||||
#define A_err4 0x0000ff04
|
||||
#define A_err5 0x0000ff05
|
||||
#define A_err6 0x0000ff06
|
||||
#define A_err7 0x0000ff07
|
||||
#define A_err8 0x0000ff08
|
||||
#define A_err9 0x0000ff09
|
||||
#define A_err10 0x0000ff0a
|
||||
#define Ent_scripts 0x00000000
|
||||
#define Ent_switch 0x00000008
|
||||
#define Ent_wait_reselect 0x00000120
|
||||
#define Ent_dataout 0x000001a8
|
||||
#define Ent_datain 0x000002b8
|
||||
|
||||
unsigned long INSTRUCTIONS = 0x00000080;
|
||||
unsigned long PATCHES = 0x00000000;
|
||||
@ -1,245 +0,0 @@
|
||||
; $NetBSD: siop_script.ss,v 1.1 1999/02/20 00:12:00 scw Exp $
|
||||
|
||||
;
|
||||
; Copyright (c) 1995 Michael L. Hitch
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions
|
||||
; are met:
|
||||
; 1. Redistributions of source code must retain the above copyright
|
||||
; notice, this list of conditions and the following disclaimer.
|
||||
; 2. Redistributions in binary form must reproduce the above copyright
|
||||
; notice, this list of conditions and the following disclaimer in the
|
||||
; documentation and/or other materials provided with the distribution.
|
||||
; 3. All advertising materials mentioning features or use of this software
|
||||
; must display the following acknowledgement:
|
||||
; This product includes software developed by Michael L. Hitch.
|
||||
; 4. The name of the author may not be used to endorse or promote products
|
||||
; derived from this software without specific prior written permission
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
; OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
; IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
; NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
; THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
|
||||
; NCR 53c710 script
|
||||
;
|
||||
ABSOLUTE ds_Device = 0
|
||||
ABSOLUTE ds_MsgOut = ds_Device + 4
|
||||
ABSOLUTE ds_Cmd = ds_MsgOut + 8
|
||||
ABSOLUTE ds_Status = ds_Cmd + 8
|
||||
ABSOLUTE ds_Msg = ds_Status + 8
|
||||
ABSOLUTE ds_MsgIn = ds_Msg + 8
|
||||
ABSOLUTE ds_ExtMsg = ds_MsgIn + 8
|
||||
ABSOLUTE ds_SyncMsg = ds_ExtMsg + 8
|
||||
ABSOLUTE ds_Data1 = ds_SyncMsg + 8
|
||||
ABSOLUTE ds_Data2 = ds_Data1 + 8
|
||||
ABSOLUTE ds_Data3 = ds_Data2 + 8
|
||||
ABSOLUTE ds_Data4 = ds_Data3 + 8
|
||||
ABSOLUTE ds_Data5 = ds_Data4 + 8
|
||||
ABSOLUTE ds_Data6 = ds_Data5 + 8
|
||||
ABSOLUTE ds_Data7 = ds_Data6 + 8
|
||||
ABSOLUTE ds_Data8 = ds_Data7 + 8
|
||||
ABSOLUTE ds_Data9 = ds_Data8 + 8
|
||||
ABSOLUTE ds_Data10 = ds_Data9 + 8
|
||||
ABSOLUTE ds_Data11 = ds_Data10 + 8
|
||||
ABSOLUTE ds_Data12 = ds_Data11 + 8
|
||||
ABSOLUTE ds_Data13 = ds_Data12 + 8
|
||||
ABSOLUTE ds_Data14 = ds_Data13 + 8
|
||||
ABSOLUTE ds_Data15 = ds_Data14 + 8
|
||||
ABSOLUTE ds_Data16 = ds_Data15 + 8
|
||||
ABSOLUTE ds_Data17 = ds_Data16 + 8
|
||||
|
||||
ABSOLUTE ok = 0xff00
|
||||
ABSOLUTE err1 = 0xff01
|
||||
ABSOLUTE err2 = 0xff02
|
||||
ABSOLUTE err3 = 0xff03
|
||||
ABSOLUTE err4 = 0xff04
|
||||
ABSOLUTE err5 = 0xff05
|
||||
ABSOLUTE err6 = 0xff06
|
||||
ABSOLUTE err7 = 0xff07
|
||||
ABSOLUTE err8 = 0xff08
|
||||
ABSOLUTE err9 = 0xff09
|
||||
ABSOLUTE err10 = 0xff0a
|
||||
|
||||
ENTRY scripts
|
||||
ENTRY switch
|
||||
ENTRY wait_reselect
|
||||
ENTRY dataout
|
||||
ENTRY datain
|
||||
|
||||
PROC scripts:
|
||||
|
||||
scripts:
|
||||
|
||||
SELECT ATN FROM ds_Device, REL(reselect)
|
||||
;
|
||||
switch:
|
||||
JUMP REL(msgin), WHEN MSG_IN
|
||||
JUMP REL(msgout), IF MSG_OUT
|
||||
JUMP REL(command_phase), IF CMD
|
||||
JUMP REL(dataout), IF DATA_OUT
|
||||
JUMP REL(datain), IF DATA_IN
|
||||
JUMP REL(end), IF STATUS
|
||||
|
||||
INT err5 ; Unrecognized phase
|
||||
|
||||
msgin:
|
||||
MOVE FROM ds_MsgIn, WHEN MSG_IN
|
||||
JUMP REL(ext_msg), IF 0x01 ; extended message
|
||||
JUMP REL(disc), IF 0x04 ; disconnect message
|
||||
JUMP REL(msg_sdp), IF 0x02 ; save data pointers
|
||||
JUMP REL(msg_rej), IF 0x07 ; message reject
|
||||
JUMP REL(msg_rdp), IF 0x03 ; restore data pointers
|
||||
INT err6 ; unrecognized message
|
||||
|
||||
msg_rdp:
|
||||
msg_rej:
|
||||
CLEAR ACK
|
||||
CLEAR ATN
|
||||
JUMP REL(switch)
|
||||
|
||||
ext_msg:
|
||||
CLEAR ACK
|
||||
MOVE FROM ds_ExtMsg, WHEN MSG_IN
|
||||
JUMP REL(sync_msg), IF 0x03
|
||||
int err7 ; extended message not SDTR
|
||||
|
||||
sync_msg:
|
||||
CLEAR ACK
|
||||
MOVE FROM ds_SyncMsg, WHEN MSG_IN
|
||||
CLEAR ACK
|
||||
JUMP REL(switch)
|
||||
|
||||
disc:
|
||||
CLEAR ACK
|
||||
WAIT DISCONNECT
|
||||
|
||||
int err2 ; signal disconnect w/o save DP
|
||||
|
||||
msg_sdp:
|
||||
CLEAR ACK ; acknowledge message
|
||||
JUMP REL(switch), WHEN NOT MSG_IN
|
||||
MOVE FROM ds_ExtMsg, WHEN MSG_IN
|
||||
INT err8, IF NOT 0x04 ; interrupt if not disconnect
|
||||
CLEAR ACK
|
||||
WAIT DISCONNECT
|
||||
|
||||
INT err1 ; signal disconnect
|
||||
|
||||
reselect:
|
||||
wait_reselect:
|
||||
WAIT RESELECT REL(select_adr)
|
||||
MOVE LCRC to SFBR ; Save reselect ID
|
||||
MOVE SFBR to SCRATCH0
|
||||
|
||||
INT err9, WHEN NOT MSG_IN ; didn't get IDENTIFY
|
||||
MOVE FROM ds_Msg, WHEN MSG_IN
|
||||
INT err3 ; let host know about reconnect
|
||||
CLEAR ACK ; acknowlege the message
|
||||
JUMP REL(switch)
|
||||
|
||||
|
||||
select_adr:
|
||||
MOVE SCNTL1 & 0x10 to SFBR ; get connected status
|
||||
INT err4, IF 0x00 ; tell host if not connected
|
||||
MOVE CTEST2 & 0x40 to SFBR ; clear Sig_P
|
||||
JUMP REL(wait_reselect) ; and try reselect again
|
||||
|
||||
msgout:
|
||||
MOVE FROM ds_MsgOut, WHEN MSG_OUT
|
||||
JUMP REL(switch)
|
||||
|
||||
command_phase:
|
||||
CLEAR ATN
|
||||
MOVE FROM ds_Cmd, WHEN CMD
|
||||
JUMP REL(switch)
|
||||
|
||||
dataout:
|
||||
MOVE FROM ds_Data1, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data2, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data3, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data4, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data5, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data6, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data7, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data8, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data9, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data10, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data11, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data12, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data13, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data14, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data15, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data16, WHEN DATA_OUT
|
||||
CALL REL(switch), WHEN NOT DATA_OUT
|
||||
MOVE FROM ds_Data17, WHEN DATA_OUT
|
||||
CALL REL(switch)
|
||||
|
||||
datain:
|
||||
MOVE FROM ds_Data1, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data2, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data3, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data4, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data5, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data6, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data7, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data8, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data9, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data10, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data11, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data12, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data13, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data14, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data15, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data16, WHEN DATA_IN
|
||||
CALL REL(switch), WHEN NOT DATA_IN
|
||||
MOVE FROM ds_Data17, WHEN DATA_IN
|
||||
CALL REL(switch)
|
||||
|
||||
end:
|
||||
MOVE FROM ds_Status, WHEN STATUS
|
||||
int err10, WHEN NOT MSG_IN ; status not followed by msg
|
||||
MOVE FROM ds_Msg, WHEN MSG_IN
|
||||
CLEAR ACK
|
||||
WAIT DISCONNECT
|
||||
INT ok ; signal completion
|
||||
JUMP REL(wait_reselect)
|
||||
@ -1,332 +0,0 @@
|
||||
/* $NetBSD: siopreg.h,v 1.1 1999/02/20 00:12:01 scw Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* Van Jacobson of Lawrence Berkeley Laboratory.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* @(#)siopreg.h 7.3 (Berkeley) 2/5/91
|
||||
*/
|
||||
|
||||
/*
|
||||
* NCR 53C710 SCSI interface hardware description.
|
||||
*
|
||||
* From the Mach scsi driver for the 53C700
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
/*00*/ volatile unsigned char siop_sien; /* rw: SCSI Interrupt Enable */
|
||||
/*01*/ volatile unsigned char siop_sdid; /* rw: SCSI Destination ID */
|
||||
/*02*/ volatile unsigned char siop_scntl1; /* rw: SCSI control reg 1 */
|
||||
/*03*/ volatile unsigned char siop_scntl0; /* rw: SCSI control reg 0 */
|
||||
/*04*/ volatile unsigned char siop_socl; /* rw: SCSI Output Control Latch */
|
||||
/*05*/ volatile unsigned char siop_sodl; /* rw: SCSI Output Data Latch */
|
||||
/*06*/ volatile unsigned char siop_sxfer; /* rw: SCSI Transfer reg */
|
||||
/*07*/ volatile unsigned char siop_scid; /* rw: SCSI Chip ID reg */
|
||||
/*08*/ volatile unsigned char siop_sbcl; /* ro: SCSI Bus Control Lines */
|
||||
/*09*/ volatile unsigned char siop_sbdl; /* ro: SCSI Bus Data Lines */
|
||||
/*0a*/ volatile unsigned char siop_sidl; /* ro: SCSI Input Data Latch */
|
||||
/*0b*/ volatile unsigned char siop_sfbr; /* ro: SCSI First Byte Received */
|
||||
/*0c*/ volatile unsigned char siop_sstat2; /* ro: SCSI status reg 2 */
|
||||
/*0d*/ volatile unsigned char siop_sstat1; /* ro: SCSI status reg 1 */
|
||||
/*0e*/ volatile unsigned char siop_sstat0; /* ro: SCSI status reg 0 */
|
||||
/*0f*/ volatile unsigned char siop_dstat; /* ro: DMA status */
|
||||
/*10*/ volatile unsigned long siop_dsa; /* rw: Data Structure Address */
|
||||
/*14*/ volatile unsigned char siop_ctest3; /* ro: Chip test register 3 */
|
||||
/*15*/ volatile unsigned char siop_ctest2; /* ro: Chip test register 2 */
|
||||
/*16*/ volatile unsigned char siop_ctest1; /* ro: Chip test register 1 */
|
||||
/*17*/ volatile unsigned char siop_ctest0; /* ro: Chip test register 0 */
|
||||
/*18*/ volatile unsigned char siop_ctest7; /* rw: Chip test register 7 */
|
||||
/*19*/ volatile unsigned char siop_ctest6; /* rw: Chip test register 6 */
|
||||
/*1a*/ volatile unsigned char siop_ctest5; /* rw: Chip test register 5 */
|
||||
/*1b*/ volatile unsigned char siop_ctest4; /* rw: Chip test register 4 */
|
||||
/*1c*/ volatile unsigned long siop_temp; /* rw: Temporary Stack reg */
|
||||
/*20*/ volatile unsigned char siop_lcrc; /* rw: LCRC value */
|
||||
/*21*/ volatile unsigned char siop_ctest8; /* rw: Chip test register 8 */
|
||||
/*22*/ volatile unsigned char siop_istat; /* rw: Interrupt Status reg */
|
||||
/*23*/ volatile unsigned char siop_dfifo; /* rw: DMA FIFO */
|
||||
/*24*/ volatile unsigned char siop_dcmd; /* rw: DMA Command Register */
|
||||
/*25*/ volatile unsigned char siop_dbc2; /* rw: DMA Byte Counter reg */
|
||||
/*26*/ volatile unsigned char siop_dbc1;
|
||||
/*27*/ volatile unsigned char siop_dbc0;
|
||||
/*28*/ volatile unsigned long siop_dnad; /* rw: DMA Next Address */
|
||||
/*2c*/ volatile unsigned long siop_dsp; /* rw: DMA SCRIPTS Pointer reg */
|
||||
/*30*/ volatile unsigned long siop_dsps; /* rw: DMA SCRIPTS Pointer Save reg */
|
||||
/*34*/ volatile unsigned long siop_scratch; /* rw: Scratch Register */
|
||||
/*38*/ volatile unsigned char siop_dcntl; /* rw: DMA Control reg */
|
||||
/*39*/ volatile unsigned char siop_dwt; /* rw: DMA Watchdog Timer */
|
||||
/*3a*/ volatile unsigned char siop_dien; /* rw: DMA Interrupt Enable */
|
||||
/*3b*/ volatile unsigned char siop_dmode; /* rw: DMA Mode reg */
|
||||
/*3c*/ volatile unsigned long siop_adder;
|
||||
|
||||
} siop_regmap_t;
|
||||
typedef volatile siop_regmap_t *siop_regmap_p;
|
||||
|
||||
/*
|
||||
* Register defines
|
||||
*/
|
||||
|
||||
/* Scsi control register 0 (scntl0) */
|
||||
|
||||
#define SIOP_SCNTL0_ARB 0xc0 /* Arbitration mode */
|
||||
# define SIOP_ARB_SIMPLE 0x00
|
||||
# define SIOP_ARB_FULL 0xc0
|
||||
#define SIOP_SCNTL0_START 0x20 /* Start Sequence */
|
||||
#define SIOP_SCNTL0_WATN 0x10 /* (Select) With ATN */
|
||||
#define SIOP_SCNTL0_EPC 0x08 /* Enable Parity Checking */
|
||||
#define SIOP_SCNTL0_EPG 0x04 /* Enable Parity Generation */
|
||||
#define SIOP_SCNTL0_AAP 0x02 /* Assert ATN on Parity Error */
|
||||
#define SIOP_SCNTL0_TRG 0x01 /* Target Mode */
|
||||
|
||||
/* Scsi control register 1 (scntl1) */
|
||||
|
||||
#define SIOP_SCNTL1_EXC 0x80 /* Extra Clock Cycle of data setup */
|
||||
#define SIOP_SCNTL1_ADB 0x40 /* Assert Data Bus */
|
||||
#define SIOP_SCNTL1_ESR 0x20 /* Enable Selection/Reselection */
|
||||
#define SIOP_SCNTL1_CON 0x10 /* Connected */
|
||||
#define SIOP_SCNTL1_RST 0x08 /* Assert RST */
|
||||
#define SIOP_SCNTL1_AESP 0x04 /* Assert even SCSI parity */
|
||||
#define SIOP_SCNTL1_RES0 0x02 /* Reserved */
|
||||
#define SIOP_SCNTL1_RES1 0x01 /* Reserved */
|
||||
|
||||
/* Scsi interrupt enable register (sien) */
|
||||
|
||||
#define SIOP_SIEN_M_A 0x80 /* Phase Mismatch or ATN active */
|
||||
#define SIOP_SIEN_FCMP 0x40 /* Function Complete */
|
||||
#define SIOP_SIEN_STO 0x20 /* (Re)Selection timeout */
|
||||
#define SIOP_SIEN_SEL 0x10 /* (Re)Selected */
|
||||
#define SIOP_SIEN_SGE 0x08 /* SCSI Gross Error */
|
||||
#define SIOP_SIEN_UDC 0x04 /* Unexpected Disconnect */
|
||||
#define SIOP_SIEN_RST 0x02 /* RST asserted */
|
||||
#define SIOP_SIEN_PAR 0x01 /* Parity Error */
|
||||
|
||||
/* Scsi chip ID (scid) */
|
||||
|
||||
#define SIOP_SCID_VALUE(i) (1<<i)
|
||||
|
||||
/* Scsi transfer register (sxfer) */
|
||||
|
||||
#define SIOP_SXFER_DHP 0x80 /* Disable Halt on Parity error/ ATN asserted */
|
||||
#define SIOP_SXFER_TP 0x70 /* Synch Transfer Period */
|
||||
/* see specs for formulas:
|
||||
Period = TCP * (4 + XFERP )
|
||||
TCP = 1 + CLK + 1..2;
|
||||
*/
|
||||
#define SIOP_SXFER_MO 0x0f /* Synch Max Offset */
|
||||
# define SIOP_MAX_OFFSET 8
|
||||
|
||||
/* Scsi output data latch register (sodl) */
|
||||
|
||||
/* Scsi output control latch register (socl) */
|
||||
|
||||
#define SIOP_REQ 0x80 /* SCSI signal <x> asserted */
|
||||
#define SIOP_ACK 0x40
|
||||
#define SIOP_BSY 0x20
|
||||
#define SIOP_SEL 0x10
|
||||
#define SIOP_ATN 0x08
|
||||
#define SIOP_MSG 0x04
|
||||
#define SIOP_CD 0x02
|
||||
#define SIOP_IO 0x01
|
||||
|
||||
#define SIOP_PHASE(socl) SCSI_PHASE(socl)
|
||||
|
||||
/* Scsi first byte received register (sfbr) */
|
||||
|
||||
/* Scsi input data latch register (sidl) */
|
||||
|
||||
/* Scsi bus data lines register (sbdl) */
|
||||
|
||||
/* Scsi bus control lines register (sbcl). Same as socl */
|
||||
|
||||
/* DMA status register (dstat) */
|
||||
|
||||
#define SIOP_DSTAT_DFE 0x80 /* DMA FIFO empty */
|
||||
#define SIOP_DSTAT_RES 0x40
|
||||
#define SIOP_DSTAT_BF 0x20 /* Bus fault */
|
||||
#define SIOP_DSTAT_ABRT 0x10 /* Aborted */
|
||||
#define SIOP_DSTAT_SSI 0x08 /* SCRIPT Single Step */
|
||||
#define SIOP_DSTAT_SIR 0x04 /* SCRIPT Interrupt Instruction */
|
||||
#define SIOP_DSTAT_WTD 0x02 /* Watchdog Timeout Detected */
|
||||
#define SIOP_DSTAT_IID 0x01 /* Invalid Instruction Detected */
|
||||
|
||||
/* Scsi status register 0 (sstat0) */
|
||||
|
||||
#define SIOP_SSTAT0_M_A 0x80 /* Phase Mismatch or ATN active */
|
||||
#define SIOP_SSTAT0_FCMP 0x40 /* Function Complete */
|
||||
#define SIOP_SSTAT0_STO 0x20 /* (Re)Selection timeout */
|
||||
#define SIOP_SSTAT0_SEL 0x10 /* (Re)Selected */
|
||||
#define SIOP_SSTAT0_SGE 0x08 /* SCSI Gross Error */
|
||||
#define SIOP_SSTAT0_UDC 0x04 /* Unexpected Disconnect */
|
||||
#define SIOP_SSTAT0_RST 0x02 /* RST asserted */
|
||||
#define SIOP_SSTAT0_PAR 0x01 /* Parity Error */
|
||||
|
||||
/* Scsi status register 1 (sstat1) */
|
||||
|
||||
#define SIOP_SSTAT1_ILF 0x80 /* Input latch (sidl) full */
|
||||
#define SIOP_SSTAT1_ORF 0x40 /* output reg (sodr) full */
|
||||
#define SIOP_SSTAT1_OLF 0x20 /* output latch (sodl) full */
|
||||
#define SIOP_SSTAT1_AIP 0x10 /* Arbitration in progress */
|
||||
#define SIOP_SSTAT1_LOA 0x08 /* Lost arbitration */
|
||||
#define SIOP_SSTAT1_WOA 0x04 /* Won arbitration */
|
||||
#define SIOP_SSTAT1_RST 0x02 /* SCSI RST current value */
|
||||
#define SIOP_SSTAT1_SDP 0x01 /* SCSI SDP current value */
|
||||
|
||||
/* Scsi status register 2 (sstat2) */
|
||||
|
||||
#define SIOP_SSTAT2_FF 0xf0 /* SCSI FIFO flags (bytecount) */
|
||||
# define SIOP_SCSI_FIFO_DEEP 8
|
||||
#define SIOP_SSTAT2_SDP 0x08 /* Latched (on REQ) SCSI SDP */
|
||||
#define SIOP_SSTAT2_MSG 0x04 /* Latched SCSI phase */
|
||||
#define SIOP_SSTAT2_CD 0x02
|
||||
#define SIOP_SSTAT2_IO 0x01
|
||||
|
||||
/* Chip test register 0 (ctest0) */
|
||||
|
||||
#define SIOP_CTEST0_RES0 0x80
|
||||
#define SIOP_CTEST0_BTD 0x40 /* Byte-to-byte Timer Disable */
|
||||
#define SIOP_CTEST0_GRP 0x20 /* Generate Receive Parity for Passthrough */
|
||||
#define SIOP_CTEST0_EAN 0x10 /* Enable Active Negation */
|
||||
#define SIOP_CTEST0_HSC 0x08 /* Halt SCSI clock */
|
||||
#define SIOP_CTEST0_ERF 0x04 /* Extend REQ/ACK Filtering */
|
||||
#define SIOP_CTEST0_RES1 0x02
|
||||
#define SIOP_CTEST0_DDIR 0x01 /* Xfer direction (1-> from SCSI bus) */
|
||||
|
||||
/* Chip test register 1 (ctest1) */
|
||||
|
||||
#define SIOP_CTEST1_FMT 0xf0 /* Byte empty in DMA FIFO bottom (high->byte3) */
|
||||
#define SIOP_CTEST1_FFL 0x0f /* Byte full in DMA FIFO top, same */
|
||||
|
||||
/* Chip test register 2 (ctest2) */
|
||||
|
||||
#define SIOP_CTEST2_RES 0x80
|
||||
#define SIOP_CTEST2_SIGP 0x40 /* Signal process */
|
||||
#define SIOP_CTEST2_SOFF 0x20 /* Synch Offset compare (1-> zero Init, max Tgt */
|
||||
#define SIOP_CTEST2_SFP 0x10 /* SCSI FIFO Parity */
|
||||
#define SIOP_CTEST2_DFP 0x08 /* DMA FIFO Parity */
|
||||
#define SIOP_CTEST2_TEOP 0x04 /* True EOP (a-la 5380) */
|
||||
#define SIOP_CTEST2_DREQ 0x02 /* DREQ status */
|
||||
#define SIOP_CTEST2_DACK 0x01 /* DACK status */
|
||||
|
||||
/* Chip test register 3 (ctest3) read-only, top of SCSI FIFO */
|
||||
|
||||
/* Chip test register 4 (ctest4) */
|
||||
|
||||
#define SIOP_CTEST4_MUX 0x80 /* Host bus multiplex mode */
|
||||
#define SIOP_CTEST4_ZMOD 0x40 /* High-impedance outputs */
|
||||
#define SIOP_CTEST4_SZM 0x20 /* ditto, SCSI "outputs" */
|
||||
#define SIOP_CTEST4_SLBE 0x10 /* SCSI loobpack enable */
|
||||
#define SIOP_CTEST4_SFWR 0x08 /* SCSI FIFO write enable (from sodl) */
|
||||
#define SIOP_CTEST4_FBL 0x07 /* DMA FIFO Byte Lane select (from ctest6)
|
||||
4->0, .. 7->3 */
|
||||
|
||||
/* Chip test register 5 (ctest5) */
|
||||
|
||||
#define SIOP_CTEST5_ADCK 0x80 /* Clock Address Incrementor */
|
||||
#define SIOP_CTEST5_BBCK 0x40 /* Clock Byte counter */
|
||||
#define SIOP_CTEST5_ROFF 0x20 /* Reset SCSI offset */
|
||||
#define SIOP_CTEST5_MASR 0x10 /* Master set/reset pulses (of bits 3-0) */
|
||||
#define SIOP_CTEST5_DDIR 0x08 /* (re)set internal DMA direction */
|
||||
#define SIOP_CTEST5_EOP 0x04 /* (re)set internal EOP */
|
||||
#define SIOP_CTEST5_DREQ 0x02 /* (re)set internal REQ */
|
||||
#define SIOP_CTEST5_DACK 0x01 /* (re)set internal ACK */
|
||||
|
||||
/* Chip test register 6 (ctest6) DMA FIFO access */
|
||||
|
||||
/* Chip test register 7 (ctest7) */
|
||||
|
||||
#define SIOP_CTEST7_CDIS 0x80 /* Cache burst disable */
|
||||
#define SIOP_CTEST7_SC1 0x40 /* Snoop control 1 */
|
||||
#define SIOP_CTEST7_SC0 0x20 /* Snoop contorl 0 */
|
||||
#define SIOP_CTEST7_STD 0x10 /* Selection timeout disable */
|
||||
#define SIOP_CTEST7_DFP 0x08 /* DMA FIFO parity bit */
|
||||
#define SIOP_CTEST7_EVP 0x04 /* Even parity (to host bus) */
|
||||
#define SIOP_CTEST7_TT1 0x02 /* Transfer type bit */
|
||||
#define SIOP_CTEST7_DIFF 0x01 /* Differential mode */
|
||||
|
||||
/* DMA FIFO register (dfifo) */
|
||||
|
||||
#define SIOP_DFIFO_RES 0x80
|
||||
#define SIOP_DFIFO_BO 0x7f /* FIFO byte offset counter */
|
||||
|
||||
/* Interrupt status register (istat) */
|
||||
|
||||
#define SIOP_ISTAT_ABRT 0x80 /* Abort operation */
|
||||
#define SIOP_ISTAT_RST 0x40 /* Software reset */
|
||||
#define SIOP_ISTAT_SIGP 0x20 /* Signal process */
|
||||
#define SIOP_ISTAT_RES 0x10
|
||||
#define SIOP_ISTAT_CON 0x08 /* Connected */
|
||||
#define SIOP_ISTAT_RES1 0x04
|
||||
#define SIOP_ISTAT_SIP 0x02 /* SCSI Interrupt pending */
|
||||
#define SIOP_ISTAT_DIP 0x01 /* DMA Interrupt pending */
|
||||
|
||||
/* Chip test register 8 (ctest8) */
|
||||
|
||||
#define SIOP_CTEST8_V 0xf0 /* Chip revision level */
|
||||
#define SIOP_CTEST8_FLF 0x08 /* Flush DMA FIFO */
|
||||
#define SIOP_CTEST8_CLF 0x04 /* Clear DMA and SCSI FIFOs */
|
||||
#define SIOP_CTEST8_FM 0x02 /* Fetch pin mode */
|
||||
#define SIOP_CTEST8_SM 0x01 /* Snoop pins mode */
|
||||
|
||||
/* DMA Mode register (dmode) */
|
||||
|
||||
#define SIOP_DMODE_BL_MASK 0xc0 /* 0->1 1->2 2->4 3->8 */
|
||||
#define SIOP_DMODE_FC 0x30 /* Function code */
|
||||
#define SIOP_DMODE_PD 0x08 /* Program/data */
|
||||
#define SIOP_DMODE_FAM 0x04 /* Fixed address mode */
|
||||
#define SIOP_DMODE_U0 0x02 /* User programmable transfer type */
|
||||
#define SIOP_DMODE_MAN 0x01 /* Manual start mode */
|
||||
|
||||
/* DMA interrupt enable register (dien) */
|
||||
|
||||
#define SIOP_DIEN_RES 0xc0
|
||||
#define SIOP_DIEN_BF 0x20 /* On Bus Fault */
|
||||
#define SIOP_DIEN_ABRT 0x10 /* On Abort */
|
||||
#define SIOP_DIEN_SSI 0x08 /* On SCRIPTS sstep */
|
||||
#define SIOP_DIEN_SIR 0x04 /* On SCRIPTS intr instruction */
|
||||
#define SIOP_DIEN_WTD 0x02 /* On watchdog timeout */
|
||||
#define SIOP_DIEN_IID 0x01 /* On illegal instruction detected */
|
||||
|
||||
/* DMA control register (dcntl) */
|
||||
|
||||
#define SIOP_DCNTL_CF_MASK 0xc0 /* Clock frequency dividers:
|
||||
0 --> 37.51..50.00 Mhz, div=2
|
||||
1 --> 25.01..37.50 Mhz, div=1.5
|
||||
2 --> 16.67..25.00 Mhz, div=1
|
||||
3 --> 50.01..66.67 Mhz, div=3
|
||||
*/
|
||||
#define SIOP_DCNTL_EA 0x20 /* Enable ack */
|
||||
#define SIOP_DCNTL_SSM 0x10 /* Single step mode */
|
||||
#define SIOP_DCNTL_LLM 0x08 /* Enable SCSI Low-level mode */
|
||||
#define SIOP_DCNTL_STD 0x04 /* Start DMA operation */
|
||||
#define SIOP_DCNTL_FA 0x02 /* Fast arbitration */
|
||||
#define SIOP_DCNTL_COM 0x01 /* 53C700 compatibility */
|
||||
@ -1,205 +0,0 @@
|
||||
/* $NetBSD: siopvar.h,v 1.3 2001/04/25 17:53:17 bouyer Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* Van Jacobson of Lawrence Berkeley Laboratory.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* @(#)siopvar.h 7.1 (Berkeley) 5/8/90
|
||||
*/
|
||||
#ifndef _SIOPVAR_H_
|
||||
#define _SIOPVAR_H_
|
||||
|
||||
/*
|
||||
* The largest single request will be MAXPHYS bytes which will require
|
||||
* at most MAXPHYS/NBPG+1 chain elements to describe, i.e. if none of
|
||||
* the buffer pages are physically contiguous (MAXPHYS/NBPG) and the
|
||||
* buffer is not page aligned (+1).
|
||||
*/
|
||||
#define DMAMAXIO ((MAXPHYS/NBPG)+1)
|
||||
|
||||
/*
|
||||
* Data Structure for SCRIPTS program
|
||||
*/
|
||||
struct siop_ds {
|
||||
long scsi_addr; /* SCSI ID & sync */
|
||||
long idlen; /* Identify message */
|
||||
char *idbuf;
|
||||
long cmdlen; /* SCSI command */
|
||||
char *cmdbuf;
|
||||
long stslen; /* Status */
|
||||
char *stsbuf;
|
||||
long msglen; /* Message */
|
||||
char *msgbuf;
|
||||
long msginlen; /* Message in */
|
||||
char *msginbuf;
|
||||
long extmsglen; /* Extended message in */
|
||||
char *extmsgbuf;
|
||||
long synmsglen; /* Sync transfer request */
|
||||
char *synmsgbuf;
|
||||
struct {
|
||||
long datalen;
|
||||
char *databuf;
|
||||
} chain[DMAMAXIO];
|
||||
};
|
||||
|
||||
/*
|
||||
* ACB. Holds additional information for each SCSI command Comments: We
|
||||
* need a separate scsi command block because we may need to overwrite it
|
||||
* with a request sense command. Basicly, we refrain from fiddling with
|
||||
* the scsi_xfer struct (except do the expected updating of return values).
|
||||
* We'll generally update: xs->{flags,resid,error,sense,status} and
|
||||
* occasionally xs->retries.
|
||||
*/
|
||||
struct siop_acb {
|
||||
TAILQ_ENTRY(siop_acb) chain;
|
||||
struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */
|
||||
int flags; /* Status */
|
||||
#define ACB_FREE 0x00
|
||||
#define ACB_ACTIVE 0x01
|
||||
#define ACB_DONE 0x04
|
||||
struct scsi_generic cmd; /* SCSI command block */
|
||||
struct siop_ds ds;
|
||||
void *iob_buf;
|
||||
u_long iob_curbuf;
|
||||
u_long iob_len, iob_curlen;
|
||||
u_char msgout[6];
|
||||
u_char msg[6];
|
||||
u_char stat[1];
|
||||
u_char status;
|
||||
u_char dummy[2];
|
||||
int clen;
|
||||
char *daddr; /* Saved data pointer */
|
||||
int dleft; /* Residue */
|
||||
};
|
||||
|
||||
/*
|
||||
* Some info about each (possible) target on the SCSI bus. This should
|
||||
* probably have been a "per target+lunit" structure, but we'll leave it at
|
||||
* this for now. Is there a way to reliably hook it up to sc->fordriver??
|
||||
*/
|
||||
struct siop_tinfo {
|
||||
int cmds; /* #commands processed */
|
||||
int dconns; /* #disconnects */
|
||||
int touts; /* #timeouts */
|
||||
int perrs; /* #parity errors */
|
||||
ushort lubusy; /* What local units/subr. are busy? */
|
||||
u_char flags;
|
||||
u_char period; /* Period suggestion */
|
||||
u_char offset; /* Offset suggestion */
|
||||
} tinfo_t;
|
||||
|
||||
struct siop_softc {
|
||||
struct device sc_dev;
|
||||
|
||||
u_char sc_istat;
|
||||
u_char sc_dstat;
|
||||
u_char sc_sstat0;
|
||||
u_char sc_sstat1;
|
||||
u_long sc_intcode;
|
||||
struct scsipi_channel sc_channel;
|
||||
struct scsipi_adapter sc_adapter;
|
||||
u_long sc_scriptspa; /* physical address of scripts */
|
||||
siop_regmap_p sc_siopp; /* the SIOP */
|
||||
u_long sc_active; /* number of active I/O's */
|
||||
|
||||
/* Lists of command blocks */
|
||||
TAILQ_HEAD(acb_list, siop_acb) free_list,
|
||||
ready_list,
|
||||
nexus_list;
|
||||
|
||||
struct siop_acb *sc_nexus; /* current command */
|
||||
#define SIOP_NACB 8
|
||||
struct siop_acb *sc_acb; /* the real command blocks */
|
||||
struct siop_tinfo sc_tinfo[8];
|
||||
|
||||
u_short sc_clock_freq;
|
||||
u_char sc_dcntl;
|
||||
u_char sc_ctest7;
|
||||
u_short sc_tcp[4];
|
||||
u_char sc_flags;
|
||||
u_char sc_sien;
|
||||
u_char sc_dien;
|
||||
u_char sc_minsync;
|
||||
/* one for each target */
|
||||
struct syncpar {
|
||||
u_char state;
|
||||
u_char sxfer;
|
||||
u_char sbcl;
|
||||
} sc_sync[8];
|
||||
};
|
||||
|
||||
/* sc_flags */
|
||||
#define SIOP_INTSOFF 0x80 /* Interrupts turned off */
|
||||
#define SIOP_INTDEFER 0x40 /* Level 6 interrupt has been deferred */
|
||||
#define SIOP_ALIVE 0x01 /* controller initialized */
|
||||
#define SIOP_SELECTED 0x04 /* bus is in selected state. Needed for
|
||||
correct abort procedure. */
|
||||
|
||||
/* sync states */
|
||||
#define SYNC_START 0 /* no sync handshake started */
|
||||
#define SYNC_SENT 1 /* we sent sync request, no answer yet */
|
||||
#define SYNC_DONE 2 /* target accepted our (or inferior) settings,
|
||||
or it rejected the request and we stay async */
|
||||
|
||||
#define MSG_CMD_COMPLETE 0x00
|
||||
#define MSG_EXT_MESSAGE 0x01
|
||||
#define MSG_SAVE_DATA_PTR 0x02
|
||||
#define MSG_RESTORE_PTR 0x03
|
||||
#define MSG_DISCONNECT 0x04
|
||||
#define MSG_INIT_DETECT_ERROR 0x05
|
||||
#define MSG_ABORT 0x06
|
||||
#define MSG_REJECT 0x07
|
||||
#define MSG_NOOP 0x08
|
||||
#define MSG_PARITY_ERROR 0x09
|
||||
#define MSG_BUS_DEVICE_RESET 0x0C
|
||||
#define MSG_IDENTIFY 0x80
|
||||
#define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */
|
||||
#define MSG_SYNC_REQ 0x01
|
||||
|
||||
#define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */
|
||||
#define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */
|
||||
#define STS_BUSY 0x08
|
||||
#define STS_INTERMED 0x10 /* Intermediate status sent */
|
||||
#define STS_EXT 0x80 /* Extended status valid */
|
||||
|
||||
void siop_minphys __P((struct buf *bp));
|
||||
void siop_scsi_request __P((struct scsipi_channel *,
|
||||
scsipi_adapter_req_t, void *));
|
||||
void siopinitialize __P((struct siop_softc *));
|
||||
void siopintr __P((struct siop_softc *));
|
||||
#ifdef DEBUG
|
||||
void siop_dump __P((struct siop_softc *));
|
||||
#endif
|
||||
|
||||
#endif /* _SIOPVAR_H */
|
||||
Loading…
Reference in New Issue
Block a user