Disgusting Xbox hack;
The "pci0 dev 1 function 2" aka "System Management" on the nForce chipset isn't detected on the Xbox. If XBOX is defined and arch_i386_is_xbox is true, force intrline to 12 and map the system management IO space at 0x8000. We can now call iic_smbus_intr when a system management interrupt takes place. While we're here, make amdpm_smbus honour the I2C_F_POLL flag. The Xbox no longer resets when you press the eject button.
This commit is contained in:
parent
02ad924a21
commit
ff20668913
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@ -1,4 +1,4 @@
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/* $NetBSD: amdpm.c,v 1.24 2007/01/06 20:25:01 jmcneill Exp $ */
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/* $NetBSD: amdpm.c,v 1.25 2007/02/05 23:38:15 jmcneill Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amdpm.c,v 1.24 2007/01/06 20:25:01 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amdpm.c,v 1.25 2007/02/05 23:38:15 jmcneill Exp $");
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#include "opt_amdpm.h"
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@ -115,6 +115,7 @@ amdpm_attach(struct device *parent, struct device *self, void *aux)
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sc->sc_pc = pa->pa_pc;
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sc->sc_tag = pa->pa_tag;
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sc->sc_iot = pa->pa_iot;
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sc->sc_pa = pa;
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#if 0
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aprint_normal("%s: ", sc->sc_dev.dv_xname);
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@ -169,8 +170,9 @@ amdpm_attach(struct device *parent, struct device *self, void *aux)
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/* try to attach devices on the smbus */
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if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_PBC8111_ACPI ||
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sc->sc_nforce)
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sc->sc_nforce) {
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amdpm_smbus_attach(sc);
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}
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if (confreg & AMDPM_RNGEN) {
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/* Check to see if we can read data from the RNG. */
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@ -1,4 +1,4 @@
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/* $NetBSD: amdpm_smbus.c,v 1.9 2007/01/06 02:16:22 jmcneill Exp $ */
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/* $NetBSD: amdpm_smbus.c,v 1.10 2007/02/05 23:38:15 jmcneill Exp $ */
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/*
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* Copyright (c) 2005 Anil Gopinath (anil_public@yahoo.com)
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@ -32,7 +32,7 @@
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* AMD-8111 HyperTransport I/O Hub
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amdpm_smbus.c,v 1.9 2007/01/06 02:16:22 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amdpm_smbus.c,v 1.10 2007/02/05 23:38:15 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -51,24 +51,35 @@ __KERNEL_RCSID(0, "$NetBSD: amdpm_smbus.c,v 1.9 2007/01/06 02:16:22 jmcneill Exp
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#include <dev/pci/amdpm_smbusreg.h>
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#ifdef __i386__
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#include "opt_xbox.h"
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#endif
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#ifdef XBOX
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extern int arch_i386_is_xbox;
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#endif
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static int amdpm_smbus_acquire_bus(void *cookie, int flags);
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static void amdpm_smbus_release_bus(void *cookie, int flags);
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static int amdpm_smbus_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
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const void *cmd, size_t cmdlen, void *vbuf,
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size_t buflen, int flags);
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static int amdpm_smbus_check_done(struct amdpm_softc *sc);
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static int amdpm_smbus_check_done(struct amdpm_softc *sc, i2c_op_t op);
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static void amdpm_smbus_clear_gsr(struct amdpm_softc *sc);
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static u_int16_t amdpm_smbus_get_gsr(struct amdpm_softc *sc);
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static int amdpm_smbus_send_1(struct amdpm_softc *sc, u_int8_t val);
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static int amdpm_smbus_write_1(struct amdpm_softc *sc, u_int8_t cmd, u_int8_t data);
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static int amdpm_smbus_receive_1(struct amdpm_softc *sc);
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static int amdpm_smbus_read_1(struct amdpm_softc *sc, u_int8_t cmd);
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static int amdpm_smbus_send_1(struct amdpm_softc *sc, u_int8_t val, i2c_op_t op);
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static int amdpm_smbus_write_1(struct amdpm_softc *sc, u_int8_t cmd, u_int8_t data, i2c_op_t op);
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static int amdpm_smbus_receive_1(struct amdpm_softc *sc, i2c_op_t op);
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static int amdpm_smbus_read_1(struct amdpm_softc *sc, u_int8_t cmd, i2c_op_t op);
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static int amdpm_smbus_intr(void *);
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void
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amdpm_smbus_attach(struct amdpm_softc *sc)
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{
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struct i2cbus_attach_args iba;
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pci_intr_handle_t ih;
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const char *intrstr;
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/* register with iic */
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sc->sc_i2c.ic_cookie = sc;
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@ -83,10 +94,58 @@ amdpm_smbus_attach(struct amdpm_softc *sc)
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lockinit(&sc->sc_lock, PZERO, "amdpm_smbus", 0, 0);
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#ifdef XBOX
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#define XBOX_SMBA 0x8000
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#define XBOX_SMSIZE 256
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#define XBOX_INTRLINE 12
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/* XXX pci0 dev 1 function 2 "System Management" doesn't probe */
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if (arch_i386_is_xbox) {
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sc->sc_pa->pa_intrline = XBOX_INTRLINE;
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if (bus_space_map(sc->sc_iot, XBOX_SMBA, XBOX_SMSIZE,
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0, &sc->sc_sm_ioh) == 0)
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aprint_normal("%s: system management at 0x%04x\n",
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sc->sc_dev.dv_xname, XBOX_SMBA);
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}
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if (pci_intr_map(sc->sc_pa, &ih))
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aprint_error("%s: couldn't map interrupt\n",
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sc->sc_dev.dv_xname);
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else {
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intrstr = pci_intr_string(sc->sc_pc, ih);
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sc->sc_ih = pci_intr_establish(sc->sc_pc, ih, IPL_BIO,
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amdpm_smbus_intr, sc);
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if (sc->sc_ih != NULL)
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aprint_normal("%s: interrupting at %s\n",
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sc->sc_dev.dv_xname, intrstr);
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}
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#endif
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iba.iba_tag = &sc->sc_i2c;
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(void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
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}
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static int
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amdpm_smbus_intr(void *cookie)
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{
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#ifdef XBOX
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struct amdpm_softc *sc;
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uint32_t status;
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sc = (struct amdpm_softc *)cookie;
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if (arch_i386_is_xbox) {
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status = bus_space_read_4(sc->sc_iot, sc->sc_sm_ioh, 0x20);
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bus_space_write_4(sc->sc_iot, sc->sc_sm_ioh, 0x20, status);
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if (status & 2)
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return iic_smbus_intr(&sc->sc_i2c);
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}
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#endif
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return 0;
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}
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static int
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amdpm_smbus_acquire_bus(void *cookie, int flags)
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{
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int rv;
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if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
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rv = amdpm_smbus_receive_1(sc);
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rv = amdpm_smbus_receive_1(sc, op);
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if (rv == -1)
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return -1;
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*p = (u_int8_t)rv;
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}
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if ( (I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
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rv = amdpm_smbus_read_1(sc, *(const uint8_t*)cmd);
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rv = amdpm_smbus_read_1(sc, *(const uint8_t*)cmd, op);
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if (rv == -1)
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return -1;
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*p = (u_int8_t)rv;
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}
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if ( (I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1)) {
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return amdpm_smbus_send_1(sc, *(uint8_t*)vbuf);
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return amdpm_smbus_send_1(sc, *(uint8_t*)vbuf, op);
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}
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if ( (I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1)) {
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return amdpm_smbus_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf);
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return amdpm_smbus_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf, op);
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}
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return (-1);
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}
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static int
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amdpm_smbus_check_done(struct amdpm_softc *sc)
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amdpm_smbus_check_done(struct amdpm_softc *sc, i2c_op_t op)
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{
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int i = 0;
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for (i = 0; i < 1000; i++) {
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if (data & AMDPM_8111_GSR_CYCLE_DONE) {
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return (0);
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}
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if (!(op & I2C_F_POLL))
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delay(1);
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}
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return (-1);
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}
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static int
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amdpm_smbus_send_1(struct amdpm_softc *sc, u_int8_t val)
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amdpm_smbus_send_1(struct amdpm_softc *sc, u_int8_t val, i2c_op_t op)
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{
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u_int16_t data = 0;
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int off = (sc->sc_nforce ? 0xe0 : 0);
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AMDPM_8111_SMBUS_CTRL - off,
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AMDPM_8111_SMBUS_GSR_SB);
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return(amdpm_smbus_check_done(sc));
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return(amdpm_smbus_check_done(sc, op));
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}
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static int
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amdpm_smbus_write_1(struct amdpm_softc *sc, u_int8_t cmd, u_int8_t val)
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amdpm_smbus_write_1(struct amdpm_softc *sc, u_int8_t cmd, u_int8_t val, i2c_op_t op)
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{
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u_int16_t data = 0;
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int off = (sc->sc_nforce ? 0xe0 : 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh,
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AMDPM_8111_SMBUS_CTRL - off, AMDPM_8111_SMBUS_GSR_WB);
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return (amdpm_smbus_check_done(sc));
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return (amdpm_smbus_check_done(sc, op));
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}
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static int
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amdpm_smbus_receive_1(struct amdpm_softc *sc)
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amdpm_smbus_receive_1(struct amdpm_softc *sc, i2c_op_t op)
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{
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u_int16_t data = 0;
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int off = (sc->sc_nforce ? 0xe0 : 0);
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AMDPM_8111_SMBUS_CTRL - off, AMDPM_8111_SMBUS_GSR_RXB);
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/* check for errors */
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if (amdpm_smbus_check_done(sc) < 0)
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if (amdpm_smbus_check_done(sc, op) < 0)
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return (-1);
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/* read data */
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}
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static int
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amdpm_smbus_read_1(struct amdpm_softc *sc, u_int8_t cmd)
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amdpm_smbus_read_1(struct amdpm_softc *sc, u_int8_t cmd, i2c_op_t op)
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{
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u_int16_t data = 0;
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u_int8_t ret;
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AMDPM_8111_SMBUS_CTRL - off, AMDPM_8111_SMBUS_GSR_RB);
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/* check for errors */
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if (amdpm_smbus_check_done(sc) < 0)
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if (amdpm_smbus_check_done(sc, op) < 0)
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return (-1);
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/* store data */
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@ -1,4 +1,4 @@
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/* $NetBSD: amdpmvar.h,v 1.3 2007/01/06 00:14:21 jmcneill Exp $ */
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/* $NetBSD: amdpmvar.h,v 1.4 2007/02/05 23:38:15 jmcneill Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_tag;
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struct pci_attach_args *sc_pa;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh; /* PMxx space */
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bus_space_handle_t sc_sm_ioh; /* SM space */
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i2c_addr_t sc_smbus_slaveaddr; /* address of smbus slave */
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struct i2c_controller sc_i2c; /* i2c controller info */
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struct lock sc_lock;
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void *sc_ih;
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struct callout sc_rnd_ch;
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rndsource_element_t sc_rnd_source;
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#ifdef AMDPM_RND_COUNTERS
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