Reorganize APbus zs(4) console handling.
- set sccport0a address on early startup and use it for cnputc and cngetc - explicitly initialize zs chip in the cninit function so that zs console can be used even if it is not initialized by PROM firmware Tested on both news50000 and news4000.
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tsutsui
parent
4fb003510a
commit
fc7b0964cf
@ -1,4 +1,4 @@
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/* $NetBSD: zs_ap.c,v 1.29 2018/10/14 00:10:11 tsutsui Exp $ */
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/* $NetBSD: zs_ap.c,v 1.30 2018/10/19 13:40:33 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -38,7 +38,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: zs_ap.c,v 1.29 2018/10/14 00:10:11 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: zs_ap.c,v 1.30 2018/10/19 13:40:33 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -138,12 +138,14 @@ struct zschan {
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static void *zsaddr[NZS];
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/* Flags from cninit() */
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static int zs_hwflags[NZS][2];
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/* Default speed for all channels */
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static int zs_defspeed = 9600;
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/* console status from cninit */
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static struct zs_chanstate zs_ap_conschan_store;
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static struct zs_chanstate *zs_ap_conschan;
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static struct zschan *zc_ap_cons;
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static uint8_t zs_init_reg[16] = {
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0, /* 0: CMD (reset, etc.) */
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0, /* 1: No interrupts yet. */
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@ -157,7 +159,7 @@ static uint8_t zs_init_reg[16] = {
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ZSWR9_MASTER_IE,
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0, /*10: Misc. TX/RX control bits */
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ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
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((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
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BPS_TO_TCONST(PCLK/16,9600), /*12: BAUDLO (default=9600) */
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0, /*13: BAUDHI (default=9600) */
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ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
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ZSWR15_BREAK_IE,
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@ -334,7 +336,6 @@ zs_ap_attach(device_t parent, device_t self, void *aux)
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*/
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for (channel = 0; channel < 2; channel++) {
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zsc_args.channel = channel;
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zsc_args.hwflags = zs_hwflags[zs_unit][channel];
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cs = &zsc->zsc_cs_store[channel];
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zsc->zsc_cs[channel] = cs;
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@ -345,18 +346,19 @@ zs_ap_attach(device_t parent, device_t self, void *aux)
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cs->cs_brg_clk = PCLK / 16;
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zc = zs_get_chan_addr(zs_unit, channel);
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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memcpy(cs->cs_creg, zs_init_reg, 16);
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memcpy(cs->cs_preg, zs_init_reg, 16);
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/* XXX: Get these from the EEPROM instead? */
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/* XXX: See the mvme167 code. Better. */
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if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
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cs->cs_defspeed = zs_get_speed(cs);
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else
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if (zc == zc_ap_cons) {
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memcpy(cs, zs_ap_conschan, sizeof(struct zs_chanstate));
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zs_ap_conschan = cs;
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zsc_args.hwflags = ZS_HWFLAG_CONSOLE;
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} else {
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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memcpy(cs->cs_creg, zs_init_reg, 16);
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memcpy(cs->cs_preg, zs_init_reg, 16);
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cs->cs_defspeed = zs_defspeed;
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zsc_args.hwflags = 0;
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}
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cs->cs_defcflag = zs_def_cflag;
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/* Make these correspond to cs_defcflag (-crtscts) */
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@ -534,21 +536,47 @@ static void
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zscninit(struct consdev *cn)
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{
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extern const struct cdevsw zstty_cdevsw;
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struct zs_chanstate *cs;
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u_int tconst;
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/* Wait a while for PROM console output to complete */
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DELAY(20000);
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cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
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cn->cn_pri = CN_REMOTE;
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zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
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zc_ap_cons = sccport0a;
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zs_delay = zs_ap_delay;
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zs_ap_conschan = cs = &zs_ap_conschan_store;
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/* Setup temporary chanstate. */
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cs->cs_reg_csr = &zc_ap_cons->zc_csr;
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cs->cs_reg_data = &zc_ap_cons->zc_data;
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/* Initialize the pending registers. */
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memcpy(cs->cs_preg, zs_init_reg, 16);
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cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_brg_clk = PCLK / 16;
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cs->cs_defspeed = 9600; /* PROM use 9600 bps */
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tconst = BPS_TO_TCONST(cs->cs_brg_clk, cs->cs_defspeed);
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cs->cs_preg[12] = tconst;
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cs->cs_preg[13] = tconst >> 8;
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/* Clear the master interrupt enable. */
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zs_write_reg(cs, 9, 0);
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/* Reset the whole SCC chip. */
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zs_write_reg(cs, 9, ZSWR9_HARD_RESET);
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/* Copy "pending" to "current" and H/W */
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zs_loadchannelregs(cs);
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}
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static int
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zscngetc(dev_t dev)
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{
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void *sccport0a;
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if (systype == NEWS5000)
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sccport0a = (void *)NEWS5000_SCCPORT0A;
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if (systype == NEWS4000)
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sccport0a = (void *)NEWS4000_SCCPORT0A;
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return zs_getc(sccport0a);
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}
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@ -556,12 +584,6 @@ zscngetc(dev_t dev)
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static void
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zscnputc(dev_t dev, int c)
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{
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void *sccport0a;
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if (systype == NEWS5000)
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sccport0a = (void *)NEWS5000_SCCPORT0A;
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if (systype == NEWS4000)
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sccport0a = (void *)NEWS4000_SCCPORT0A;
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zs_putc(sccport0a, c);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: apbus.h,v 1.6 2018/10/14 00:10:11 tsutsui Exp $ */
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/* $NetBSD: apbus.h,v 1.7 2018/10/19 13:40:33 tsutsui Exp $ */
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/*-
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* Copyright (C) 1999 SHIMIZU Ryo. All rights reserved.
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@ -104,6 +104,7 @@ struct apbus_sysinfo {
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extern struct apbus_sysinfo *_sip;
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extern volatile uint32_t *news_wbflush;
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extern void *sccport0a;
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void apbus_wbflush(void);
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#endif /* !__MACHINE_APBUS__ */
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.120 2018/10/14 00:10:11 tsutsui Exp $ */
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/* $NetBSD: machdep.c,v 1.121 2018/10/19 13:40:33 tsutsui Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -39,7 +39,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.120 2018/10/14 00:10:11 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.121 2018/10/19 13:40:33 tsutsui Exp $");
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/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
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@ -111,6 +111,7 @@ struct vm_map *phys_map = NULL;
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char *bootinfo = NULL; /* pointer to bootinfo structure */
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int systype; /* what type of NEWS we are */
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struct apbus_sysinfo *_sip = NULL;
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void *sccport0a;
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phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
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int mem_cluster_cnt;
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@ -194,6 +195,12 @@ mach_init(int x_boothowto, int x_bootdev, int x_bootname, int x_maxmem)
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if (systype == 0)
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systype = NEWS3400; /* XXX compatibility for old boot */
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#ifdef news3400
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if (systype == NEWS3400) {
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sccport0a = (void *)SCCPORT0A;
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}
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#endif
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#if defined(news5000) || defined(news4000)
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if (systype == NEWS5000 || systype == NEWS4000) {
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int i;
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@ -224,6 +231,8 @@ mach_init(int x_boothowto, int x_bootdev, int x_bootname, int x_maxmem)
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x_bootdev |= (i << 8); /* partition */
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}
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bootspec_end:
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sccport0a = (systype == NEWS5000) ?
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(void *)NEWS5000_SCCPORT0A : (void *)NEWS4000_SCCPORT0A;
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consinit();
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}
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#endif /* news5000 || news4000 */
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