- Hide MachHitFlushDCache() symbol by enclosing #ifdef MIPS3 to make

compilable with MIPS1 only configuration.
- MIPS3 virtually addressed cache op can do its work in a single call for
range of address space.

sys/arch/pmax/pmax/bus_dma.c

@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_dma.c,v 1.24 2000/09/28 03:19:12 mhitch Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.25 2000/10/02 22:56:51 nisimura Exp $	*/
 
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -478,10 +478,14 @@ _bus_dmamap_sync(t, map, offset, len, ops)
 	 * for the appropriate offset, and flush the D-cache
 	 * at that physical address.
 	 *
-	 * The R4000 has a virtually indexed primary data cache.  We
-	 * do the same loop, instead using the virtual address stashed
-	 * away in the segments when the map was loaded.
+	 * The R4000 has a virtually indexed data cache.  Make sure
+	 * both of primary and secodary cache flushed.
 	 */
+#ifdef MIPS3
+	if (CPUISMIPS3)
+		MachHitFlushDCache(map->dm_segs[0]._ds_vaddr + offset, len);
+	else
+#endif
 	for (i = 0; i < map->dm_nsegs && len != 0; i++) {
 		/* Find the beginning segment. */
 		if (offset >= map->dm_segs[i].ds_len) {
@@ -497,9 +501,6 @@ _bus_dmamap_sync(t, map, offset, len, ops)
 		minlen = len < map->dm_segs[i].ds_len - offset ?
 		    len : map->dm_segs[i].ds_len - offset;
 
-		if (CPUISMIPS3)
-			addr = map->dm_segs[i]._ds_vaddr;
-		else
 		addr = map->dm_segs[i].ds_addr;
 
 #ifdef BUS_DMA_DEBUG
@@ -507,16 +508,12 @@ _bus_dmamap_sync(t, map, offset, len, ops)
 		    "(0x%lx..0x%lx) ...", i, addr + offset,
 		    addr + offset + minlen - 1);
 #endif
-		if (CPUISMIPS3)
-			MachHitFlushDCache(addr + offset, minlen);
-		else {
 		/*
 		 * We can't have a TLB miss; use KSEG0.
 		 */
 		MachFlushDCache(
 		  MIPS_PHYS_TO_KSEG0(map->dm_segs[i].ds_addr + offset),
 		  minlen);
-		}
 #ifdef BUS_DMA_DEBUG
 		printf("\n");
 #endif