Make compile.
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@ -1,4 +1,4 @@
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/* $NetBSD: plcom.c,v 1.24 2007/11/19 18:51:39 ad Exp $ */
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/* $NetBSD: plcom.c,v 1.25 2008/01/05 12:40:34 ad Exp $ */
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/*-
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* Copyright (c) 2001 ARM Ltd
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@ -101,7 +101,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.24 2007/11/19 18:51:39 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.25 2008/01/05 12:40:34 ad Exp $");
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#include "opt_plcom.h"
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#include "opt_ddb.h"
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@ -144,9 +144,8 @@ __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.24 2007/11/19 18:51:39 ad Exp $");
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#include <sys/timepps.h>
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#include <sys/vnode.h>
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#include <sys/kauth.h>
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#include <machine/intr.h>
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#include <machine/bus.h>
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#include <sys/intr.h>
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#include <sys/bus.h>
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#include <evbarm/dev/plcomreg.h>
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#include <evbarm/dev/plcomvar.h>
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@ -443,7 +442,7 @@ plcom_attach_subr(struct plcom_softc *sc)
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}
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#endif
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sc->sc_si = softintr_establish(IPL_SOFTSERIAL, plcomsoft, sc);
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sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc);
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#if NRND > 0 && defined(RND_COM)
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rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
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@ -500,7 +499,7 @@ plcom_detach(self, flags)
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ttyfree(sc->sc_tty);
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/* Unhook the soft interrupt handler. */
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softintr_disestablish(sc->sc_si);
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softint_disestablish(sc->sc_si);
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#if NRND > 0 && defined(RND_COM)
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/* Unhook the entropy source. */
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@ -1001,7 +1000,7 @@ plcom_schedrx(struct plcom_softc *sc)
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sc->sc_rx_ready = 1;
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/* Wake up the poller. */
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softintr_schedule(sc->sc_si);
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softint_schedule(sc->sc_si);
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}
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void
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@ -1927,7 +1926,7 @@ plcomintr(void *arg)
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PLCOM_UNLOCK(sc);
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/* Wake up the poller. */
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softintr_schedule(sc->sc_si);
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softint_schedule(sc->sc_si);
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#if NRND > 0 && defined(RND_COM)
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rnd_add_uint32(&sc->rnd_source, iir | rsr);
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@ -1,4 +1,4 @@
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/* $NetBSD: plcomvar.h,v 1.5 2007/10/17 19:54:11 garbled Exp $ */
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/* $NetBSD: plcomvar.h,v 1.6 2008/01/05 12:40:34 ad Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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@ -42,7 +42,7 @@
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#include <sys/callout.h>
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#include <sys/timepps.h>
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#include <sys/lock.h>
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#include <sys/simplelock.h>
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int plcomcnattach (bus_space_tag_t, bus_addr_t, int, int, tcflag_t, int);
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void plcomcndetach (void);
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@ -1,4 +1,4 @@
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/* $NetBSD: ifpga_intr.c,v 1.5 2006/11/24 21:20:05 wiz Exp $ */
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/* $NetBSD: ifpga_intr.c,v 1.6 2008/01/05 12:40:34 ad Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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@ -46,12 +46,11 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/intr.h>
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#include <uvm/uvm_extern.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/cpufunc.h>
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#include <evbarm/ifpga/ifpgareg.h>
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@ -81,8 +80,8 @@ uint32_t intr_steer;
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* ever used in future steppings).
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*/
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static const uint32_t si_to_irqbit[SI_NQUEUES] = {
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IFPGA_INTR_bit31, /* SI_SOFT */
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IFPGA_INTR_bit30, /* SI_SOFTCLOCK */
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IFPGA_INTR_bit31, /* SI_SOFTCLOCK */
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IFPGA_INTR_bit30, /* SI_SOFTBIO */
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IFPGA_INTR_bit29, /* SI_SOFTNET */
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IFPGA_INTR_bit28, /* SI_SOFTSERIAL */
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};
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@ -93,8 +92,8 @@ static const uint32_t si_to_irqbit[SI_NQUEUES] = {
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* Map a software interrupt queue to an interrupt priority level.
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*/
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static const int si_to_ipl[SI_NQUEUES] = {
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IPL_SOFT, /* SI_SOFT */
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IPL_SOFTCLOCK, /* SI_SOFTCLOCK */
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IPL_SOFTBIO, /* SI_SOFTBIO */
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IPL_SOFTNET, /* SI_SOFTNET */
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IPL_SOFTSERIAL, /* SI_SOFTSERIAL */
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};
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@ -200,68 +199,22 @@ ifpga_intr_calculate_masks(void)
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/*
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* Initialize the soft interrupt masks to block themselves.
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*/
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ifpga_imask[IPL_SOFT] = SI_TO_IRQBIT(SI_SOFT);
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ifpga_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
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ifpga_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
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ifpga_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
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ifpga_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
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/*
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* splsoftclock() is the only interface that users of the
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* generic software interrupt facility have to block their
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* soft intrs, so splsoftclock() must also block IPL_SOFT.
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*/
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ifpga_imask[IPL_SOFTCLOCK] |= ifpga_imask[IPL_SOFT];
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/*
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* splsoftnet() must also block splsoftclock(), since we don't
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* want timer-driven network events to occur while we're
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* processing incoming packets.
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*/
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ifpga_imask[IPL_SOFTNET] |= ifpga_imask[IPL_SOFTCLOCK];
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/*
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* Enforce a hierarchy that gives "slow" device (or devices with
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* limited input buffer space/"real-time" requirements) a better
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* chance at not dropping data.
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*/
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ifpga_imask[IPL_BIO] |= ifpga_imask[IPL_SOFTNET];
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ifpga_imask[IPL_NET] |= ifpga_imask[IPL_BIO];
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ifpga_imask[IPL_SOFTSERIAL] |= ifpga_imask[IPL_NET];
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ifpga_imask[IPL_TTY] |= ifpga_imask[IPL_SOFTSERIAL];
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/*
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* splvm() blocks all interrupts that use the kernel memory
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* allocation facilities.
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*/
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ifpga_imask[IPL_VM] |= ifpga_imask[IPL_TTY];
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/*
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* Audio devices are not allowed to perform memory allocation
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* in their interrupt routines, and they have fairly "real-time"
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* requirements, so give them a high interrupt priority.
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*/
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ifpga_imask[IPL_AUDIO] |= ifpga_imask[IPL_VM];
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/*
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* splclock() must block anything that uses the scheduler.
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*/
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ifpga_imask[IPL_CLOCK] |= ifpga_imask[IPL_AUDIO];
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/*
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* splstatclock() must also block the clock.
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*/
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ifpga_imask[IPL_STATCLOCK] |= ifpga_imask[IPL_CLOCK];
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/*
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* splhigh() must block "everything".
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*/
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ifpga_imask[IPL_HIGH] |= ifpga_imask[IPL_STATCLOCK];
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/*
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* XXX We need serial drivers to run at the absolute highest priority
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* in order to avoid overruns, so serial > high.
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*/
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ifpga_imask[IPL_SERIAL] |= ifpga_imask[IPL_HIGH];
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ifpga_imask[IPL_SOFTBIO] |= ifpga_imask[IPL_SOFTCLOCK];
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ifpga_imask[IPL_SOFTNET] |= ifpga_imask[IPL_SOFTBIO];
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ifpga_imask[IPL_SOFTSERIAL] |= ifpga_imask[IPL_SOFTNET];
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ifpga_imask[IPL_VM] |= ifpga_imask[IPL_SOFTSERIAL];
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ifpga_imask[IPL_SCHED] |= ifpga_imask[IPL_VM];
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ifpga_imask[IPL_HIGH] |= ifpga_imask[IPL_SCHED];
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/*
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* Now compute which IRQs must be blocked when servicing any
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void
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ifpga_do_pending(void)
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{
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#ifdef __HAVE_FAST_SOFTINTS
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static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
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int new, oldirqstate;
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DO_SOFTINT(SI_SOFTSERIAL);
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DO_SOFTINT(SI_SOFTNET);
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DO_SOFTINT(SI_SOFTBIO);
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DO_SOFTINT(SI_SOFTCLOCK);
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DO_SOFTINT(SI_SOFT);
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__cpu_simple_unlock(&processing);
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restore_interrupts(oldirqstate);
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#endif
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}
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void
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struct intrq *iq;
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struct intrhand *ih;
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int oldirqstate, pcpl, irq, ibit, hwpend;
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struct cpu_info *ci;
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ci = curcpu();
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ci->ci_idepth++;
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pcpl = current_spl_level;
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@ -488,6 +447,8 @@ ifpga_intr_dispatch(struct clockframe *frame)
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ifpga_set_intrmask();
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}
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ci->ci_idepth--;
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/* Check for pendings soft intrs. */
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if ((ifpga_ipending & INT_SWMASK) & ~current_spl_level) {
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oldirqstate = enable_interrupts(I32_bit);
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