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Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one

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in cpu.h

OK Matt Thomas
This commit is contained in:
freza 2006-05-30 22:44:13 +00:00
parent 4ca4d18faa
commit fbb6d5fc9e
4 changed files with 22 additions and 32 deletions
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20
sys/arch/powerpc/include/cpu.h
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@ -1,4 +1,4 @@
/* $NetBSD: cpu.h,v 1.47 2006/02/16 20:17:14 perry Exp $ */
/* $NetBSD: cpu.h,v 1.48 2006/05/30 22:44:13 freza Exp $ */
/*
* Copyright (C) 1999 Wolfgang Solfrank.
@ -252,6 +252,24 @@ mfpvr(void)
return (pvr);
}
#if defined(PPC_IBM4XX) || defined(PPC_IBM403)
/*
* DCR (Device Control Register) access. These have to be
* macros because register address is encoded as immediate
* operand.
*/
#define mtdcr(reg, val) \
__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val))
#define mfdcr(reg) \
({ \
uint32_t __val; \
\
__asm volatile("mfdcr %0,%1" : "=r"(__val) : "K"(reg)); \
__val; \
})
#endif /* PPC_IBM4XX || PPC_IBM403 */
/*
* CLKF_BASEPRI is dependent on the underlying interrupt code
* and can not be defined here. It should be defined in

11
sys/arch/powerpc/include/ibm4xx/dcr403cgx.h
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@ -1,4 +1,4 @@
/* $NetBSD: dcr403cgx.h,v 1.2 2005/12/24 22:45:36 perry Exp $ */
/* $NetBSD: dcr403cgx.h,v 1.3 2006/05/30 22:44:13 freza Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@ -39,15 +39,6 @@
#ifndef _DCR403GCXP_H_
#define _DCR403GCXP_H_
#ifndef _LOCORE
#define mtdcr(reg, val) \
__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val))
#define mfdcr(reg) \
( { u_int32_t val; \
__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg)); \
val; } )
#endif /* _LOCORE */
/* Device Control Register declarations */
#define DCR_EXISR 0x040 /* External Interrupt Status Register */

11
sys/arch/powerpc/include/ibm4xx/dcr405gp.h
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@ -1,4 +1,4 @@
/* $NetBSD: dcr405gp.h,v 1.4 2005/12/24 22:45:36 perry Exp $ */
/* $NetBSD: dcr405gp.h,v 1.5 2006/05/30 22:44:14 freza Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@ -38,15 +38,6 @@
#ifndef _DCR405GP_H_
#define _DCR405GP_H_
#ifndef _LOCORE
#define mtdcr(reg, val) \
__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val))
#define mfdcr(reg) \
( { u_int32_t val; \
__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg)); \
val; } )
#endif /* _LOCORE */
/* Device Control Register declarations */
/* DCRs used for indirect access */

12
sys/arch/powerpc/include/ibm4xx/dcr405xx.h
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@ -1,4 +1,4 @@
/* $NetBSD: dcr405xx.h,v 1.4 2005/12/24 22:45:36 perry Exp $ */
/* $NetBSD: dcr405xx.h,v 1.5 2006/05/30 22:44:14 freza Exp $ */
/*
* Copyright (c) 2004 Shigeyuki Fukushima.
@ -39,16 +39,6 @@
* 405CR/NPe405L/NPe405H/405EP/405GP/405GPr
*/
#ifndef _LOCORE
#define mtdcr(reg, val) \
__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val))
#define mfdcr(reg) \
( { u_int32_t val; \
__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg)); \
val; } )
#endif /* _LOCORE */
/*****************************************************************************/
/*
* Memory Controller Registers (0x010-0x011)