Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

add an event counter for clock interrupts

Browse Source
This commit is contained in:
macallan 2015-03-11 12:40:36 +00:00
parent 0e3145a0d2
commit fab5e93dad
1 changed files with 8 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
sys/arch/evbmips/ingenic/intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.c,v 1.6 2015/03/07 15:37:46 macallan Exp $ */
/* $NetBSD: intr.c,v 1.7 2015/03/11 12:40:36 macallan Exp $ */
/*-
* Copyright (c) 2014 Michael Lorenz
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.6 2015/03/07 15:37:46 macallan Exp $");
__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.7 2015/03/11 12:40:36 macallan Exp $");
#define __INTR_PRIVATE
@ -89,6 +89,7 @@ struct intrhand {
};
struct intrhand intrs[NINTR];
struct evcnt clockintrs;
void ingenic_irq(int);
@ -100,6 +101,9 @@ evbmips_intr_init(void)
ipl_sr_map = ingenic_ipl_sr_map;
evcnt_attach_dynamic(&clockintrs,
EVCNT_TYPE_INTR, NULL, "timer", "intr");
/* zero all handlers */
for (i = 0; i < NINTR; i++) {
intrs[i].ih_func = NULL;
@ -181,6 +185,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
if (ipending & MIPS_INT_MASK_2) {
/* this is a timer interrupt */
ingenic_clockintr(id);
clockintrs.ev_count++;
ingenic_puts("INT2\n");
}
if (ipending & MIPS_INT_MASK_0) {
@ -202,6 +207,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
writereg(JZ_ICMSR0, mask);
ingenic_clockintr(id);
writereg(JZ_ICMCR0, mask);
clockintrs.ev_count++;
}
ingenic_irq(ipl);
KASSERT(id == 0);