Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

There is no need to save/restore l_private in softint_switch now that 

cpu_switchto is fixed
This commit is contained in:
skrll 2015-03-24 21:09:11 +00:00
parent b2cf87b6f2
commit fab59747f2
1 changed files with 2 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
sys/arch/arm/arm32/cpuswitch.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpuswitch.S,v 1.88 2015/03/24 07:16:16 matt Exp $ */
/* $NetBSD: cpuswitch.S,v 1.89 2015/03/24 21:09:11 skrll Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@ -87,7 +87,7 @@
#include <arm/asm.h>
#include <arm/locore.h>
RCSID("$NetBSD: cpuswitch.S,v 1.88 2015/03/24 07:16:16 matt Exp $")
RCSID("$NetBSD: cpuswitch.S,v 1.89 2015/03/24 21:09:11 skrll Exp $")
/* LINTSTUB: include <sys/param.h> */
@ -405,11 +405,6 @@ ENTRY_NP(softint_switch)
*/
mrc p15, 0, r0, c13, c0, 2
str r0, [r2, #(PCB_USER_PID_RW)]
/*
* Now restore l_private for the softint thread.
*/
ldr r0, [r5, #(L_PRIVATE)]
mcr p15, 0, r0, c13, c0, 3
#endif
/* this is an invariant so load before disabling intrs */
@ -444,10 +439,6 @@ ENTRY_NP(softint_switch)
/*
* If we've returned, we need to change everything back and return.
*/
#ifdef _ARM_ARCH_6
ldr r0, [r4, #(L_PRIVATE)] /* get pinned lwp's l_private */
mcr p15, 0, r0, c13, c0, 3 /* and restore it */
#endif
ldr r2, [r4, #(L_PCB)] /* get pinned lwp's pcb */
#ifndef __HAVE_UNNESTED_INTRS