appease nick
This commit is contained in:
macallan
parent
a7cfe46ea7
commit
fa629718a1
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@ -1,4 +1,4 @@
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/* $NetBSD: apbus.c,v 1.3 2014/12/23 16:16:03 macallan Exp $ */
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/* $NetBSD: apbus.c,v 1.4 2014/12/23 18:48:52 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -29,7 +29,7 @@
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/* catch-all for on-chip peripherals */
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.3 2014/12/23 16:16:03 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.4 2014/12/23 18:48:52 macallan Exp $");
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#include "locators.h"
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#define _MIPS_BUS_DMA_PRIVATE
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@ -117,7 +117,7 @@ apbus_attach(device_t parent, device_t self, void *aux)
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/* wake up the USB part */
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reg = readreg(JZ_OPCR);
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reg |= SPENDN0 | SPENDN1;
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reg |= OPCR_SPENDN0 | OPCR_SPENDN1;
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writereg(JZ_OPCR, reg);
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#ifdef INGENIC_DEBUG
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@ -1,4 +1,4 @@
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/* $NetBSD: ingenic_dwctwo.c,v 1.2 2014/12/23 15:13:30 macallan Exp $ */
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/* $NetBSD: ingenic_dwctwo.c,v 1.3 2014/12/23 18:48:52 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.2 2014/12/23 15:13:30 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.3 2014/12/23 18:48:52 macallan Exp $");
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/*
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* adapted from bcm2835_dwctwo.c
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@ -136,12 +136,15 @@ ingenic_dwc2_attach(device_t parent, device_t self, void *aux)
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aprint_normal(": USB controller\n");
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reg = readreg(JZ_USBPCR);
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reg |= VBUSVLDEXTSEL;
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reg |= VBUSVLDEXT;
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reg |= USB_MODE;
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reg |= COMMONONN;
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reg &= ~OTG_DISABLE;
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reg |= PCR_VBUSVLDEXTSEL;
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reg |= PCR_VBUSVLDEXT;
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reg |= PCR_USB_MODE;
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reg |= PCR_COMMONONN;
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reg &= ~PCR_OTG_DISABLE;
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writereg(JZ_USBPCR, reg);
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#ifdef INGENIC_DEBUG
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printf("JZ_USBPCR %08x\n", reg);
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#endif
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reg = readreg(JZ_USBPCR1);
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reg |= PCR_SYNOPSYS;
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@ -150,6 +153,9 @@ ingenic_dwc2_attach(device_t parent, device_t self, void *aux)
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reg |= PCR_CLK_48;
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reg |= PCR_WORD_I_F0;
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writereg(JZ_USBPCR1, reg);
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#ifdef INGENIC_DEBUG
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printf("JZ_USBPCR1 %08x\n", reg);
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#endif
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delay(10000);
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@ -1,4 +1,4 @@
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/* $NetBSD: ingenic_regs.h,v 1.4 2014/12/23 16:15:05 macallan Exp $ */
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/* $NetBSD: ingenic_regs.h,v 1.5 2014/12/23 18:48:52 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -164,41 +164,41 @@ MFC0(uint32_t r, uint32_t s)
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/* power management */
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#define JZ_CLKGR0 0x10000020 /* CLocK Gating Registers */
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#define JZ_OPCR 0x10000024 /* Oscillator Power Control Reg. */
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#define IDLE_DIS 0x80000000 /* don't stop CPU clk on idle */
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#define GPU_CLK_STOP 0x40000000
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#define L2CM_M 0x0c000000
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#define L2CM_ON 0x00000000 /* L2 stays on in sleep */
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#define L2CM_RET 0x04000000 /* L2 retention mode in sleep */
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#define L2CM_OFF 0x08000000 /* L2 powers down in sleep */
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#define SPENDN0 0x00000080 /* OTG port forced down */
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#define SPENDN1 0x00000040 /* UHC port forced down */
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#define BUS_MODE 0x00000020 /* 1 - bursts */
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#define O1SE 0x00000010 /* EXTCLK on in sleep */
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#define PD 0x00000008 /* P0 down in sleep */
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#define ERCS 0x00000004 /* 1 RTCCLK, 0 EXTCLK/512 */
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#define CPU_MODE 0x00000002 /* 1 access 'accelerated' */
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#define OSE 0x00000001 /* disable EXTCLK */
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#define OPCR_IDLE_DIS 0x80000000 /* don't stop CPU clk on idle */
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#define OPCR_GPU_CLK_ST 0x40000000 /* stop GPU clock */
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#define OPCR_L2CM_M 0x0c000000
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#define OPCR_L2CM_ON 0x00000000 /* L2 stays on in sleep */
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#define OPCR_L2CM_RET 0x04000000 /* L2 retention mode in sleep */
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#define OPCR_L2CM_OFF 0x08000000 /* L2 powers down in sleep */
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#define OPCR_SPENDN0 0x00000080 /* OTG port forced down */
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#define OPCR_SPENDN1 0x00000040 /* UHC port forced down */
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#define OPCR_BUS_MODE 0x00000020 /* 1 - bursts */
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#define OPCR_O1SE 0x00000010 /* EXTCLK on in sleep */
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#define OPCR_PD 0x00000008 /* P0 down in sleep */
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#define OPCR_ERCS 0x00000004 /* 1 RTCCLK, 0 EXTCLK/512 */
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#define OPCR_CPU_MODE 0x00000002 /* 1 access 'accelerated' */
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#define OPCR_OSE 0x00000001 /* disable EXTCLK */
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#define JZ_CLKGR1 0x10000028 /* CLocK Gating Registers */
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#define JZ_USBPCR 0x1000003c
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#define USB_MODE 0x80000000 /* 1 - otg */
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#define AVLD_REG 0x40000000
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#define IDPULLUP_MASK 0x30000000
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#define INCR_MASK 0x08000000
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#define TCRISETUNE 0x04000000
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#define COMMONONN 0x02000000
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#define VBUSVLDEXT 0x01000000
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#define VBUSVLDEXTSEL 0x00800000
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#define POR 0x00400000
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#define SIDDQ 0x00200000
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#define OTG_DISABLE 0x00100000
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#define COMPDISTUNE_M 0x000e0000
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#define OTGTUNE 0x0001c000
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#define SQRXTUNE 0x00003800
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#define TXFSLSTUNE 0x00000780
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#define TXPREEMPHTUNE 0x00000040
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#define TXHSXVTUNE 0x00000030
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#define TXVREFTUNE 0x0000000f
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#define PCR_USB_MODE 0x80000000 /* 1 - otg */
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#define PCR_AVLD_REG 0x40000000
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#define PCR_IDPULLUP_MASK 0x30000000
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#define PCR_INCR_MASK 0x08000000
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#define PCR_TCRISETUNE 0x04000000
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#define PCR_COMMONONN 0x02000000
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#define PCR_VBUSVLDEXT 0x01000000
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#define PCR_VBUSVLDEXTSEL 0x00800000
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#define PCR_POR 0x00400000
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#define PCR_SIDDQ 0x00200000
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#define PCR_OTG_DISABLE 0x00100000
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#define PCR_COMPDISTN_M 0x000e0000
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#define PCR_OTGTUNE 0x0001c000
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#define PCR_SQRXTUNE 0x00003800
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#define PCR_TXFSLSTUNE 0x00000780
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#define PCR_TXPREEMPHTUNE 0x00000040
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#define PCR_TXHSXVTUNE 0x00000030
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#define PCR_TXVREFTUNE 0x0000000f
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#define JZ_USBPCR1 0x10000048
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#define PCR_SYNOPSYS 0x10000000 /* Mentor mode otherwise */
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#define PCR_REFCLK_CORE 0x0c000000
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