From f98c8a03941b526d7562b26efc69bf9ef1e7a86b Mon Sep 17 00:00:00 2001
From: briggs <briggs@NetBSD.org>
Date: Wed, 9 Jun 1999 03:41:34 +0000
Subject: [PATCH] Remove some register declarations. Get Q9x0 dual SCSI at
 least basically working. Be paranoid about some register reads.

---
 sys/arch/mac68k/obio/esp.c | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/sys/arch/mac68k/obio/esp.c b/sys/arch/mac68k/obio/esp.c
index d16c84351499..04bd3d6f6e49 100644
--- a/sys/arch/mac68k/obio/esp.c
+++ b/sys/arch/mac68k/obio/esp.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: esp.c,v 1.21 1999/06/01 03:40:12 briggs Exp $	*/
+/*	$NetBSD: esp.c,v 1.22 1999/06/09 03:41:34 briggs Exp $	*/
 
 /*
  * Copyright (c) 1997 Jason R. Thorpe.
@@ -399,11 +399,11 @@ int
 esp_dma_intr(sc)
 	struct ncr53c9x_softc *sc;
 {
-	register struct esp_softc *esc = (struct esp_softc *)sc;
-	register u_char	*p;
+	struct esp_softc *esc = (struct esp_softc *)sc;
 	volatile u_char *cmdreg, *intrreg, *statreg, *fiforeg;
-	register u_int	espphase, espstat, espintr;
-	register int	cnt;
+	u_char	*p;
+	u_int	espphase, espstat, espintr;
+	int	cnt, s;
 
 	if (esc->sc_active == 0) {
 		printf("dma_intr--inactive DMA\n");
@@ -450,11 +450,13 @@ esp_dma_intr(sc)
 
 		if (esc->sc_active) {
 			while (!(*statreg & 0x80));
+			s = splhigh();
 			espstat = *statreg;
 			espintr = *intrreg;
 			espphase = (espintr & NCRINTR_DIS)
 				    ? /* Disconnected */ BUSFREE_PHASE
 				    : espstat & PHASE_MASK;
+			splx(s);
 		}
 	} while (esc->sc_active && (espintr & NCRINTR_BS));
 	sc->sc_phase = espphase;
@@ -708,11 +710,22 @@ int
 esp_dualbus_intr(sc)
 	register struct ncr53c9x_softc *sc;
 {
-	if (esp0 && (esp0->sc_reg[NCR_STAT * 16] & 0x80))
-		ncr53c9x_intr((struct ncr53c9x_softc *) esp0);
+	int	i = 0;
 
-	if (esp1 && (esp1->sc_reg[NCR_STAT * 16] & 0x80))
-		ncr53c9x_intr((struct ncr53c9x_softc *) esp1);
+	do {
+		if (esp0 && (esp0->sc_reg[NCR_STAT * 16] & 0x80)) {
+			ncr53c9x_intr((struct ncr53c9x_softc *) esp0);
+			i++;
+		}
+
+		if (esp1 && (esp1->sc_reg[NCR_STAT * 16] & 0x80)) {
+			ncr53c9x_intr((struct ncr53c9x_softc *) esp1);
+			i++;
+		}
+		if (!i) {
+			delay(100); i++;
+		}
+	} while (!i);
 
 	return 0;
 }