Make this work on big endian platforms (mostly from OpenBSD):
Uploaded scripts work better if they are little endian, as the card's engine expects, so convert to le first. Also clean up attach routine a bit (use pa_id and PCI_REVISION instead of fetching it ourselves). This makes the driver work on my macppc G4, it can decode and display video and tuner input. Sound does not seem to work, but this may be my wonky formac bktr-for-macintosh card.
This commit is contained in:
mjl
parent
d5afd1c04f
commit
f8a4b3b1a8
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@ -1,4 +1,4 @@
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/* $NetBSD: bktr_card.c,v 1.12 2002/03/23 09:27:50 hamajima Exp $ */
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/* $NetBSD: bktr_card.c,v 1.13 2003/01/10 01:38:52 mjl Exp $ */
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/* FreeBSD: src/sys/dev/bktr/bktr_card.c,v 1.16 2000/10/31 13:09:56 roger Exp */
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@ -50,7 +50,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bktr_card.c,v 1.12 2002/03/23 09:27:50 hamajima Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bktr_card.c,v 1.13 2003/01/10 01:38:52 mjl Exp $");
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#include "opt_bktr.h" /* Include any kernel config options */
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@ -616,7 +616,9 @@ probeCard( bktr_ptr_t bktr, int verbose, int unit )
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bktr->card.eepromAddr = eeprom_i2c_address;
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bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
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readEEProm(bktr, 0, 256, (u_char *) &eeprom );
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if(readEEProm(bktr, 0, 256, (u_char *) &eeprom))
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printf("%s: error reading EEPROM\n", bktr_name(bktr));
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byte_252 = (unsigned int)eeprom[252];
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byte_253 = (unsigned int)eeprom[253];
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byte_254 = (unsigned int)eeprom[254];
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@ -680,6 +682,13 @@ probeCard( bktr_ptr_t bktr, int verbose, int unit )
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goto checkTuner;
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}
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if (subsystem_vendor_id == PCI_VENDOR_TERRATEC) {
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bktr->card = cards[ (card = CARD_TERRATVPLUS) ];
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bktr->card.eepromAddr = eeprom_i2c_address;
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bktr->card.eepromSize = (u_char)(256 / EEPROMBLOCKSIZE);
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goto checkTuner;
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}
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/* Vendor is unknown. We will use the standard probe code */
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/* which may not give best results */
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printf("%s: Warning - card vendor 0x%04x (model 0x%04x) unknown.\n",
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@ -1,4 +1,4 @@
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/* $NetBSD: bktr_core.c,v 1.26 2002/12/25 06:40:27 toshii Exp $ */
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/* $NetBSD: bktr_core.c,v 1.27 2003/01/10 01:38:52 mjl Exp $ */
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/* FreeBSD: src/sys/dev/bktr/bktr_core.c,v 1.114 2000/10/31 13:09:56 roger Exp */
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@ -97,7 +97,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bktr_core.c,v 1.26 2002/12/25 06:40:27 toshii Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bktr_core.c,v 1.27 2003/01/10 01:38:52 mjl Exp $");
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#include "opt_bktr.h" /* Include any kernel config options */
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@ -1326,7 +1326,7 @@ video_ioctl( bktr_ptr_t bktr, int unit, ioctl_cmd_t cmd, caddr_t arg, struct pro
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return EINVAL;
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}
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for (i = 0; i < BT848_MAX_CLIP_NODE - 1 ; i++) {
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for (i = 0; i < BT848_MAX_CLIP_NODE - 1; i++) {
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if (bktr->clip_list[i].y_min == 0 &&
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bktr->clip_list[i].y_max == 0) {
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break;
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@ -2104,7 +2104,7 @@ tuner_ioctl( bktr_ptr_t bktr, int unit, ioctl_cmd_t cmd, caddr_t arg, struct pro
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/* lr 970528 luma notch etc - 3 high bits of e_control/o_control */
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case BT848_SLNOTCH: /* set luma notch */
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tmp_int = (*(int *)arg & 0x7) << 5 ;
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tmp_int = (*(int *)arg & 0x7) << 5;
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OUTB(bktr, BKTR_E_CONTROL, INB(bktr, BKTR_E_CONTROL) & ~0xe0);
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OUTB(bktr, BKTR_O_CONTROL, INB(bktr, BKTR_O_CONTROL) & ~0xe0);
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OUTB(bktr, BKTR_E_CONTROL, INB(bktr, BKTR_E_CONTROL) | tmp_int);
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@ -2112,7 +2112,7 @@ tuner_ioctl( bktr_ptr_t bktr, int unit, ioctl_cmd_t cmd, caddr_t arg, struct pro
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break;
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case BT848_GLNOTCH: /* get luma notch */
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*(int *)arg = (int) ( (INB(bktr, BKTR_E_CONTROL) & 0xe0) >> 5) ;
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*(int *)arg = (int) ( (INB(bktr, BKTR_E_CONTROL) & 0xe0) >> 5);
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break;
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@ -2259,10 +2259,10 @@ tuner_ioctl( bktr_ptr_t bktr, int unit, ioctl_cmd_t cmd, caddr_t arg, struct pro
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/* Luigi's I2CWR ioctl */
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case BT848_I2CWR:
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par = *(u_long *)arg;
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write = (par >> 24) & 0xff ;
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i2c_addr = (par >> 16) & 0xff ;
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i2c_port = (par >> 8) & 0xff ;
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data = (par) & 0xff ;
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write = (par >> 24) & 0xff;
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i2c_addr = (par >> 16) & 0xff;
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i2c_port = (par >> 8) & 0xff;
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data = (par) & 0xff;
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if (write) {
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i2cWrite( bktr, i2c_addr, i2c_port, data);
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@ -2584,7 +2584,7 @@ static bool_t notclipped (bktr_reg_t * bktr, int x, int width) {
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static bool_t getline(bktr_reg_t *bktr, int x ) {
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int i, j;
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bktr_clip_t * clip_node ;
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bktr_clip_t * clip_node;
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if (bktr->line_length == 0 ||
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bktr->current_col >= bktr->line_length) return FALSE;
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@ -2612,7 +2612,7 @@ static bool_t getline(bktr_reg_t *bktr, int x ) {
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bktr->last_y = bktr->yclip2;
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bktr->clip_start = j;
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}
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} else break ;
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} else break;
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}
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return TRUE;
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}
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@ -2641,8 +2641,8 @@ static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
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start_skip = 0;
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if (( pf->type == METEOR_PIXTYPE_RGB ) && ( pf->Bpp == 3 ))
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switch ( ((uintptr_t) (volatile void *) *target_buffer) % 4 ) {
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case 2 : start_skip = 4 ; break;
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case 1 : start_skip = 8 ; break;
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case 2 : start_skip = 4; break;
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case 1 : start_skip = 8; break;
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}
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if ((width * pixel_width) < DMA_BT848_SPLIT ) {
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skip = 0;
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if (( flag & OP_SOL ) && ( start_skip > 0 )) {
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*(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
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*(*dma_prog)++ = htole32(OP_SKIP | OP_SOL | start_skip);
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flag &= ~OP_SOL;
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skip = start_skip;
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}
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*(*dma_prog)++ = operation | flag | (width * pixel_width - skip);
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*(*dma_prog)++ = htole32(operation | flag |
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(width * pixel_width - skip));
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if (operation != OP_SKIP )
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*(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer;
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*(*dma_prog)++ = htole32((uintptr_t) (volatile void *) *target_buffer);
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*target_buffer += width * pixel_width;
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bktr->current_col += width;
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@ -2671,7 +2672,7 @@ static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
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} else {
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if (bktr->current_col == 0 && width == cols) {
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flag = OP_SOL ;
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flag = OP_SOL;
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flag2 = OP_EOL;
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} else if (bktr->current_col == 0 ) {
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flag = OP_SOL;
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@ -2686,22 +2687,22 @@ static bool_t split(bktr_reg_t * bktr, volatile u_long **dma_prog, int width ,
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skip = 0;
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if (( flag & OP_SOL ) && ( start_skip > 0 )) {
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*(*dma_prog)++ = OP_SKIP | OP_SOL | start_skip;
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*(*dma_prog)++ = htole32(OP_SKIP | OP_SOL | start_skip);
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flag &= ~OP_SOL;
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skip = start_skip;
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}
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*(*dma_prog)++ = operation | flag |
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(width * pixel_width / 2 - skip);
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*(*dma_prog)++ = htole32(operation | flag |
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(width * pixel_width / 2 - skip));
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if (operation != OP_SKIP )
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*(*dma_prog)++ = (uintptr_t) (volatile void *) *target_buffer ;
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*target_buffer += (width * pixel_width / 2) ;
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*(*dma_prog)++ = htole32((uintptr_t) (volatile void *) *target_buffer);
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*target_buffer += (width * pixel_width / 2);
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if ( operation == OP_WRITE )
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operation = OP_WRITEC;
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*(*dma_prog)++ = operation | flag2 |
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(width * pixel_width / 2);
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*target_buffer += (width * pixel_width / 2) ;
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*(*dma_prog)++ = htole32(operation | flag2 |
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(width * pixel_width / 2));
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*target_buffer += (width * pixel_width / 2);
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bktr->current_col += width;
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}
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@ -2774,26 +2775,26 @@ rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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/* Wait for the VRE sync marking the end of the Even and
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* the start of the Odd field. Resync here.
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*/
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*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_VRE;
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*dma_prog++ = 0;
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*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_VRE);
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*dma_prog++ = htole32(0);
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loop_point = dma_prog;
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/* store the VBI data */
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/* look for sync with packed data */
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*dma_prog++ = OP_SYNC | BKTR_FM1;
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*dma_prog++ = 0;
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*dma_prog++ = htole32(OP_SYNC | BKTR_FM1);
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*dma_prog++ = htole32(0);
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for(i = 0; i < vbilines; i++) {
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*dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
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*dma_prog++ = (u_long) vtophys(bktr->vbidata +
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(i * VBI_LINE_SIZE));
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*dma_prog++ = htole32(OP_WRITE | OP_SOL | OP_EOL | vbisamples);
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*dma_prog++ = htole32((u_long) vtophys(bktr->vbidata +
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(i * VBI_LINE_SIZE)));
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}
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if ( (i_flag == 2/*Odd*/) || (i_flag==3) /*interlaced*/ ) {
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/* store the Odd field video image */
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/* look for sync with packed data */
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*dma_prog++ = OP_SYNC | BKTR_FM1;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_FM1);
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*dma_prog++ = htole32(0); /* NULL WORD */
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width = cols;
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for (i = 0; i < (rows/interlace); i++) {
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target = target_buffer;
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@ -2827,17 +2828,17 @@ rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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/* Grab the Even field */
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/* Look for the VRO, end of Odd field, marker */
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*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO);
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*dma_prog++ = htole32(0); /* NULL WORD */
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/* store the VBI data */
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/* look for sync with packed data */
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*dma_prog++ = OP_SYNC | BKTR_FM1;
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*dma_prog++ = 0;
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*dma_prog++ = htole32(OP_SYNC | BKTR_FM1);
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*dma_prog++ = htole32(0);
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for(i = 0; i < vbilines; i++) {
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*dma_prog++ = OP_WRITE | OP_SOL | OP_EOL | vbisamples;
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*dma_prog++ = (u_long) vtophys(bktr->vbidata +
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((i+MAX_VBI_LINES) * VBI_LINE_SIZE));
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*dma_prog++ = htole32(OP_WRITE | OP_SOL | OP_EOL | vbisamples);
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*dma_prog++ = htole32((u_long) vtophys(bktr->vbidata +
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((i+MAX_VBI_LINES) * VBI_LINE_SIZE)));
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}
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/* store the video image */
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@ -2849,8 +2850,8 @@ rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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if ((i_flag == 1) /*Even Only*/ || (i_flag==3) /*interlaced*/) {
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/* look for sync with packed data */
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*dma_prog++ = OP_SYNC | BKTR_FM1;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_FM1);
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*dma_prog++ = htole32(0); /* NULL WORD */
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width = cols;
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for (i = 0; i < (rows/interlace); i++) {
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target = target_buffer;
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@ -2882,12 +2883,12 @@ rgb_vbi_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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}
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/* Look for end of 'Even Field' */
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*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE);
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*dma_prog++ = htole32(0); /* NULL WORD */
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*dma_prog++ = OP_JUMP ;
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*dma_prog++ = (u_long ) vtophys((vaddr_t)loop_point) ;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_JUMP);
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*dma_prog++ = htole32((u_long) vtophys((vaddr_t)loop_point));
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*dma_prog++ = htole32(0); /* NULL WORD */
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}
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@ -2944,10 +2945,10 @@ rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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buffer = target_buffer;
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/* contruct sync : for video packet format */
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*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
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*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM1);
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/* sync, mode indicator packed data */
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(0); /* NULL WORD */
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width = cols;
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for (i = 0; i < (rows/interlace); i++) {
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target = target_buffer;
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@ -2980,28 +2981,28 @@ rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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switch (i_flag) {
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case 1:
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/* sync vre */
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*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO);
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*dma_prog++ = htole32(0); /* NULL WORD */
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*dma_prog++ = OP_JUMP;
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*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
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*dma_prog++ = htole32(OP_JUMP);
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*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
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return;
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case 2:
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/* sync vro */
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*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE);
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*dma_prog++ = htole32(0); /* NULL WORD */
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*dma_prog++ = OP_JUMP;
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*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
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*dma_prog++ = htole32(OP_JUMP);
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*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
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return;
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case 3:
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/* sync vro */
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*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = OP_JUMP; ;
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*dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
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*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO);
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*dma_prog++ = htole32(0); /* NULL WORD */
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*dma_prog++ = htole32(OP_JUMP);
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*dma_prog++ = htole32((u_long) vtophys(bktr->odd_dma_prog));
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break;
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}
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@ -3012,8 +3013,8 @@ rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
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dma_prog = (u_long *) bktr->odd_dma_prog;
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/* sync vre IRQ bit */
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*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
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*dma_prog++ = 0; /* NULL WORD */
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*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM1);
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*dma_prog++ = htole32(0); /* NULL WORD */
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width = cols;
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for (i = 0; i < (rows/interlace); i++) {
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target = target_buffer;
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|
|
@ -3045,11 +3046,11 @@ rgb_prog( bktr_ptr_t bktr, char i_flag, int cols, int rows, int interlace )
|
|||
}
|
||||
|
||||
/* sync vre IRQ bit */
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -3097,43 +3098,43 @@ yuvpack_prog( bktr_ptr_t bktr, char i_flag,
|
|||
|
||||
/* contruct sync : for video packet format */
|
||||
/* sync, mode indicator packed data */
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM1);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
b = cols;
|
||||
|
||||
for (i = 0; i < (rows/interlace); i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = inst3;
|
||||
*dma_prog++ = target_buffer + b;
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(inst3);
|
||||
*dma_prog++ = htole32(target_buffer + b);
|
||||
target_buffer += interlace*(cols * 2);
|
||||
}
|
||||
|
||||
switch (i_flag) {
|
||||
case 1:
|
||||
/* sync vre */
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 2:
|
||||
/* sync vro */
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 3:
|
||||
/* sync vro */
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->odd_dma_prog));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3144,27 +3145,27 @@ yuvpack_prog( bktr_ptr_t bktr, char i_flag,
|
|||
dma_prog = (u_long * ) bktr->odd_dma_prog;
|
||||
|
||||
/* sync vre */
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM1;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM1);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
for (i = 0; i < (rows/interlace) ; i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = inst3;
|
||||
*dma_prog++ = target_buffer + b;
|
||||
for (i = 0; i < (rows/interlace); i++) {
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(inst3);
|
||||
*dma_prog++ = htole32(target_buffer + b);
|
||||
target_buffer += interlace * ( cols*2);
|
||||
}
|
||||
}
|
||||
|
||||
/* sync vro IRQ bit */
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -3216,41 +3217,41 @@ yuv422_prog( bktr_ptr_t bktr, char i_flag,
|
|||
t1 = buffer;
|
||||
|
||||
/* contruct sync : for video packet format */
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM3; /*sync, mode indicator packed data*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM3); /*sync, mode indicator packed data*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
for (i = 0; i < (rows/interlace ) ; i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = cols/2 | cols/2 << 16;
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
|
||||
*dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
|
||||
for (i = 0; i < (rows/interlace ); i++) {
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(cols/2 | cols/2 << 16);
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + i*cols/2 * interlace);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace);
|
||||
target_buffer += interlace*cols;
|
||||
}
|
||||
|
||||
switch (i_flag) {
|
||||
case 1:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE; /*sync vre*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE); /*sync vre*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 2:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO; /*sync vre*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO); /*sync vre*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 3:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->odd_dma_prog));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3260,24 +3261,24 @@ yuv422_prog( bktr_ptr_t bktr, char i_flag,
|
|||
|
||||
target_buffer = (u_long) buffer + cols;
|
||||
t1 = buffer + cols/2;
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM3;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM3);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
for (i = 0; i < (rows/interlace ) ; i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = cols/2 | cols/2 << 16;
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
|
||||
*dma_prog++ = t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace;
|
||||
for (i = 0; i < (rows/interlace ); i++) {
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(cols/2 | cols/2 << 16);
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + i*cols/2 * interlace);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + (cols*rows/2) + i*cols/2 * interlace);
|
||||
target_buffer += interlace*cols;
|
||||
}
|
||||
}
|
||||
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog) ;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -3315,45 +3316,45 @@ yuv12_prog( bktr_ptr_t bktr, char i_flag,
|
|||
buffer = target_buffer;
|
||||
t1 = buffer;
|
||||
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM3; /*sync, mode indicator packed data*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM3); /*sync, mode indicator packed data*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
for (i = 0; i < (rows/interlace )/2 ; i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = cols/2 | (cols/2 << 16);
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
|
||||
*dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
|
||||
for (i = 0; i < (rows/interlace )/2; i++) {
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(cols/2 | (cols/2 << 16));
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + i*cols/2 * interlace);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace);
|
||||
target_buffer += interlace*cols;
|
||||
*dma_prog++ = inst1;
|
||||
*dma_prog++ = cols/2 | (cols/2 << 16);
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = htole32(inst1);
|
||||
*dma_prog++ = htole32(cols/2 | (cols/2 << 16));
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
target_buffer += interlace*cols;
|
||||
|
||||
}
|
||||
|
||||
switch (i_flag) {
|
||||
case 1:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE; /*sync vre*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRE); /*sync vre*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 2:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO; /*sync vro*/
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_VRO); /*sync vro*/
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
return;
|
||||
|
||||
case 3:
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP ;
|
||||
*dma_prog = (u_long ) vtophys(bktr->odd_dma_prog);
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRO);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->odd_dma_prog));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -3363,19 +3364,19 @@ yuv12_prog( bktr_ptr_t bktr, char i_flag,
|
|||
|
||||
target_buffer = (u_long) buffer + cols;
|
||||
t1 = buffer + cols/2;
|
||||
*dma_prog++ = OP_SYNC | BKTR_RESYNC | BKTR_FM3;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_RESYNC | BKTR_FM3);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
|
||||
for (i = 0; i < ((rows/interlace )/2 ) ; i++) {
|
||||
*dma_prog++ = inst;
|
||||
*dma_prog++ = cols/2 | (cols/2 << 16);
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = t1 + (cols*rows) + i*cols/2 * interlace;
|
||||
*dma_prog++ = t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace;
|
||||
for (i = 0; i < ((rows/interlace )/2 ); i++) {
|
||||
*dma_prog++ = htole32(inst);
|
||||
*dma_prog++ = htole32(cols/2 | (cols/2 << 16));
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + i*cols/2 * interlace);
|
||||
*dma_prog++ = htole32(t1 + (cols*rows) + (cols*rows/4) + i*cols/2 * interlace);
|
||||
target_buffer += interlace*cols;
|
||||
*dma_prog++ = inst1;
|
||||
*dma_prog++ = cols/2 | (cols/2 << 16);
|
||||
*dma_prog++ = target_buffer;
|
||||
*dma_prog++ = htole32(inst1);
|
||||
*dma_prog++ = htole32(cols/2 | (cols/2 << 16));
|
||||
*dma_prog++ = htole32(target_buffer);
|
||||
target_buffer += interlace*cols;
|
||||
|
||||
}
|
||||
|
|
@ -3383,11 +3384,11 @@ yuv12_prog( bktr_ptr_t bktr, char i_flag,
|
|||
|
||||
}
|
||||
|
||||
*dma_prog++ = OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE;
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = OP_JUMP;
|
||||
*dma_prog++ = (u_long ) vtophys(bktr->dma_prog);
|
||||
*dma_prog++ = 0; /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_SYNC | BKTR_GEN_IRQ | BKTR_RESYNC | BKTR_VRE);
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
*dma_prog++ = htole32(OP_JUMP);
|
||||
*dma_prog++ = htole32((u_long) vtophys(bktr->dma_prog));
|
||||
*dma_prog++ = htole32(0); /* NULL WORD */
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -3720,19 +3721,26 @@ static u_int pixfmt_swap_flags( int pixfmt )
|
|||
{
|
||||
const struct meteor_pixfmt *pf = &pixfmt_table[ pixfmt ].public;
|
||||
u_int swapf = 0;
|
||||
|
||||
int swap_bytes, swap_shorts;
|
||||
|
||||
#if BYTE_ORDER == LITTLE_ENDIAN
|
||||
swap_bytes = pf->swap_bytes;
|
||||
swap_shorts = pf->swap_shorts;
|
||||
#else
|
||||
swap_bytes = !pf->swap_bytes;
|
||||
swap_shorts = !pf->swap_shorts;
|
||||
#endif
|
||||
switch ( pf->Bpp ) {
|
||||
case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP );
|
||||
case 2 : swapf = ( swap_bytes ? 0 : BSWAP );
|
||||
break;
|
||||
|
||||
case 3 : /* no swaps supported for 3bpp - makes no sense w/ bt848 */
|
||||
break;
|
||||
|
||||
case 4 : if ( pf->swap_bytes )
|
||||
swapf = pf->swap_shorts ? 0 : WSWAP;
|
||||
else
|
||||
swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP);
|
||||
break;
|
||||
case 4 :
|
||||
swapf = swap_bytes ? 0 : BSWAP;
|
||||
swapf |= swap_shorts ? 0 : WSWAP;
|
||||
break;
|
||||
}
|
||||
return swapf;
|
||||
}
|
||||
|
|
@ -3852,7 +3860,7 @@ i2cRead( bktr_ptr_t bktr, int addr )
|
|||
void
|
||||
msp_dpl_write(bktr_ptr_t bktr, int i2c_addr, unsigned char dev, unsigned int addr, unsigned int data)
|
||||
{
|
||||
unsigned char addr_l, addr_h, data_h, data_l ;
|
||||
unsigned char addr_l, addr_h, data_h, data_l;
|
||||
|
||||
addr_h = (addr >>8) & 0xff;
|
||||
addr_l = addr & 0xff;
|
||||
|
|
@ -4115,7 +4123,7 @@ static int i2c_read_byte( bktr_ptr_t bktr, unsigned char *data, int last ) {
|
|||
void msp_dpl_write( bktr_ptr_t bktr, int i2c_addr, unsigned char dev, unsigned int addr,
|
||||
unsigned int data){
|
||||
unsigned int msp_w_addr = i2c_addr;
|
||||
unsigned char addr_l, addr_h, data_h, data_l ;
|
||||
unsigned char addr_l, addr_h, data_h, data_l;
|
||||
addr_h = (addr >>8) & 0xff;
|
||||
addr_l = addr & 0xff;
|
||||
data_h = (data >>8) & 0xff;
|
||||
|
|
@ -4134,7 +4142,7 @@ void msp_dpl_write( bktr_ptr_t bktr, int i2c_addr, unsigned char dev, unsigned i
|
|||
/* Read from the MSP or DPL registers */
|
||||
unsigned int msp_dpl_read(bktr_ptr_t bktr, int i2c_addr, unsigned char dev, unsigned int addr){
|
||||
unsigned int data;
|
||||
unsigned char addr_l, addr_h, data_1, data_2, dev_r ;
|
||||
unsigned char addr_l, addr_h, data_1, data_2, dev_r;
|
||||
addr_h = (addr >>8) & 0xff;
|
||||
addr_l = addr & 0xff;
|
||||
dev_r = dev+1;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bktr_os.c,v 1.33 2002/10/23 09:13:34 jdolecek Exp $ */
|
||||
/* $NetBSD: bktr_os.c,v 1.34 2003/01/10 01:38:53 mjl Exp $ */
|
||||
|
||||
/* FreeBSD: src/sys/dev/bktr/bktr_os.c,v 1.20 2000/10/20 08:16:53 roger Exp */
|
||||
|
||||
|
|
@ -50,7 +50,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: bktr_os.c,v 1.33 2002/10/23 09:13:34 jdolecek Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: bktr_os.c,v 1.34 2003/01/10 01:38:53 mjl Exp $");
|
||||
|
||||
#ifdef __FreeBSD__
|
||||
#include "bktr.h"
|
||||
|
|
@ -307,7 +307,7 @@ bktr_probe( device_t dev )
|
|||
device_set_desc(dev, "BrookTree 879");
|
||||
return 0;
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
return ENXIO;
|
||||
}
|
||||
|
|
@ -329,7 +329,7 @@ bktr_attach( device_t dev )
|
|||
u_long old_irq, new_irq;
|
||||
#endif
|
||||
|
||||
struct bktr_softc *bktr = device_get_softc(dev);
|
||||
struct bktr_softc *bktr = device_get_softc(dev);
|
||||
|
||||
unit = device_get_unit(dev);
|
||||
|
||||
|
|
@ -1387,10 +1387,10 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
{
|
||||
bktr_ptr_t bktr;
|
||||
u_long latency;
|
||||
u_long fun;
|
||||
unsigned int rev;
|
||||
|
||||
#if defined(__OpenBSD__)
|
||||
u_long fun;
|
||||
unsigned int rev;
|
||||
struct pci_attach_args *pa = aux;
|
||||
pci_chipset_tag_t pc = pa->pa_pc;
|
||||
|
||||
|
|
@ -1448,6 +1448,7 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
#if defined(__NetBSD__)
|
||||
struct pci_attach_args *pa = aux;
|
||||
pci_intr_handle_t ih;
|
||||
pcireg_t command;
|
||||
const char *intrstr;
|
||||
int retval;
|
||||
int unit;
|
||||
|
|
@ -1458,6 +1459,13 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
|
||||
printf("\n");
|
||||
|
||||
/* Enable Bus Master
|
||||
XXX: check if all old DMA is stopped first (e.g. after warm
|
||||
boot) */
|
||||
command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
|
||||
command |= PCI_COMMAND_MASTER_ENABLE;
|
||||
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
|
||||
|
||||
/*
|
||||
* map memory
|
||||
*/
|
||||
|
|
@ -1467,7 +1475,7 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
&bktr->memt, &bktr->memh, NULL,
|
||||
&bktr->obmemsz);
|
||||
DPR(("pci_mapreg_map: memt %lx, memh %x, size %x\n",
|
||||
(long unsigned)bktr->memt, (u_int)bktr->memh,
|
||||
(unsigned long)bktr->memt, (u_int)bktr->memh,
|
||||
(u_int)bktr->obmemsz));
|
||||
if (retval) {
|
||||
printf("%s: couldn't map memory\n", bktr_name(bktr));
|
||||
|
|
@ -1509,7 +1517,7 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
* you have more than four, then 16 would probably be a better value.
|
||||
*/
|
||||
#ifndef BROOKTREE_DEF_LATENCY_VALUE
|
||||
#define BROOKTREE_DEF_LATENCY_VALUE 10
|
||||
#define BROOKTREE_DEF_LATENCY_VALUE 0x10
|
||||
#endif
|
||||
latency = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_LATENCY_TIMER);
|
||||
latency = (latency >> 8) & 0xff;
|
||||
|
|
@ -1524,19 +1532,7 @@ bktr_attach(struct device *parent, struct device *self, void *aux)
|
|||
PCI_LATENCY_TIMER, latency<<8);
|
||||
}
|
||||
|
||||
|
||||
/* Enabled Bus Master
|
||||
XXX: check if all old DMA is stopped first (e.g. after warm
|
||||
boot) */
|
||||
fun = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
|
||||
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
|
||||
fun | PCI_COMMAND_MASTER_ENABLE);
|
||||
|
||||
/* read the pci id and determine the card type */
|
||||
fun = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
|
||||
rev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG) & 0x000000ff;
|
||||
|
||||
common_bktr_attach(bktr, unit, fun, rev);
|
||||
common_bktr_attach(bktr, unit, pa->pa_id, PCI_REVISION(pa->pa_class));
|
||||
|
||||
#if NRADIO > 0
|
||||
/* attach to radio(4) */
|
||||
|
|
@ -1856,4 +1852,61 @@ bktr_get_info(void *v, struct radio_info *ri)
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif /* __NetBSD__ || __OpenBSD__ */
|
||||
|
||||
#if defined(__NetBSD__)
|
||||
|
||||
u_int8_t
|
||||
bktr_INB(struct bktr_softc *bktr, int offset)
|
||||
{
|
||||
u_int8_t val = bus_space_read_1(bktr->memt, bktr->memh, offset);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 1,
|
||||
BUS_SPACE_BARRIER_READ);
|
||||
return val;
|
||||
}
|
||||
|
||||
u_int16_t
|
||||
bktr_INW(struct bktr_softc *bktr, int offset)
|
||||
{
|
||||
u_int16_t val = bus_space_read_2(bktr->memt, bktr->memh, offset);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 2,
|
||||
BUS_SPACE_BARRIER_READ);
|
||||
return val;
|
||||
}
|
||||
|
||||
u_int32_t
|
||||
bktr_INL(struct bktr_softc *bktr, int offset)
|
||||
{
|
||||
u_int32_t val = bus_space_read_4(bktr->memt, bktr->memh, offset);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 4,
|
||||
BUS_SPACE_BARRIER_READ);
|
||||
return val;
|
||||
}
|
||||
|
||||
void
|
||||
bktr_OUTB(struct bktr_softc *bktr, int offset, u_int8_t value)
|
||||
{
|
||||
bus_space_write_1(bktr->memt, bktr->memh, offset, value);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 1,
|
||||
BUS_SPACE_BARRIER_WRITE);
|
||||
}
|
||||
|
||||
void
|
||||
bktr_OUTW(struct bktr_softc *bktr, int offset, u_int16_t value)
|
||||
{
|
||||
bus_space_write_2(bktr->memt, bktr->memh, offset, value);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 2,
|
||||
BUS_SPACE_BARRIER_WRITE);
|
||||
}
|
||||
|
||||
void
|
||||
bktr_OUTL(struct bktr_softc *bktr, int offset, u_int32_t value)
|
||||
{
|
||||
bus_space_write_4(bktr->memt, bktr->memh, offset, value);
|
||||
bus_space_barrier(bktr->memt, bktr->memh, offset, 4,
|
||||
BUS_SPACE_BARRIER_WRITE);
|
||||
}
|
||||
|
||||
#endif /* __NetBSD__ */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bktr_reg.h,v 1.11 2002/10/23 02:32:36 christos Exp $ */
|
||||
/* $NetBSD: bktr_reg.h,v 1.12 2003/01/10 01:38:53 mjl Exp $ */
|
||||
|
||||
/*
|
||||
* FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp
|
||||
|
|
@ -464,17 +464,41 @@ struct bktr_i2c_softc {
|
|||
/* Bt848/878 register access
|
||||
* The registers can either be access via a memory mapped structure
|
||||
* or accessed via bus_space.
|
||||
* bus_0pace access allows cross platform support, where as the
|
||||
* bus_space access allows cross platform support, where as the
|
||||
* memory mapped structure method only works on 32 bit processors
|
||||
* with the right type of endianness.
|
||||
*/
|
||||
#if defined(__NetBSD__) || ( defined(__FreeBSD__) && (__FreeBSD_version >=300000) )
|
||||
|
||||
#if defined(__NetBSD__)
|
||||
|
||||
struct bktr_softc;
|
||||
|
||||
u_int8_t bktr_INB(struct bktr_softc *, int);
|
||||
u_int16_t bktr_INW(struct bktr_softc *, int);
|
||||
u_int32_t bktr_INL(struct bktr_softc *, int);
|
||||
void bktr_OUTB(struct bktr_softc *, int, u_int8_t);
|
||||
void bktr_OUTW(struct bktr_softc *, int, u_int16_t);
|
||||
void bktr_OUTL(struct bktr_softc *, int, u_int32_t);
|
||||
|
||||
#define INB(bktr,offset) bktr_INB(bktr,offset)
|
||||
#define INW(bktr,offset) bktr_INW(bktr,offset)
|
||||
#define INL(bktr,offset) bktr_INL(bktr,offset)
|
||||
#define OUTB(bktr,offset,value) bktr_OUTB(bktr,offset,value)
|
||||
#define OUTW(bktr,offset,value) bktr_OUTW(bktr,offset,value)
|
||||
#define OUTL(bktr,offset,value) bktr_OUTL(bktr,offset,value)
|
||||
|
||||
#else
|
||||
|
||||
#define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
|
||||
#define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
|
||||
#define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
|
||||
#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
|
||||
#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
|
||||
#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
|
||||
|
||||
#endif /* __NetBSD__ */
|
||||
|
||||
#else
|
||||
#define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset))
|
||||
#define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset))
|
||||
|
|
|
|||
Loading…
Reference in New Issue