Added get_pte() routine to get a pte from a logical address using ptest.
Cleaned up startup code in a big way. Now calling get_mapping() if '030 and MMU is on, and post-processing our page tables with remap_MMU().
This commit is contained in:
parent
f6e6044227
commit
f81b696a46
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@ -86,7 +86,7 @@
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* from: Utah $Hdr: locore.s 1.58 91/04/22$
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*
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* from: @(#)locore.s 7.11 (Berkeley) 5/9/91
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* $Id: locore.s,v 1.21 1994/07/10 16:58:08 briggs Exp $
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* $Id: locore.s,v 1.22 1994/07/31 08:19:46 lkestel Exp $
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*/
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#include "assym.s"
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@ -781,14 +781,17 @@ _Umap: .long 0
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| Scratch memory. Careful when messing with these...
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longscratch: .long 0
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longscratch2: .long 0
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macos_crp1: .long 0
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macos_crp2: .long 0
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macos_tc: .long 0
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macos_tt0: .long 0
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macos_tt1: .long 0
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pte_tmp: .long 0 | for get_pte()
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_macos_crp1: .long 0
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_macos_crp2: .long 0
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_macos_tc: .long 0
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_macos_tt0: .long 0
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_macos_tt1: .long 0
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_bletch: .long 0
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_esym: .long 0
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.globl _kstack, _Umap, _esym, _bletch
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.globl _macos_crp1, _macos_crp2, _macos_tc
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.globl _macos_tt0, _macos_tt1
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/*
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* Initialization
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@ -857,7 +860,7 @@ start:
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.globl _initenv, _getenvvars | in machdep.c
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.globl _setmachdep | in machdep.c
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.globl _printenvvars
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.globl _mmudebug, _gothere, _getphysical
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.globl _gothere, _getphysical
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movl a1, sp@- | Address of buffer
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movl d4, sp@- | Some flags... (probably not used)
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@ -870,6 +873,7 @@ start:
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jbsr _setmachdep | Set some machine-dep stuff
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jbsr _vm_set_page_size | Set the vm system page size, now.
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jbsr _consinit | XXX Should only be if graybar on
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tstl _cpu040
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beq Lstartnot040 | It's not an '040
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@ -913,103 +917,36 @@ Lisa68020:
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movl #MMU_68851, _mmutype | 68020, implies 68851, or crash.
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Lmmufigured:
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| LAK: (1/2/94) We need to find out if the MMU is already on. If it is
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| LAK: (7/25/94) We need to find out if the MMU is already on. If it is
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| not, fine. If it is, then we must get at it because it tells us a lot
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| of information, such as our load address (_load_addr) and the video
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| physical address. The MacOS page maps are not mapped into our
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| virtual space, so we must use the TT0 register to get to them.
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| Of course, "gas" does not know about the "tt0" register, so we
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| must hand-assemble the instruction.
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| physical address, not to mention how the memory banks are setup.
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| All this is only applicable to '030s.
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lea macos_tc,a0
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lea _macos_tc,a0
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pmove tc,a0@
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btst #31,a0@ | Bit #31 is Enabled bit
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jeq mmu_off
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| LAK: MMU is on; find out how it is mapped. MacOS uses the CRP.
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| MMU is on; if not '030, then just turn it off
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tstl _mmutype | ttx instructions will break 68851
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jgt LnocheckTT
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lea macos_tt0,a0 | save it for later inspection
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.long 0xF0100A00 | pmove tt0,a0@
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lea macos_tt1,a0 | save it for later inspection
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.long 0xF0100E00 | pmove tt1,a0@
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LnocheckTT:
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jbsr _gray_bar | 2 - Finished storing MacOS TTs
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jne Lnoremap | not '030 -- skip all this
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lea macos_crp1,a0
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pmove crp,a0@ | Save MacOS
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tstl _mmutype | ttx instructions will break 68851
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| Assume that 68851 maps are in ROMs, which we can already read.
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jgt LnosetTT
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| This next line gets the second
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| long word of the RP, the address...
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movl macos_crp2,d0 | address of root table
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andl #0xFF000000,d0 | fix up for tt0 register
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orl #0x00018600,d0
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movl d0,longscratch
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lea longscratch,a0
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.long 0xF0100800 | pmove a0@,tt0
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LnosetTT:
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jbsr _gray_bar | 3 - Finished setting TT0 for PTs
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movl #0,a0 | address to test (logical 0)
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ptestr #0,a0@,#7,a1 | puts last pte in a1
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pmove psr,longscratch2
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movl a1,macos_crp1 | save it for later inspection
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#if 0
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movl a1@,macos_crp2 | save it for later inspection
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movl a0,sp@- | push test address
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movw longscratch2,sp@- | push status word,
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movw #0,sp@-
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movl a1@,sp@- | PTE,
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movl macos_tc,sp@- | and TC
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jbsr _getphysical | in machdep.c
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addl #16,sp | physical address in d0
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| find out how it is mapped
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jbsr _get_mapping | in machdep; returns logical 0 in d0
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movl d0,_load_addr | this is our physical load address
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jbsr _gray_bar | (not drawn) - got phys load addr
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jra Ldoneremap
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movl _videoaddr,a0 | get logical address of video
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ptestr #0,a0@,#7,a1 | puts last pte in a1
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pmove psr,longscratch2
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movl a1,macos_crp1 | save it for later inspection
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movl a1@,macos_crp2 | save it for later inspection
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movl a0,sp@- | push test address
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movw longscratch2,sp@- | push status word,
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movw #0,sp@-
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movl a1@,sp@- | PTE,
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movl macos_tc,sp@- | and TC
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jbsr _getphysical | in machdep.c
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addl #16,sp | physical address in d0
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movl d0,_bletch | this is physical addr of video
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#endif
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jbsr _gray_bar | 4 - got CRP, got phys load & video
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| This next part is cool because on the machines we currently work
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| on, the physical and logical load addresses are both 0. This is
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| why the CI works without external video, but to load at Bank B,
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| we will have to leave the MMU on.
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| (Or have a phys=log jump point. Sounds like sci-fi, doesn't it?)
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| -BG
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| Turn off the MMU
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#if !defined(IICI)
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Lnoremap:
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| If not on '030, then just turn off the MMU cuase we don't need it.
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lea longscratch,a0
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movl #0,a0@
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pmove a0@,tc
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#endif
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jbsr _gray_bar | 5 - Turned off MMU
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| jbsr _macserinit
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Ldoneremap:
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jbsr _gray_bar | 5 - Handled MMU
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jbsr _gray_bar | 6 - Initialized serial, no interrupts
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movl longscratch2, sp@-
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movl macos_crp1, sp@-
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movl macos_crp2, sp@-
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jbsr _mmudebug
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lea sp@(12), sp
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mmu_off:
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@ -1279,14 +1216,12 @@ Lipt4:
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jbsr _gray_bar | 11 - progress
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/* LAK: Initialize external IO PTE in kernel PT (this is the nubus space) */
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/* This section wasn't here at all. How did they initialize their EIO */
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/* space? (BARF) */
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movl _Sysptsize,d0 | initial system PT size (pages)
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addl #(IIOMAPSIZE+NPTEPG-1)/NPTEPG,d0 | start of nubus PT
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movl #PGSHIFT,d1 | PT to bytes
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lsll d1,d0 | # of page tables
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movl d0,a0
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addl sp@+,a0 | + start of kernel PT = start of IO
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addl sp@,a0 | + start of kernel PT = start of IO
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movl a0,a2 | ptr to end of PTEs to init
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addl #NBMAPSIZE*4,a2 | # of PTE to initialize
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movl #NBBASE,d1 | Start of IO space
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@ -1298,6 +1233,27 @@ Lipt5:
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cmpl a2,a0 | done yet?
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jcs Lipt5 | no, keep going
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#ifdef MACHINE_NONCONTIG
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/*
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* LAK: (7/30/94) If the MMU was on when we booted and we're on
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* an '030, then we have information about how MacOS had mapped
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* the NuBus space. This function re-maps NuBus the same way
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* so we can use internal video. At the same time, it remaps
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* the kernel pages in case we were split between banks (e.g.,
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* on a IIsi with internal video plugged out).
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*
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* This is the first function in this part of locore that we
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* took out to C instead of writing in assembly. I hope we
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* can take more out, cause all this stuff is pretty unreadable.
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*/
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movl sp@,a0 | can I do this in one step?
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movl a0,sp@- | address of start of kernel PT
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jbsr _remap_MMU
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addl #4,sp
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#endif
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addl #4,sp | pop start of PT address
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/*
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* Setup page table for process 0.
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*
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@ -1345,98 +1301,6 @@ Lclru1:
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jbsr _gray_bar | 12 - progress
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#if defined(MACHINE_NONCONTIG)
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jmp foobar3
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foobar1:
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/*
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* LAK: Before we enable the MMU, we check to see if it is already
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* on. If it is, then MacOS must have mapped memory in some way;
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* all of the page tables that we just created are wrong, and
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* we must re-map them properly. To do this, we walk through
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* our new page tables, find the physical address of each
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* of the logital addresses we've set up, and stick this physical
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* address in our page maps. We've also got to do some fancy
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* register-tweaking to enable the MMU.
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*/
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movl #1,sp@-
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movl #2,sp@-
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movl #3,sp@-
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jbsr _mmudebug
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addl #12,sp
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pmove tc,a2@ | get the current tc
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movl a2@,sp@-
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movl a2@,sp@-
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movl a2@,sp@-
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jbsr _mmudebug
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addl #12,sp
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pmove tc,a2@ | get the current tc
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btst #31,a2@ | check enable bit
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jeq MMUoff | if off, proceed as normal
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jbsr _remap_MMU | if on, remap everything
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clrl d2 | logical address
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movl _Sysseg,a3 | go through system segment map
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movl a3,a4 | a4 = end of map
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addl NBPG,a4
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remap_more:
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cmpl a3,a4 | go until end of system seg map
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jge done_remap
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movl a3@,d3 | get system segment entry
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btst #1,d3 | check valid flag
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jeq skip_segment | skip entire segment if not valid
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andl #0xFFFFFFF0,d5 | mask off DT bits and such
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movl d3,a5 | start inner loop of segment
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movl a5,a6 | a6 = end of page table
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addl NBPG,a6
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remap_more_pt:
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cmpl a5,a6 | go until end of page table
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jge done_remap_pt
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movl a5@,d3 | get page table entry
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btst #0,d3 | test valid bit
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jeq skip_page | if not, don't do anything
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andl #0x000000FF,d3 | keep DT bits and such
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movl d2,a1 | move logical address
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movl d2,sp@-
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movl d2,sp@-
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movl d2,sp@-
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jbsr _mmudebug
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addl #12,sp
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ptestr #1,a1@,#7,a0 | get physical address
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movl a0,d0
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orl d3,d0 | replace DT bits and such
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movl d0,a5@ | and fix page table entry
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skip_page:
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addl #NBPG,d2
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addl #4,a5
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jmp remap_more_pt
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done_remap_pt:
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jmp dont_skip_segment
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skip_segment:
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addl #(NBPG*1000),d2
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dont_skip_segment:
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addl #4,a3
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jmp remap_more
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done_remap:
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MMUoff:
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movl #4,sp@-
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movl #5,sp@-
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movl #6,sp@-
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jbsr _mmudebug
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addl #12,sp
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jmp foobar2
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foobar3:
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#endif /* MACHINE_NONCONTIG */
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.globl _dump_pmaps
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| jbsr _dump_pmaps
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@ -1455,11 +1319,14 @@ foobar3:
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jbsr _gray_bar | #15
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movl #0x80000002,a0@ | reinit upper half for CRP loads
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movl #8,sp@-
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movl #9,sp@-
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movl a1,sp@-
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jbsr _mmudebug
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lea sp@(12),sp
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| LAK: Kill the TT0 and TT1 registers so the don't screw us up later.
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tstl _mmutype | ttx instructions will break 68851
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jne LnokillTT
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lea longscratch,a0
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movl #0, a0@
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.long 0xF0100800 | movl a0@,tt0
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.long 0xF0100C00 | movl a0@,tt1
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LnokillTT:
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jbsr _gray_bar | #16
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/* BARF: A line which was here enabled the FPE and i-cache */
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@ -1467,21 +1334,7 @@ foobar3:
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movl #0x82c0aa00,a2@ | value to load TC with
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pmove a2@,tc | load it
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| LAK: Kill the TT0 and TT1 registers so the don't screw us up later.
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tstl _mmutype | ttx instructions will break 68851
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jgt LnokillTT
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lea longscratch,a0
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movl #0, a0@
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.long 0xF0100800 | movl a0@,tt0
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.long 0xF0100C00 | movl a0@,tt1
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LnokillTT:
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jbsr _gray_bar | #17
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movl #5, sp@-
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movl #6, sp@-
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movl #7, sp@-
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jbsr _mmudebug
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lea sp@(12), sp
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pflusha | make sure it's clean
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@ -1497,6 +1350,10 @@ foobar2:
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* Should be running mapped from this point on
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*/
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/* init mem sizes */
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/*
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* XXX LAK: we should get rid of maxmem and physmem entirely now that
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* we use noncontig.
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*/
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movl lastpage,d1 | last page of ram from MacOS
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moveq #PGSHIFT,d2
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lsrl d2,d1 | convert to page (click) number
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@ -1512,7 +1369,6 @@ foobar2:
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* LAK: We do have PA == VA, but we'll leave things the way they
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* are for now.
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*/
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.globl _avail_start
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lea tmpstk,sp | temporary stack
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movl _load_addr,sp@- | phys load address
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addl _load_addr,a4 | need physical address
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@ -2659,6 +2515,8 @@ _doboot:
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movl #CACHE_OFF,d0
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movc d0,cacr | disable on-chip cache(s)
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| XXX Turning off the MMU here causes the PC to be nowhere for IIci
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| and IIsi machines. Not turning off the MMU causes an MMU fault.
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lea longscratch,a0 | make sure we have real memory
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movl #0,a0@ | value for pmove to TC (turn off MMU)
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pmove a0@,tc | disable MMU
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@ -2666,6 +2524,263 @@ _doboot:
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movl #0x40800090,a1 | address of ROM
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jra a1@ | jump to ROM to reset machine
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/*
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* LAK: (7/24/94) This routine was added so that the
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* C routine that runs at startup can figure out how MacOS
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* had mapped memory. We want to keep the same mapping so
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* that when we set our MMU pointer, the PC doesn't point
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* in the middle of nowhere.
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*
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* long get_pte(void *addr, unsigned long pte[2], unsigned short *psr)
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*
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* Takes "addr" and looks it up in the current MMU pages. Puts
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* the PTE of that address in "pte" and the result of the
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* search in "psr". "pte" should be 2 longs in case it is
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* a long-format entry.
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*
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* One possible problem here is that setting the tt register
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* may screw something up if, say, the address returned by ptest
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* in a0 has msb of 0.
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*
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* Returns -1 on error, 0 if pte is a short-format pte, or
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* 1 if pte is a long-format pte.
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*
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* Be sure to only call this routine if the MMU is enabled. This
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* routine is probably more general than it needs to be -- it
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* could simply return the physical address (replacing
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* get_physical() in machdep).
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*
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* "gas" does not understand the tt0 register, so we must hand-
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* assemble the instructions.
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*/
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.globl _get_pte
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_get_pte:
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addl #-4,sp | make temporary space
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movl sp@(8),a0 | logical address to look up
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movl #0,a1 | clear in case of failure
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ptestr #1,a0@,#7,a1 | search for logical address
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pmove psr,sp@ | store processor status register
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movw sp@,d1
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movl sp@(16),a0 | where to store the psr
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movw d1,a0@ | send back to caller
|
||||
andw #0xc400,d1 | if bus error, exceeded limit, or invalid
|
||||
jne get_pte_fail1 | leave now
|
||||
tstl a1 | check address we got back
|
||||
jeq get_pte_fail2 | if 0, then was not set -- fail
|
||||
|
||||
| enable tt0
|
||||
movl a1,d0
|
||||
movl d0,pte_tmp1 | save for later
|
||||
andl #0xff000000,d0 | keep msb
|
||||
orl #0x00008707,d0 | enable tt for reading and writing
|
||||
movl d0,longscratch
|
||||
lea longscratch,a0
|
||||
.long 0xf0100800 | pmove a0@,tt0
|
||||
|
||||
| send first long back to user
|
||||
movl sp@(12),a0 | address of where to put pte
|
||||
movl a1@,d0 |
|
||||
movl d0,a0@ | first long
|
||||
|
||||
andl #3,d0 | dt bits of pte
|
||||
cmpl #1,d0 | should be 1 if page descriptor
|
||||
jne get_pte_fail3 | if not, get out now
|
||||
|
||||
movl sp@(16),a0 | addr of stored psr
|
||||
movw a0@,d0 | get psr again
|
||||
andw #7,d0 | number of levels it found
|
||||
addw #-1,d0 | find previous level
|
||||
movl sp@(8),a0 | logical address to look up
|
||||
movl #0,a1 | clear in case of failure
|
||||
|
||||
cmpl #0,d0
|
||||
jeq pte_level_zero
|
||||
cmpl #1,d0
|
||||
jeq pte_level_one
|
||||
cmpl #2,d0
|
||||
jeq pte_level_two
|
||||
cmpl #3,d0
|
||||
jeq pte_level_three
|
||||
cmpl #4,d0
|
||||
jeq pte_level_four
|
||||
cmpl #5,d0
|
||||
jeq pte_level_five
|
||||
cmpl #6,d0
|
||||
jeq pte_level_six
|
||||
jra get_pte_fail4 | really should have been one of these...
|
||||
|
||||
pte_level_zero:
|
||||
| must get CRP to get length of entries at first level
|
||||
lea longscratch,a0 | space for two longs
|
||||
pmove crp,a0@ | save root pointer
|
||||
movl a0@,d0 | load high long
|
||||
jra pte_got_parent
|
||||
pte_level_one:
|
||||
ptestr #1,a0@,#1,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
jra pte_got_it
|
||||
pte_level_two:
|
||||
ptestr #1,a0@,#2,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
jra pte_got_it
|
||||
pte_level_three:
|
||||
ptestr #1,a0@,#3,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
jra pte_got_it
|
||||
pte_level_four:
|
||||
ptestr #1,a0@,#4,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
jra pte_got_it
|
||||
pte_level_five:
|
||||
ptestr #1,a0@,#5,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
jra pte_got_it
|
||||
pte_level_six:
|
||||
ptestr #1,a0@,#6,a1 | search for logical address
|
||||
pmove psr,sp@ | store processor status register
|
||||
movw sp@,d1
|
||||
|
||||
pte_got_it:
|
||||
andw #0xc400,d1 | if bus error, exceeded limit, or invalid
|
||||
jne get_pte_fail5 | leave now
|
||||
tstl a1 | check address we got back
|
||||
jeq get_pte_fail6 | if 0, then was not set -- fail
|
||||
|
||||
| change tt0
|
||||
movl a1,d0
|
||||
andl #0xff000000,d0 | keep msb
|
||||
orl #0x00008707,d0 | enable tt for reading and writing
|
||||
movl d0,longscratch
|
||||
lea longscratch,a0
|
||||
.long 0xF0100800 | pmove a0@,tt0
|
||||
|
||||
movl a1@,d0 | get pte of parent
|
||||
movl d0,_macos_tt0 | XXX for later analysis (kill this line)
|
||||
pte_got_parent:
|
||||
andl #3,d0 | dt bits of pte
|
||||
cmpl #2,d0 | child is short-format descriptor
|
||||
jeq short_format
|
||||
cmpl #3,d0 | child is long-format descriptor
|
||||
jne get_pte_fail7
|
||||
|
||||
| long_format -- we must go back, change the tt, and get the
|
||||
| second long. The reason we didn't do this in the first place
|
||||
| is that the first long might have been the last long of RAM.
|
||||
|
||||
movl pte_tmp1@,a1 | get address of our original pte
|
||||
addl #4,a1 | address of ite second long
|
||||
|
||||
| change tt0 back
|
||||
movl a1,d0
|
||||
andl #0xff000000,d0 | keep msb
|
||||
orl #0x00008707,d0 | enable tt for reading and writing
|
||||
movl d0,longscratch
|
||||
lea longscratch,a0
|
||||
.long 0xF0100800 | pmove a0@,tt0
|
||||
|
||||
movl sp@(12),a0 | address of return pte
|
||||
movl a1@,a0@(4) | write in second long
|
||||
|
||||
movl #1,d0 | return long-format
|
||||
jra get_pte_success
|
||||
|
||||
short_format:
|
||||
movl #0,d0 | return short-format
|
||||
jra get_pte_success
|
||||
|
||||
get_pte_fail:
|
||||
movl #-1,d0 | return failure
|
||||
|
||||
get_pte_success:
|
||||
clrl d1 | disable tt
|
||||
movl d1,longscratch
|
||||
lea longscratch,a0
|
||||
.long 0xF0100800 | pmove a0@,tt0
|
||||
|
||||
addl #4,sp | return temporary space
|
||||
rts
|
||||
|
||||
get_pte_fail1:
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail2:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail3:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail4:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail5:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail6:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail7:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail8:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail9:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
get_pte_fail10:
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jbsr _printstar
|
||||
jra get_pte_fail
|
||||
|
||||
.data
|
||||
.globl _sanity_check
|
||||
_sanity_check:
|
||||
|
|
Loading…
Reference in New Issue