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Misc bus_dma(9) related cleanup:

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- calculate each descriptor sizes and offsets in iee_attach() and store them
  into softc, rather than re-calculating them everywhere via macros
- prepare macros to sync DMA shmem per each descriptor
- sync only necessary descriptors in iee_intr() and iee_start()
- make sure SCB_FOO macros take softc as an arg properly
- use bus_dmamap_load_mbuf(9) for RX mbufs
- put 2 byte alignments to RX mbufs

XXX: still slower than ie(4) in i82586 compat mode on HP9000 735/125.
This commit is contained in:
tsutsui 2009-05-10 04:26:19 +00:00
parent dd0402b09c
commit f76d0651b7
4 changed files with 313 additions and 247 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
sys/arch/ews4800mips/sbd/if_iee_sbdio.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_iee_sbdio.c,v 1.8 2009/05/09 03:22:20 tsutsui Exp $ */
/* $NetBSD: if_iee_sbdio.c,v 1.9 2009/05/10 04:26:19 tsutsui Exp $ */
/*
* Copyright (c) 2003 Jochen Kunz.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_iee_sbdio.c,v 1.8 2009/05/09 03:22:20 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_iee_sbdio.c,v 1.9 2009/05/10 04:26:19 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -121,19 +121,16 @@ iee_sbdio_cmd(struct iee_softc *sc, uint32_t cmd)
int n;
uint32_t ack;
SC_SCB->scb_cmd = cmd;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF, IEE_SCB_SZ,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
SC_SCB(sc)->scb_cmd = cmd;
IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
iee_sbdio_channel_attention(sc);
/* Wait for the cmd to finish */
for (n = 0 ; n < retry; n++) {
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF,
IEE_SCB_SZ, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
ack = SC_SCB->scb_cmd;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF,
IEE_SCB_SZ, BUS_DMASYNC_PREREAD);
IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
ack = SC_SCB(sc)->scb_cmd;
IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD);
if (ack == 0)
break;
delay(1);
@ -155,13 +152,11 @@ iee_sbdio_reset(struct iee_softc *sc)
uint32_t cmd, ack;
/* Make sure the busy byte is set and the cache is flushed. */
SC_ISCP->iscp_bussy = IEE_ISCP_BUSSY;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map,
IEE_SCP_OFF, IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
SC_ISCP(sc)->iscp_bussy = IEE_ISCP_BUSSY;
IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
/* Setup the PORT Command with pointer to SCP. */
cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(IEE_SCP_OFF);
cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(sc->sc_scp_off);
/* Initiate a Hardware reset. */
printf("%s: reseting chip... ", device_xname(sc->sc_dev));
@ -172,11 +167,9 @@ iee_sbdio_reset(struct iee_softc *sc)
/* Wait for the chip to initialize and read SCP and ISCP. */
for (n = 0 ; n < retry; n++) {
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_ISCP_OFF,
IEE_ISCP_SZ, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
ack = SC_ISCP->iscp_bussy;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_ISCP_OFF,
IEE_ISCP_SZ, BUS_DMASYNC_PREREAD);
IEE_ISCPSYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
ack = SC_ISCP(sc)->iscp_bussy;
IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD);
if (ack != IEE_ISCP_BUSSY) {
break;
}

35
sys/arch/hp700/gsc/if_iee_gsc.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_iee_gsc.c,v 1.13 2009/05/09 11:39:30 skrll Exp $ */
/* $NetBSD: if_iee_gsc.c,v 1.14 2009/05/10 04:26:19 tsutsui Exp $ */
/*
* Copyright (c) 2003 Jochen Kunz.
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.13 2009/05/09 11:39:30 skrll Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.14 2009/05/10 04:26:19 tsutsui Exp $");
/* autoconfig and device stuff */
#include <sys/param.h>
@ -115,19 +115,16 @@ iee_gsc_cmd(struct iee_softc *sc, u_int32_t cmd)
int n;
uint16_t ack;
SC_SCB->scb_cmd = cmd;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF, IEE_SCB_SZ,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
SC_SCB(sc)->scb_cmd = cmd;
IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
/* Issue a Channel Attention to force the chip to read the cmd. */
bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
/* Wait for the cmd to finish */
for (n = 0 ; n < 100000; n++) {
DELAY(1);
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF,
IEE_SCB_SZ, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
ack = SC_SCB->scb_cmd;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCB_OFF,
IEE_SCB_SZ, BUS_DMASYNC_PREREAD);
IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
ack = SC_SCB(sc)->scb_cmd;
IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD);
if (ack == 0)
break;
}
@ -146,12 +143,10 @@ iee_gsc_reset(struct iee_softc *sc)
uint16_t ack;
/* Make sure the bussy byte is set and the cache is flushed. */
SC_ISCP->iscp_bussy = IEE_ISCP_BUSSY;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_SCP_OFF, IEE_SCP_SZ
+ IEE_ISCP_SZ + IEE_SCB_SZ,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
SC_ISCP(sc)->iscp_bussy = IEE_ISCP_BUSSY;
IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
/* Setup the PORT Command with pointer to SCP. */
cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(IEE_SCP_OFF);
cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(sc->sc_scp_off);
/* Write a word to IEE_GSC_RESET to initiate a Hardware reset. */
bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_RESET, 0);
DELAY(1000);
@ -174,11 +169,9 @@ iee_gsc_reset(struct iee_softc *sc)
bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
/* Wait for the chip to initialize and read SCP and ISCP. */
for (n = 0 ; n < 1000; n++) {
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_ISCP_OFF,
IEE_ISCP_SZ, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
ack = SC_ISCP->iscp_bussy;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_ISCP_OFF,
IEE_ISCP_SZ, BUS_DMASYNC_PREREAD);
IEE_ISCPSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
ack = SC_ISCP(sc)->iscp_bussy;
IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD);
if (ack != IEE_ISCP_BUSSY)
break;
DELAY(100);
@ -189,7 +182,7 @@ iee_gsc_reset(struct iee_softc *sc)
return 0;
}
printf("%s: iee_gsc_reset timeout bussy=0x%x\n",
device_xname(sc->sc_dev), SC_ISCP->iscp_bussy);
device_xname(sc->sc_dev), SC_ISCP(sc)->iscp_bussy);
return -1;
}

384
sys/dev/ic/i82596.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: i82596.c,v 1.24 2009/05/09 20:44:56 tsutsui Exp $ */
/* $NetBSD: i82596.c,v 1.25 2009/05/10 04:26:19 tsutsui Exp $ */
/*
* Copyright (c) 2003 Jochen Kunz.
@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: i82596.c,v 1.24 2009/05/09 20:44:56 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: i82596.c,v 1.25 2009/05/10 04:26:19 tsutsui Exp $");
/* autoconfig and device stuff */
#include <sys/param.h>
@ -207,42 +207,60 @@ iee_intr(void *intarg)
int scb_status;
int scb_cmd;
int n, col;
uint16_t status, count, cmd;
if ((ifp->if_flags & IFF_RUNNING) == 0) {
(sc->sc_iee_cmd)(sc, IEE_SCB_ACK);
return 1;
}
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX,
BUS_DMASYNC_POSTREAD);
scb_status = SC_SCB->scb_status;
scb_cmd = SC_SCB->scb_cmd;
rfd = SC_RFD(sc->sc_rx_done);
while ((rfd->rfd_status & IEE_RFD_C) != 0) {
IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD);
scb_status = SC_SCB(sc)->scb_status;
scb_cmd = SC_SCB(sc)->scb_cmd;
for (;;) {
rfd = SC_RFD(sc, sc->sc_rx_done);
IEE_RFDSYNC(sc, sc->sc_rx_done,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
status = rfd->rfd_status;
if ((status & IEE_RFD_C) == 0) {
IEE_RFDSYNC(sc, sc->sc_rx_done, BUS_DMASYNC_PREREAD);
break;
}
rfd->rfd_status = 0;
IEE_RFDSYNC(sc, sc->sc_rx_done,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
/* At least one packet was received. */
rbd = SC_RBD(sc->sc_rx_done);
rx_map = sc->sc_rx_map[sc->sc_rx_done];
rx_mbuf = sc->sc_rx_mbuf[sc->sc_rx_done];
SC_RBD((sc->sc_rx_done + IEE_NRFD - 1) % IEE_NRFD)->rbd_size
IEE_RBDSYNC(sc, (sc->sc_rx_done + IEE_NRFD - 1) % IEE_NRFD,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
SC_RBD(sc, (sc->sc_rx_done + IEE_NRFD - 1) % IEE_NRFD)->rbd_size
&= ~IEE_RBD_EL;
if ((rfd->rfd_status & IEE_RFD_OK) == 0
|| (rbd->rbd_count & IEE_RBD_EOF) == 0
|| (rbd->rbd_count & IEE_RBD_F) == 0){
IEE_RBDSYNC(sc, (sc->sc_rx_done + IEE_NRFD - 1) % IEE_NRFD,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
rbd = SC_RBD(sc, sc->sc_rx_done);
IEE_RBDSYNC(sc, sc->sc_rx_done,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
count = rbd->rbd_count;
if ((status & IEE_RFD_OK) == 0
|| (count & IEE_RBD_EOF) == 0
|| (count & IEE_RBD_F) == 0){
/* Receive error, skip frame and reuse buffer. */
rfd->rfd_status = 0;
rbd->rbd_count = 0;
rbd->rbd_size = IEE_RBD_EL | rx_map->dm_segs[0].ds_len;
IEE_RBDSYNC(sc, sc->sc_rx_done,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
printf("%s: iee_intr: receive error %d, rfd_status="
"0x%.4x, rfd_count=0x%.4x\n",
device_xname(sc->sc_dev),
++sc->sc_rx_err, rfd->rfd_status, rbd->rbd_count);
++sc->sc_rx_err, status, count);
sc->sc_rx_done = (sc->sc_rx_done + 1) % IEE_NRFD;
continue;
}
rfd->rfd_status = 0;
bus_dmamap_sync(sc->sc_dmat, rx_map, 0, rx_mbuf->m_ext.ext_size,
BUS_DMASYNC_POSTREAD);
rx_mbuf->m_pkthdr.len = rx_mbuf->m_len =
rbd->rbd_count & IEE_RBD_COUNT;
count & IEE_RBD_COUNT;
rx_mbuf->m_pkthdr.rcvif = ifp;
MGETHDR(new_mbuf, M_DONTWAIT, MT_DATA);
if (new_mbuf == NULL) {
@ -259,13 +277,14 @@ iee_intr(void *intarg)
break;
}
bus_dmamap_unload(sc->sc_dmat, rx_map);
if (bus_dmamap_load(sc->sc_dmat, rx_map,
new_mbuf->m_ext.ext_buf, new_mbuf->m_ext.ext_size,
NULL, BUS_DMA_READ | BUS_DMA_NOWAIT) != 0)
new_mbuf->m_len = new_mbuf->m_pkthdr.len = MCLBYTES - 2;
new_mbuf->m_data += 2;
if (bus_dmamap_load_mbuf(sc->sc_dmat, rx_map,
new_mbuf, BUS_DMA_READ | BUS_DMA_NOWAIT) != 0)
panic("%s: iee_intr: can't load RX DMA map\n",
device_xname(sc->sc_dev));
bus_dmamap_sync(sc->sc_dmat, rx_map, 0,
new_mbuf->m_ext.ext_size, BUS_DMASYNC_PREREAD);
rx_map->dm_mapsize, BUS_DMASYNC_PREREAD);
#if NBPFILTER > 0
if (ifp->if_bpf != 0)
bpf_mtap(ifp->if_bpf, rx_mbuf);
@ -276,114 +295,138 @@ iee_intr(void *intarg)
rbd->rbd_count = 0;
rbd->rbd_size = IEE_RBD_EL | rx_map->dm_segs[0].ds_len;
rbd->rbd_rb_addr = IEE_SWAPA32(rx_map->dm_segs[0].ds_addr);
IEE_RBDSYNC(sc, sc->sc_rx_done,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc->sc_rx_done = (sc->sc_rx_done + 1) % IEE_NRFD;
rfd = SC_RFD(sc->sc_rx_done);
}
if ((scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR1
|| (scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR2
|| (scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR3) {
/* Receive Overrun, reinit receive ring buffer. */
for (n = 0 ; n < IEE_NRFD ; n++) {
SC_RFD(n)->rfd_cmd = IEE_RFD_SF;
SC_RFD(n)->rfd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RFD_OFF
+ IEE_RFD_SZ * ((n + 1) % IEE_NRFD)));
SC_RBD(n)->rbd_next_rbd =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RBD_OFF
+ IEE_RBD_SZ * ((n + 1) % IEE_NRFD)));
SC_RBD(n)->rbd_size = IEE_RBD_EL |
rfd = SC_RFD(sc, n);
rbd = SC_RBD(sc, n);
rfd->rfd_cmd = IEE_RFD_SF;
rfd->rfd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rfd_off
+ sc->sc_rfd_sz * ((n + 1) % IEE_NRFD)));
rbd->rbd_next_rbd =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rbd_off
+ sc->sc_rbd_sz * ((n + 1) % IEE_NRFD)));
rbd->rbd_size = IEE_RBD_EL |
sc->sc_rx_map[n]->dm_segs[0].ds_len;
SC_RBD(n)->rbd_rb_addr =
rbd->rbd_rb_addr =
IEE_SWAPA32(sc->sc_rx_map[n]->dm_segs[0].ds_addr);
}
SC_RFD(0)->rfd_rbd_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RBD_OFF));
SC_RFD(sc, 0)->rfd_rbd_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rbd_off));
sc->sc_rx_done = 0;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_RFD_OFF,
IEE_RFD_LIST_SZ + IEE_RBD_LIST_SZ, BUS_DMASYNC_PREWRITE);
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, sc->sc_rfd_off,
sc->sc_rfd_sz * IEE_NRFD + sc->sc_rbd_sz * IEE_NRFD,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
(sc->sc_iee_cmd)(sc, IEE_SCB_RUC_ST);
printf("%s: iee_intr: receive ring buffer overrun\n",
device_xname(sc->sc_dev));
}
if (sc->sc_next_cb != 0
&& (SC_CB(sc->sc_next_cb - 1)->cb_status & IEE_CB_C) != 0) {
/* CMD list finished */
ifp->if_timer = 0;
if (sc->sc_next_tbd != 0) {
/* A TX CMD list finished, cleanup */
for (n = 0 ; n < sc->sc_next_cb ; n++) {
m_freem(sc->sc_tx_mbuf[n]);
sc->sc_tx_mbuf[n] = NULL;
bus_dmamap_unload(sc->sc_dmat,sc->sc_tx_map[n]);
if ((SC_CB(n)->cb_status & IEE_CB_COL) != 0 &&
(SC_CB(n)->cb_status & IEE_CB_MAXCOL) == 0)
col = 16;
else
col = SC_CB(n)->cb_status
& IEE_CB_MAXCOL;
sc->sc_tx_col += col;
if ((SC_CB(n)->cb_status & IEE_CB_OK) != 0) {
ifp->if_opackets++;
ifp->if_collisions += col;
if (sc->sc_next_cb != 0) {
IEE_CBSYNC(sc, sc->sc_next_cb - 1,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
status = SC_CB(sc, sc->sc_next_cb - 1)->cb_status;
IEE_CBSYNC(sc, sc->sc_next_cb - 1,
BUS_DMASYNC_PREREAD);
if ((status & IEE_CB_C) != 0) {
/* CMD list finished */
ifp->if_timer = 0;
if (sc->sc_next_tbd != 0) {
/* A TX CMD list finished, cleanup */
for (n = 0 ; n < sc->sc_next_cb ; n++) {
m_freem(sc->sc_tx_mbuf[n]);
sc->sc_tx_mbuf[n] = NULL;
bus_dmamap_unload(sc->sc_dmat,
sc->sc_tx_map[n]);
IEE_CBSYNC(sc, n,
BUS_DMASYNC_POSTREAD|
BUS_DMASYNC_POSTWRITE);
status = SC_CB(sc, n)->cb_status;
IEE_CBSYNC(sc, n,
BUS_DMASYNC_PREREAD);
if ((status & IEE_CB_COL) != 0 &&
(status & IEE_CB_MAXCOL) == 0)
col = 16;
else
col = status
& IEE_CB_MAXCOL;
sc->sc_tx_col += col;
if ((status & IEE_CB_OK) != 0) {
ifp->if_opackets++;
ifp->if_collisions += col;
}
}
sc->sc_next_tbd = 0;
ifp->if_flags &= ~IFF_OACTIVE;
}
sc->sc_next_tbd = 0;
ifp->if_flags &= ~IFF_OACTIVE;
for (n = 0 ; n < sc->sc_next_cb; n++) {
/*
* Check if a CMD failed, but ignore TX errors.
*/
IEE_CBSYNC(sc, n,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
cmd = SC_CB(sc, n)->cb_cmd;
status = SC_CB(sc, n)->cb_status;
IEE_CBSYNC(sc, n, BUS_DMASYNC_PREREAD);
if ((cmd & IEE_CB_CMD) != IEE_CB_CMD_TR &&
(status & IEE_CB_OK) == 0)
printf("%s: iee_intr: scb_status=0x%x "
"scb_cmd=0x%x failed command %d: "
"cb_status[%d]=0x%.4x "
"cb_cmd[%d]=0x%.4x\n",
device_xname(sc->sc_dev),
scb_status, scb_cmd,
++sc->sc_cmd_err,
n, status, n, cmd);
}
sc->sc_next_cb = 0;
if ((sc->sc_flags & IEE_WANT_MCAST) != 0) {
iee_cb_setup(sc, IEE_CB_CMD_MCS |
IEE_CB_S | IEE_CB_EL | IEE_CB_I);
(sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE);
} else
/* Try to get deferred packets going. */
iee_start(ifp);
}
for (n = 0 ; n < sc->sc_next_cb ; n++) {
/* Check if a CMD failed, but ignore TX errors. */
if ((SC_CB(n)->cb_cmd & IEE_CB_CMD) != IEE_CB_CMD_TR
&& ((SC_CB(n)->cb_status & IEE_CB_OK) == 0))
printf("%s: iee_intr: scb_status=0x%x "
"scb_cmd=0x%x failed command %d: "
"cb_status[%d]=0x%.4x cb_cmd[%d]=0x%.4x\n",
device_xname(sc->sc_dev),
scb_status, scb_cmd,
++sc->sc_cmd_err, n, SC_CB(n)->cb_status,
n, SC_CB(n)->cb_cmd);
}
sc->sc_next_cb = 0;
if ((sc->sc_flags & IEE_WANT_MCAST) != 0) {
iee_cb_setup(sc, IEE_CB_CMD_MCS | IEE_CB_S | IEE_CB_EL
| IEE_CB_I);
(sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE);
} else
/* Try to get deferred packets going. */
iee_start(ifp);
}
if (IEE_SWAP32(SC_SCB->scb_crc_err) != sc->sc_crc_err) {
sc->sc_crc_err = IEE_SWAP32(SC_SCB->scb_crc_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_crc_err) != sc->sc_crc_err) {
sc->sc_crc_err = IEE_SWAP32(SC_SCB(sc)->scb_crc_err);
printf("%s: iee_intr: crc_err=%d\n", device_xname(sc->sc_dev),
sc->sc_crc_err);
}
if (IEE_SWAP32(SC_SCB->scb_align_err) != sc->sc_align_err) {
sc->sc_align_err = IEE_SWAP32(SC_SCB->scb_align_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_align_err) != sc->sc_align_err) {
sc->sc_align_err = IEE_SWAP32(SC_SCB(sc)->scb_align_err);
printf("%s: iee_intr: align_err=%d\n", device_xname(sc->sc_dev),
sc->sc_align_err);
}
if (IEE_SWAP32(SC_SCB->scb_resource_err) != sc->sc_resource_err) {
sc->sc_resource_err = IEE_SWAP32(SC_SCB->scb_resource_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_resource_err) != sc->sc_resource_err) {
sc->sc_resource_err = IEE_SWAP32(SC_SCB(sc)->scb_resource_err);
printf("%s: iee_intr: resource_err=%d\n",
device_xname(sc->sc_dev), sc->sc_resource_err);
}
if (IEE_SWAP32(SC_SCB->scb_overrun_err) != sc->sc_overrun_err) {
sc->sc_overrun_err = IEE_SWAP32(SC_SCB->scb_overrun_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_overrun_err) != sc->sc_overrun_err) {
sc->sc_overrun_err = IEE_SWAP32(SC_SCB(sc)->scb_overrun_err);
printf("%s: iee_intr: overrun_err=%d\n",
device_xname(sc->sc_dev), sc->sc_overrun_err);
}
if (IEE_SWAP32(SC_SCB->scb_rcvcdt_err) != sc->sc_rcvcdt_err) {
sc->sc_rcvcdt_err = IEE_SWAP32(SC_SCB->scb_rcvcdt_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_rcvcdt_err) != sc->sc_rcvcdt_err) {
sc->sc_rcvcdt_err = IEE_SWAP32(SC_SCB(sc)->scb_rcvcdt_err);
printf("%s: iee_intr: rcvcdt_err=%d\n",
device_xname(sc->sc_dev), sc->sc_rcvcdt_err);
}
if (IEE_SWAP32(SC_SCB->scb_short_fr_err) != sc->sc_short_fr_err) {
sc->sc_short_fr_err = IEE_SWAP32(SC_SCB->scb_short_fr_err);
if (IEE_SWAP32(SC_SCB(sc)->scb_short_fr_err) != sc->sc_short_fr_err) {
sc->sc_short_fr_err = IEE_SWAP32(SC_SCB(sc)->scb_short_fr_err);
printf("%s: iee_intr: short_fr_err=%d\n",
device_xname(sc->sc_dev), sc->sc_short_fr_err);
}
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD);
(sc->sc_iee_cmd)(sc, IEE_SCB_ACK);
return 1;
}
@ -433,14 +476,14 @@ iee_intr(void *intarg)
void
iee_cb_setup(struct iee_softc *sc, uint32_t cmd)
{
struct iee_cb *cb = SC_CB(sc->sc_next_cb);
struct iee_cb *cb = SC_CB(sc, sc->sc_next_cb);
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
struct ether_multistep step;
struct ether_multi *enm;
memset(cb, 0, IEE_CB_SZ);
memset(cb, 0, sc->sc_cb_sz);
cb->cb_cmd = cmd;
switch(cmd & IEE_CB_CMD) {
switch (cmd & IEE_CB_CMD) {
case IEE_CB_CMD_NOP: /* NOP CMD */
break;
case IEE_CB_CMD_IAS: /* Individual Address Setup */
@ -464,15 +507,16 @@ iee_cb_setup(struct iee_softc *sc, uint32_t cmd)
return;
}
/* Leave room for a CONF CMD to en/dis-able ALLMULTI mode */
cb = SC_CB(sc->sc_next_cb + 1);
cb = SC_CB(sc, sc->sc_next_cb + 1);
cb->cb_cmd = cmd;
cb->cb_mcast.mc_size = 0;
ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
while (enm != NULL) {
if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
ETHER_ADDR_LEN) != 0 || cb->cb_mcast.mc_size
* ETHER_ADDR_LEN + 2 * IEE_CB_SZ
> IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ) {
* ETHER_ADDR_LEN + 2 * sc->sc_cb_sz >
sc->sc_cb_sz * IEE_NCB +
sc->sc_tbd_sz * IEE_NTBD * IEE_NCB) {
cb->cb_mcast.mc_size = 0;
break;
}
@ -490,17 +534,19 @@ iee_cb_setup(struct iee_softc *sc, uint32_t cmd)
/* disable ALLMULTI and load mcast list */
ifp->if_flags &= ~IFF_ALLMULTI;
sc->sc_cf[11] |= IEE_CF_11_MCALL;
/* Mcast setup may need more then IEE_CB_SZ bytes. */
/* Mcast setup may need more then sc->sc_cb_sz bytes. */
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map,
IEE_CB_OFF, IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ,
sc->sc_cb_off,
sc->sc_cb_sz * IEE_NCB +
sc->sc_tbd_sz * IEE_NTBD * IEE_NCB,
BUS_DMASYNC_PREWRITE);
}
iee_cb_setup(sc, IEE_CB_CMD_CONF);
break;
case IEE_CB_CMD_TR: /* Transmit */
cb->cb_transmit.tx_tbd_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_TBD_OFF
+ IEE_TBD_SZ * sc->sc_next_tbd));
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_tbd_off
+ sc->sc_tbd_sz * sc->sc_next_tbd));
cb->cb_cmd |= IEE_CB_SF; /* Always use Flexible Mode. */
break;
case IEE_CB_CMD_TDR: /* Time Domain Reflectometry */
@ -513,13 +559,12 @@ iee_cb_setup(struct iee_softc *sc, uint32_t cmd)
/* can't happen */
break;
}
cb->cb_link_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_CB_OFF + IEE_CB_SZ *
(sc->sc_next_cb + 1)));
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_CB_OFF
+ IEE_CB_SZ * sc->sc_next_cb, IEE_CB_SZ, BUS_DMASYNC_PREWRITE);
cb->cb_link_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_cb_off +
sc->sc_cb_sz * (sc->sc_next_cb + 1)));
IEE_CBSYNC(sc, sc->sc_next_cb,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc->sc_next_cb++;
ifp->if_timer = 5;
return;
}
@ -533,53 +578,72 @@ iee_attach(struct iee_softc *sc, uint8_t *eth_addr, int *media, int nmedia,
KASSERT(sc->sc_cl_align > 0 && powerof2(sc->sc_cl_align));
sc->sc_scp_off = 0;
sc->sc_scp_sz = roundup2(sizeof(struct iee_scp), sc->sc_cl_align);
sc->sc_iscp_off = sc->sc_scp_sz;
sc->sc_iscp_sz = roundup2(sizeof(struct iee_iscp), sc->sc_cl_align);
sc->sc_scb_off = sc->sc_iscp_off + sc->sc_iscp_sz;
sc->sc_scb_sz = roundup2(sizeof(struct iee_scb), sc->sc_cl_align);
sc->sc_rfd_off = sc->sc_scb_off + sc->sc_scb_sz;
sc->sc_rfd_sz = roundup2(sizeof(struct iee_rfd), sc->sc_cl_align);
sc->sc_rbd_off = sc->sc_rfd_off + sc->sc_rfd_sz * IEE_NRFD;
sc->sc_rbd_sz = roundup2(sizeof(struct iee_rbd), sc->sc_cl_align);
sc->sc_cb_off = sc->sc_rbd_off + sc->sc_rbd_sz * IEE_NRFD;
sc->sc_cb_sz = roundup2(sizeof(struct iee_cb), sc->sc_cl_align);
sc->sc_tbd_off = sc->sc_cb_off + sc->sc_cb_sz * IEE_NCB;
sc->sc_tbd_sz = roundup2(sizeof(struct iee_tbd), sc->sc_cl_align);
sc->sc_shmem_sz = sc->sc_tbd_off + sc->sc_tbd_sz * IEE_NTBD * IEE_NCB;
/* allocate memory for shared DMA descriptors */
if (bus_dmamem_alloc(sc->sc_dmat, IEE_SHMEM_MAX, PAGE_SIZE, 0,
if (bus_dmamem_alloc(sc->sc_dmat, sc->sc_shmem_sz, PAGE_SIZE, 0,
&sc->sc_dma_segs, 1, &sc->sc_dma_rsegs, BUS_DMA_NOWAIT) != 0) {
aprint_error(": can't allocate %d bytes of DMA memory\n",
(int)IEE_SHMEM_MAX);
sc->sc_shmem_sz);
return;
}
if (bus_dmamem_map(sc->sc_dmat, &sc->sc_dma_segs, sc->sc_dma_rsegs,
IEE_SHMEM_MAX, (void **)&sc->sc_shmem_addr,
sc->sc_shmem_sz, (void **)&sc->sc_shmem_addr,
BUS_DMA_COHERENT | BUS_DMA_NOWAIT) != 0) {
aprint_error(": can't map DMA memory\n");
bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_segs,
sc->sc_dma_rsegs);
return;
}
if (bus_dmamap_create(sc->sc_dmat, IEE_SHMEM_MAX, sc->sc_dma_rsegs,
IEE_SHMEM_MAX, 0, BUS_DMA_NOWAIT, &sc->sc_shmem_map) != 0) {
if (bus_dmamap_create(sc->sc_dmat, sc->sc_shmem_sz, sc->sc_dma_rsegs,
sc->sc_shmem_sz, 0, BUS_DMA_NOWAIT, &sc->sc_shmem_map) != 0) {
aprint_error(": can't create DMA map\n");
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr, IEE_SHMEM_MAX);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr,
sc->sc_shmem_sz);
bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_segs,
sc->sc_dma_rsegs);
return;
}
if (bus_dmamap_load(sc->sc_dmat, sc->sc_shmem_map, sc->sc_shmem_addr,
IEE_SHMEM_MAX, NULL, BUS_DMA_NOWAIT) != 0) {
sc->sc_shmem_sz, NULL, BUS_DMA_NOWAIT) != 0) {
aprint_error(": can't load DMA map\n");
bus_dmamap_destroy(sc->sc_dmat, sc->sc_shmem_map);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr, IEE_SHMEM_MAX);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr,
sc->sc_shmem_sz);
bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_segs,
sc->sc_dma_rsegs);
return;
}
memset(sc->sc_shmem_addr, 0, IEE_SHMEM_MAX);
memset(sc->sc_shmem_addr, 0, sc->sc_shmem_sz);
/* Set pointer to Intermediate System Configuration Pointer. */
/* Phys. addr. in big endian order. (Big endian as defined by Intel.) */
SC_SCP->scp_iscp_addr = IEE_SWAP32(IEE_PHYS_SHMEM(IEE_ISCP_OFF));
SC_SCP->scp_sysbus = sc->sc_sysbus;
SC_SCP(sc)->scp_iscp_addr = IEE_SWAP32(IEE_PHYS_SHMEM(sc->sc_iscp_off));
SC_SCP(sc)->scp_sysbus = sc->sc_sysbus;
/* Set pointer to System Control Block. */
/* Phys. addr. in big endian order. (Big endian as defined by Intel.) */
SC_ISCP->iscp_scb_addr = IEE_SWAP32(IEE_PHYS_SHMEM(IEE_SCB_OFF));
SC_ISCP(sc)->iscp_scb_addr = IEE_SWAP32(IEE_PHYS_SHMEM(sc->sc_scb_off));
/* Set pointer to Receive Frame Area. (physical address) */
SC_SCB->scb_rfa_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RFD_OFF));
SC_SCB(sc)->scb_rfa_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rfd_off));
/* Set pointer to Command Block. (physical address) */
SC_SCB->scb_cmd_blk_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_CB_OFF));
SC_SCB(sc)->scb_cmd_blk_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_cb_off));
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX,
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, sc->sc_shmem_sz,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
ifmedia_init(&sc->sc_ifmedia, 0, iee_mediachange, iee_mediastatus);
@ -634,7 +698,7 @@ iee_detach(struct iee_softc *sc, int flags)
if_detach(ifp);
bus_dmamap_unload(sc->sc_dmat, sc->sc_shmem_map);
bus_dmamap_destroy(sc->sc_dmat, sc->sc_shmem_map);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr, IEE_SHMEM_MAX);
bus_dmamem_unmap(sc->sc_dmat, sc->sc_shmem_addr, sc->sc_shmem_sz);
bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_segs, sc->sc_dma_rsegs);
}
@ -670,6 +734,7 @@ iee_start(struct ifnet *ifp)
{
struct iee_softc *sc = ifp->if_softc;
struct mbuf *m = NULL;
struct iee_tbd *tbd;
int t;
int n;
@ -712,7 +777,7 @@ iee_start(struct ifnet *ifp)
m->m_len = sc->sc_tx_mbuf[t]->m_pkthdr.len;
m_freem(sc->sc_tx_mbuf[t]);
sc->sc_tx_mbuf[t] = m;
if(bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_tx_map[t],
if (bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_tx_map[t],
m, BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) {
printf("%s: iee_start: can't load TX DMA map\n",
device_xname(sc->sc_dev));
@ -722,15 +787,20 @@ iee_start(struct ifnet *ifp)
}
}
for (n = 0 ; n < sc->sc_tx_map[t]->dm_nsegs ; n++) {
SC_TBD(sc->sc_next_tbd + n)->tbd_tb_addr =
tbd = SC_TBD(sc, sc->sc_next_tbd + n);
tbd->tbd_tb_addr =
IEE_SWAPA32(sc->sc_tx_map[t]->dm_segs[n].ds_addr);
SC_TBD(sc->sc_next_tbd + n)->tbd_size =
tbd->tbd_size =
sc->sc_tx_map[t]->dm_segs[n].ds_len;
SC_TBD(sc->sc_next_tbd + n)->tbd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_TBD_OFF + IEE_TBD_SZ
* (sc->sc_next_tbd + n + 1)));
tbd->tbd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_tbd_off +
sc->sc_tbd_sz * (sc->sc_next_tbd + n + 1)));
}
SC_TBD(sc->sc_next_tbd + n - 1)->tbd_size |= IEE_CB_EL;
SC_TBD(sc, sc->sc_next_tbd + n - 1)->tbd_size |= IEE_CB_EL;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map,
sc->sc_tbd_off + sc->sc_next_tbd * sc->sc_tbd_sz,
sc->sc_tbd_sz * sc->sc_tx_map[t]->dm_nsegs,
BUS_DMASYNC_PREWRITE);
bus_dmamap_sync(sc->sc_dmat, sc->sc_tx_map[t], 0,
sc->sc_tx_map[t]->dm_mapsize, BUS_DMASYNC_PREWRITE);
IFQ_POLL(&ifp->if_snd, m);
@ -751,8 +821,6 @@ iee_start(struct ifnet *ifp)
return;
if (t == IEE_NCB)
ifp->if_flags |= IFF_OACTIVE;
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_CB_SZ,
IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ, BUS_DMASYNC_PREWRITE);
(sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE);
}
@ -811,12 +879,12 @@ iee_init(struct ifnet *ifp)
sc->sc_next_tbd = 0;
sc->sc_flags &= ~IEE_WANT_MCAST;
sc->sc_rx_done = 0;
SC_SCB->scb_crc_err = 0;
SC_SCB->scb_align_err = 0;
SC_SCB->scb_resource_err = 0;
SC_SCB->scb_overrun_err = 0;
SC_SCB->scb_rcvcdt_err = 0;
SC_SCB->scb_short_fr_err = 0;
SC_SCB(sc)->scb_crc_err = 0;
SC_SCB(sc)->scb_align_err = 0;
SC_SCB(sc)->scb_resource_err = 0;
SC_SCB(sc)->scb_overrun_err = 0;
SC_SCB(sc)->scb_rcvcdt_err = 0;
SC_SCB(sc)->scb_short_fr_err = 0;
sc->sc_crc_err = 0;
sc->sc_align_err = 0;
sc->sc_resource_err = 0;
@ -841,17 +909,17 @@ iee_init(struct ifnet *ifp)
}
/* Initialize Receive Frame and Receive Buffer Descriptors */
err = 0;
memset(SC_RFD(0), 0, IEE_RFD_LIST_SZ);
memset(SC_RBD(0), 0, IEE_RBD_LIST_SZ);
memset(SC_RFD(sc, 0), 0, sc->sc_rfd_sz * IEE_NRFD);
memset(SC_RBD(sc, 0), 0, sc->sc_rbd_sz * IEE_NRFD);
for (r = 0 ; r < IEE_NRFD ; r++) {
SC_RFD(r)->rfd_cmd = IEE_RFD_SF;
SC_RFD(r)->rfd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RFD_OFF
+ IEE_RFD_SZ * ((r + 1) % IEE_NRFD)));
SC_RFD(sc, r)->rfd_cmd = IEE_RFD_SF;
SC_RFD(sc, r)->rfd_link_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rfd_off
+ sc->sc_rfd_sz * ((r + 1) % IEE_NRFD)));
SC_RBD(r)->rbd_next_rbd =
IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RBD_OFF
+ IEE_RBD_SZ * ((r + 1) % IEE_NRFD)));
SC_RBD(sc, r)->rbd_next_rbd =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rbd_off
+ sc->sc_rbd_sz * ((r + 1) % IEE_NRFD)));
if (sc->sc_rx_mbuf[r] == NULL) {
MGETHDR(sc->sc_rx_mbuf[r], M_DONTWAIT, MT_DATA);
if (sc->sc_rx_mbuf[r] == NULL) {
@ -869,6 +937,9 @@ iee_init(struct ifnet *ifp)
err = 1;
break;
}
sc->sc_rx_mbuf[r]->m_len =
sc->sc_rx_mbuf[r]->m_pkthdr.len = MCLBYTES - 2;
sc->sc_rx_mbuf[r]->m_data += 2;
}
if (sc->sc_rx_map[r] == NULL && bus_dmamap_create(sc->sc_dmat,
MCLBYTES, 1, MCLBYTES , 0, BUS_DMA_NOWAIT,
@ -879,10 +950,8 @@ iee_init(struct ifnet *ifp)
err = 1;
break;
}
if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_map[r],
sc->sc_rx_mbuf[r]->m_ext.ext_buf,
sc->sc_rx_mbuf[r]->m_ext.ext_size, NULL,
BUS_DMA_READ | BUS_DMA_NOWAIT) != 0) {
if (bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_rx_map[r],
sc->sc_rx_mbuf[r], BUS_DMA_READ | BUS_DMA_NOWAIT) != 0) {
printf("%s: iee_init: can't load RX DMA map\n",
device_xname(sc->sc_dev));
bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_map[r]);
@ -891,12 +960,13 @@ iee_init(struct ifnet *ifp)
break;
}
bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_map[r], 0,
sc->sc_rx_mbuf[r]->m_ext.ext_size, BUS_DMASYNC_PREREAD);
SC_RBD(r)->rbd_size = sc->sc_rx_map[r]->dm_segs[0].ds_len;
SC_RBD(r)->rbd_rb_addr =
sc->sc_rx_map[r]->dm_mapsize, BUS_DMASYNC_PREREAD);
SC_RBD(sc, r)->rbd_size = sc->sc_rx_map[r]->dm_segs[0].ds_len;
SC_RBD(sc, r)->rbd_rb_addr =
IEE_SWAPA32(sc->sc_rx_map[r]->dm_segs[0].ds_addr);
}
SC_RFD(0)->rfd_rbd_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RBD_OFF));
SC_RFD(sc, 0)->rfd_rbd_addr =
IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rbd_off));
if (err != 0) {
for (n = 0 ; n < r; n++) {
m_freem(sc->sc_rx_mbuf[n]);
@ -930,9 +1000,9 @@ iee_init(struct ifnet *ifp)
sc->sc_cf[12] = IEE_CF_12_DEF;
sc->sc_cf[13] = IEE_CF_13_DEF;
iee_cb_setup(sc, IEE_CB_CMD_CONF | IEE_CB_S | IEE_CB_EL);
SC_SCB->scb_rfa_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(IEE_RFD_OFF));
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX,
BUS_DMASYNC_PREWRITE);
SC_SCB(sc)->scb_rfa_addr = IEE_SWAPA32(IEE_PHYS_SHMEM(sc->sc_rfd_off));
bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, sc->sc_shmem_sz,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
(sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE | IEE_SCB_RUC_ST);
/* Issue a Channel Attention to ACK interrupts we may have caused. */
(sc->sc_iee_cmd)(sc, IEE_SCB_ACK);

108
sys/dev/ic/i82596var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: i82596var.h,v 1.13 2009/05/09 03:50:16 tsutsui Exp $ */
/* $NetBSD: i82596var.h,v 1.14 2009/05/10 04:26:19 tsutsui Exp $ */
/*
* Copyright (c) 2003 Jochen Kunz.
@ -168,6 +168,21 @@ struct iee_softc {
uint8_t sc_cf[14];
int sc_flags;
int sc_cl_align;
int sc_scp_off;
int sc_scp_sz;
int sc_iscp_off;
int sc_iscp_sz;
int sc_scb_off;
int sc_scb_sz;
int sc_rfd_off;
int sc_rfd_sz;
int sc_rbd_off;
int sc_rbd_sz;
int sc_cb_off;
int sc_cb_sz;
int sc_tbd_off;
int sc_tbd_sz;
int sc_shmem_sz;
uint32_t sc_sysbus;
uint32_t sc_crc_err;
uint32_t sc_align_err;
@ -211,55 +226,50 @@ struct iee_softc {
#define IEE_PHYS_SHMEM(x) ((uint32_t) (sc->sc_shmem_map->dm_segs[0].ds_addr \
+ (x)))
#define SC_SCP(sc) ((struct iee_scp *)((sc)->sc_shmem_addr + \
(sc)->sc_scp_off))
#define SC_ISCP(sc) ((struct iee_iscp *)((sc)->sc_shmem_addr + \
(sc)->sc_iscp_off))
#define SC_SCB(sc) ((struct iee_scb *)((sc)->sc_shmem_addr + \
(sc)->sc_scb_off))
#define SC_RFD(sc, n) ((struct iee_rfd *)((sc)->sc_shmem_addr + \
(sc)->sc_rfd_off + \
(n) * (sc)->sc_rfd_sz))
#define SC_RBD(sc, n) ((struct iee_rbd *)((sc)->sc_shmem_addr + \
(sc)->sc_rbd_off + \
(n) * (sc)->sc_rbd_sz))
#define SC_CB(sc, n) ((struct iee_cb *)((sc)->sc_shmem_addr + \
(sc)->sc_cb_off + \
(n) * (sc)->sc_cb_sz))
#define SC_TBD(sc, n) ((struct iee_tbd *)((sc)->sc_shmem_addr + \
(sc)->sc_tbd_off + \
(n) * (sc)->sc_tbd_sz))
/* Offsets in shared memory */
#define IEE_SCP_SZ roundup2(sizeof(struct iee_scp), (sc)->sc_cl_align)
#define IEE_SCP_OFF 0
#define IEE_ISCP_SZ roundup2(sizeof(struct iee_iscp), (sc)->sc_cl_align)
#define IEE_ISCP_OFF IEE_SCP_SZ
#define IEE_SCB_SZ roundup2(sizeof(struct iee_scb), (sc)->sc_cl_align)
#define IEE_SCB_OFF (IEE_SCP_SZ + IEE_ISCP_SZ)
#define IEE_RFD_SZ roundup2(sizeof(struct iee_rfd), (sc)->sc_cl_align)
#define IEE_RFD_LIST_SZ (IEE_RFD_SZ * IEE_NRFD)
#define IEE_RFD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ)
#define IEE_RBD_SZ roundup2(sizeof(struct iee_rbd), (sc)->sc_cl_align)
#define IEE_RBD_LIST_SZ (IEE_RBD_SZ * IEE_NRFD)
#define IEE_RBD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \
+ IEE_RFD_SZ * IEE_NRFD)
#define IEE_CB_SZ roundup2(sizeof(struct iee_cb), (sc)->sc_cl_align)
#define IEE_CB_LIST_SZ (IEE_CB_SZ * IEE_NCB)
#define IEE_CB_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \
+ IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD)
#define IEE_TBD_SZ roundup2(sizeof(struct iee_tbd), (sc)->sc_cl_align)
#define IEE_TBD_LIST_SZ (IEE_TBD_SZ * IEE_NTBD * IEE_NCB)
#define IEE_TBD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \
+ IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD \
+ IEE_CB_SZ * IEE_NCB)
#define IEE_SHMEM_MAX (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \
+ IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD \
+ IEE_CB_SZ * IEE_NCB + IEE_TBD_SZ * IEE_NTBD * IEE_NCB)
#define SC_SCP ((struct iee_scp*)((sc)->sc_shmem_addr + IEE_SCP_OFF))
#define SC_ISCP ((struct iee_iscp*)((sc)->sc_shmem_addr + IEE_ISCP_OFF))
#define SC_SCB ((struct iee_scb*)((sc)->sc_shmem_addr + IEE_SCB_OFF))
#define SC_RFD(n) ((struct iee_rfd*)((sc)->sc_shmem_addr + IEE_RFD_OFF \
+ (n) * IEE_RFD_SZ))
#define SC_RBD(n) ((struct iee_rbd*)((sc)->sc_shmem_addr + IEE_RBD_OFF \
+ (n) * IEE_RBD_SZ))
#define SC_CB(n) ((struct iee_cb*)((sc)->sc_shmem_addr + IEE_CB_OFF \
+ (n) * IEE_CB_SZ))
#define SC_TBD(n) ((struct iee_tbd*)((sc)->sc_shmem_addr + IEE_TBD_OFF \
+ (n) * IEE_TBD_SZ))
#define IEE_SCPSYNC(sc, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_scb_off, (sc)->sc_scp_sz, (ops))
#define IEE_ISCPSYNC(sc, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_iscp_off, (sc)->sc_iscp_sz, (ops))
#define IEE_SCBSYNC(sc, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_scb_off, (sc)->sc_scb_sz, (ops))
#define IEE_RFDSYNC(sc, n, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_rfd_off + (n) * (sc)->sc_rfd_sz, \
(sc)->sc_rfd_sz, (ops))
#define IEE_RBDSYNC(sc, n, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_rbd_off + (n) * (sc)->sc_rbd_sz, \
(sc)->sc_rbd_sz, (ops))
#define IEE_CBSYNC(sc, n, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_cb_off + (n) * (sc)->sc_cb_sz, \
(sc)->sc_cb_sz, (ops))
#define IEE_TBDSYNC(sc, n, ops) \
bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
(sc)->sc_tbd_off + (n) * (sc)->sc_tbd_sz, \
(sc)->sc_tbd_sz, (ops))
void iee_attach(struct iee_softc *, uint8_t *, int *, int, int);
void iee_detach(struct iee_softc *, int);