Rename the atomic operations to have generic machine-independent
names, and define __HAVE_ATOMIC_OPERATIONS to indicate their existence.
This commit is contained in:
parent
8b4fa50a4d
commit
f6cea17c36
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.43 2000/04/03 01:47:28 thorpej Exp $ */
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/* $NetBSD: cpu.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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@ -66,7 +66,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.43 2000/04/03 01:47:28 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $");
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#include "opt_multiprocessor.h"
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@ -373,7 +373,7 @@ recognized:
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*/
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if (ma->ma_slot == hwrpb->rpb_primary_cpu_id) {
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ci->ci_flags |= CPUF_PRIMARY;
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alpha_atomic_setbits_q(&cpus_running, (1UL << ma->ma_slot));
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atomic_setbits_ulong(&cpus_running, (1UL << ma->ma_slot));
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}
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#endif /* MULTIPROCESSOR */
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}
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@ -523,7 +523,7 @@ cpu_hatch(ci)
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curpcb = ci->ci_idle_pcb_paddr;
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/* Mark the kernel pmap active on this processor. */
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alpha_atomic_setbits_q(&pmap_kernel()->pm_cpus, cpumask);
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atomic_setbits_ulong(&pmap_kernel()->pm_cpus, cpumask);
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/* Initialize trap vectors for this processor. */
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trap_init();
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@ -531,7 +531,7 @@ cpu_hatch(ci)
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/* Yahoo! We're running kernel code! Announce it! */
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printf("%s: processor ID %lu running\n", ci->ci_dev->dv_xname,
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alpha_pal_whami());
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alpha_atomic_setbits_q(&cpus_running, cpumask);
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atomic_setbits_ulong(&cpus_running, cpumask);
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/*
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* Lower interrupt level so that we can get IPIs. Don't use
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@ -571,7 +571,7 @@ cpu_iccb_send(cpu_id, msg)
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*/
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strcpy(pcsp->pcs_iccb.iccb_rxbuf, msg);
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pcsp->pcs_iccb.iccb_rxlen = strlen(msg);
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alpha_atomic_setbits_q(&hwrpb->rpb_rxrdy, cpumask);
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atomic_setbits_ulong(&hwrpb->rpb_rxrdy, cpumask);
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/* Wait for the message to be received. */
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for (timeout = 10000; timeout != 0; timeout--) {
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@ -1,4 +1,4 @@
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/* $NetBSD: interrupt.c,v 1.43 2000/02/29 21:42:54 thorpej Exp $ */
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/* $NetBSD: interrupt.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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@ -36,7 +36,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.43 2000/02/29 21:42:54 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.44 2000/05/23 05:12:53 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -93,7 +93,7 @@ interrupt(a0, a1, a2, framep)
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}
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#endif
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pending_ipis = alpha_atomic_loadlatch_q(&ci->ci_ipis, 0);
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pending_ipis = atomic_loadlatch_ulong(&ci->ci_ipis, 0);
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for (bit = 0; bit < ALPHA_NIPIS; bit++)
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if (pending_ipis & (1UL << bit))
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(*ipifuncs[bit])();
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@ -1,4 +1,4 @@
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/* $NetBSD: ipifuncs.c,v 1.9 1999/12/02 01:09:11 thorpej Exp $ */
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/* $NetBSD: ipifuncs.c,v 1.10 2000/05/23 05:12:54 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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@ -39,7 +39,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.9 1999/12/02 01:09:11 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.10 2000/05/23 05:12:54 thorpej Exp $");
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/*
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* Interprocessor interrupt handlers.
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@ -90,7 +90,7 @@ alpha_send_ipi(cpu_id, ipimask)
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panic("alpha_sched_ipi: bogus cpu_id");
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#endif
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alpha_atomic_setbits_q(&cpu_info[cpu_id].ci_ipis, ipimask);
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atomic_setbits_ulong(&cpu_info[cpu_id].ci_ipis, ipimask);
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printf("SENDING IPI TO %lu\n", cpu_id);
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alpha_pal_wripir(cpu_id);
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printf("IPI SENT\n");
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@ -122,7 +122,7 @@ alpha_ipi_halt()
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(void) splhigh();
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printf("%s: shutting down...\n", cpu_info[cpu_id].ci_dev->dv_xname);
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alpha_atomic_clearbits_q(&cpus_running, (1UL << cpu_id));
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atomic_clearbits_ulong(&cpus_running, (1UL << cpu_id));
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pcsp->pcs_flags &= ~(PCS_RC | PCS_HALT_REQ);
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pcsp->pcs_flags |= PCS_HALT_STAY_HALTED;
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@ -136,7 +136,7 @@ alpha_ipi_tbia()
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u_long cpu_id = alpha_pal_whami();
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/* If we're doing a TBIA, we don't need to do a TBIAP or a SHOOTDOWN. */
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alpha_atomic_clearbits_q(&cpu_info[cpu_id].ci_ipis,
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atomic_clearbits_ulong(&cpu_info[cpu_id].ci_ipis,
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ALPHA_IPI_TBIAP|ALPHA_IPI_SHOOTDOWN);
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ALPHA_TBIA();
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.205 2000/05/22 17:13:53 thorpej Exp $ */
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/* $NetBSD: machdep.c,v 1.206 2000/05/23 05:12:54 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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@ -79,7 +79,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.205 2000/05/22 17:13:53 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.206 2000/05/23 05:12:54 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -1840,7 +1840,7 @@ do_sir()
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{
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u_int64_t n;
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while ((n = alpha_atomic_loadlatch_q(&ssir, 0)) != 0) {
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while ((n = atomic_loadlatch_ulong(&ssir, 0)) != 0) {
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#define COUNT_SOFT uvmexp.softs++
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#define DO_SIR(bit, fn) \
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/* $NetBSD: pmap.c,v 1.131 2000/04/10 00:48:35 thorpej Exp $ */
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/* $NetBSD: pmap.c,v 1.132 2000/05/23 05:12:54 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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@ -154,7 +154,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.131 2000/04/10 00:48:35 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.132 2000/05/23 05:12:54 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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*
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* Increment or decrement a pmap statistic.
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*/
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#define PMAP_STAT_INCR(s, v) alpha_atomic_add_q((unsigned long *)(&(s)), (v))
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#define PMAP_STAT_DECR(s, v) alpha_atomic_sub_q((unsigned long *)(&(s)), (v))
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#define PMAP_STAT_INCR(s, v) atomic_add_ulong((unsigned long *)(&(s)), (v))
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#define PMAP_STAT_DECR(s, v) atomic_sub_ulong((unsigned long *)(&(s)), (v))
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/*
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* pmap_bootstrap:
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/*
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* Mark the kernel pmap `active' on this processor.
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*/
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alpha_atomic_setbits_q(&pmap_kernel()->pm_cpus,
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atomic_setbits_ulong(&pmap_kernel()->pm_cpus,
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(1UL << cpu_number()));
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}
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/*
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* Mark the pmap in use by this processor.
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*/
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alpha_atomic_setbits_q(&pmap->pm_cpus, (1UL << cpu_id));
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atomic_setbits_ulong(&pmap->pm_cpus, (1UL << cpu_id));
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/*
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* Move the pmap to the end of the LRU list.
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/*
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* Mark the pmap no longer in use by this processor.
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*/
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alpha_atomic_clearbits_q(&pmap->pm_cpus, (1UL << cpu_number()));
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atomic_clearbits_ulong(&pmap->pm_cpus, (1UL << cpu_number()));
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}
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/*
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* Have a new ASN, so there's no need to sync the I-stream
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* on the way back out to userspace.
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*/
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alpha_atomic_clearbits_q(&pmap->pm_needisync, (1UL << cpu_id));
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atomic_clearbits_ulong(&pmap->pm_needisync, (1UL << cpu_id));
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#endif
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: atomic.h,v 1.3 2000/03/05 18:46:14 thorpej Exp $ */
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/* $NetBSD: atomic.h,v 1.4 2000/05/23 05:12:55 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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#ifndef _ALPHA_ATOMIC_H_
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#define _ALPHA_ATOMIC_H_
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static __inline void alpha_atomic_setbits_q __P((__volatile unsigned long *,
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unsigned long)) __attribute__((__unused__));
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static __inline void alpha_atomic_clearbits_q __P((__volatile unsigned long *,
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unsigned long)) __attribute__((__unused__));
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static __inline void atomic_setbits_ulong
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__P((__volatile unsigned long *, unsigned long))
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__attribute__((__unused__));
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static __inline void atomic_clearbits_ulong
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__P((__volatile unsigned long *, unsigned long))
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__attribute__((__unused__));
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static __inline void alpha_atomic_add_q __P((__volatile unsigned long *,
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unsigned long)) __attribute__((__unused__));
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static __inline void alpha_atomic_sub_q __P((__volatile unsigned long *,
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unsigned long)) __attribute__((__unused__));
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static __inline void atomic_add_ulong
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__P((__volatile unsigned long *, unsigned long))
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__attribute__((__unused__));
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static __inline void atomic_sub_ulong
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__P((__volatile unsigned long *, unsigned long))
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__attribute__((__unused__));
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static __inline unsigned long alpha_atomic_loadlatch_q
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static __inline unsigned long atomic_loadlatch_ulong
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__P((__volatile unsigned long *, unsigned long))
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__attribute__((__unused__));
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/*
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* alpha_atomic_setbits_q:
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* atomic_setbits_ulong:
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*
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* Atomically set bits in a quadword.
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* Atomically set bits in a `unsigned long'.
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*/
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static __inline void
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alpha_atomic_setbits_q(__volatile unsigned long *ulp, unsigned long v)
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atomic_setbits_ulong(__volatile unsigned long *ulp, unsigned long v)
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{
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unsigned long t0;
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__asm __volatile(
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"# BEGIN alpha_atomic_setbits_q\n"
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"# BEGIN atomic_setbits_ulong\n"
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"1: ldq_l %0, %3 \n"
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" or %0, %2, %0 \n"
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" stq_c %0, %1 \n"
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" br 3f \n"
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"2: br 1b \n"
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"3: \n"
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" # END alpha_atomic_setbits_q"
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" # END atomic_setbits_ulong"
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: "=r" (t0), "=m" (*ulp)
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: "r" (v), "1" (*ulp));
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}
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/*
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* alpha_atomic_clearbits_q:
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* atomic_clearbits_ulong:
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*
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* Atomically clear bits in a quadword.
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* Atomically clear bits in a `unsigned long'.
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*/
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static __inline void
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alpha_atomic_clearbits_q(__volatile unsigned long *ulp, unsigned long v)
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atomic_clearbits_ulong(__volatile unsigned long *ulp, unsigned long v)
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{
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unsigned long t0;
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__asm __volatile(
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"# BEGIN alpha_atomic_clearbits_q\n"
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"# BEGIN atomic_clearbits_ulong\n"
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"1: ldq_l %0, %3 \n"
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" and %0, %2, %0 \n"
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" stq_c %0, %1 \n"
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" br 3f \n"
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"2: br 1b \n"
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"3: \n"
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" # END alpha_atomic_clearbits_q"
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" # END atomic_clearbits_ulong"
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: "=r" (t0), "=m" (*ulp)
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: "r" (~v), "1" (*ulp));
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}
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/*
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* alpha_atomic_add_q:
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* atomic_add_ulong:
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*
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* Atomically add a value to a quadword.
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* Atomically add a value to a `unsigned long'.
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*/
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static __inline void
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alpha_atomic_add_q(__volatile unsigned long *ulp, unsigned long v)
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atomic_add_ulong(__volatile unsigned long *ulp, unsigned long v)
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{
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unsigned long t0;
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__asm __volatile(
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"# BEGIN alpha_atomic_add_q\n"
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"# BEGIN atomic_add_ulong\n"
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"1: ldq_l %0, %3 \n"
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" addq %0, %2, %0 \n"
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" stq_c %0, %1 \n"
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" br 3f \n"
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"2: br 1b \n"
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"3: \n"
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" # END alpha_atomic_add_q"
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" # END atomic_add_ulong"
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: "=r" (t0), "=m" (*ulp)
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: "r" (v), "1" (*ulp));
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}
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/*
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* alpha_atomic_sub_q:
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* atomic_sub_ulong:
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*
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* Atomically subtract a value from a quadword.
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* Atomically subtract a value from a `unsigned long'.
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*/
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static __inline void
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alpha_atomic_sub_q(__volatile unsigned long *ulp, unsigned long v)
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atomic_sub_ulong(__volatile unsigned long *ulp, unsigned long v)
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{
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unsigned long t0;
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__asm __volatile(
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"# BEGIN alpha_atomic_sub_q\n"
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"# BEGIN atomic_sub_ulong\n"
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"1: ldq_l %0, %3 \n"
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" subq %0, %2, %0 \n"
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" stq_c %0, %1 \n"
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" br 3f \n"
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"2: br 1b \n"
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"3: \n"
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" # END alpha_atomic_sub_q"
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" # END atomic_sub_ulong"
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: "=r" (t0), "=m" (*ulp)
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: "r" (v), "1" (*ulp));
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}
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/*
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* alpha_atomic_loadlatch_q:
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* atomic_loadlatch_ulong:
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*
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* Atomically load and latch a quadword value.
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* Atomically load and latch a `unsigned long' value.
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*/
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static __inline unsigned long
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alpha_atomic_loadlatch_q(__volatile unsigned long *ulp, unsigned long v)
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atomic_loadlatch_ulong(__volatile unsigned long *ulp, unsigned long v)
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{
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unsigned long t0, v0;
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__asm __volatile(
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"# BEGIN alpha_atomic_loadlatch_q\n"
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"# BEGIN atomic_loadlatch_ulong\n"
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"1: mov %3, %0 \n"
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" ldq_l %1, %4 \n"
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" stq_c %0, %2 \n"
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" br 3f \n"
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"2: br 1b \n"
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"3: \n"
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" # END alpha_atomic_loadlatch_q"
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" # END atomic_loadlatch_ulong"
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: "=r" (t0), "=r" (v0), "=m" (*ulp)
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: "r" (v), "2" (*ulp));
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.24 2000/03/19 01:46:18 thorpej Exp $ */
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/* $NetBSD: intr.h,v 1.25 2000/05/23 05:12:56 thorpej Exp $ */
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/*
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* Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
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@ -88,7 +88,7 @@ extern u_int64_t ssir;
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#define SIR_CLOCK 0x2
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#define SIR_SERIAL 0x4
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||||
|
||||
#define setsoft(x) alpha_atomic_setbits_q(&ssir, (x))
|
||||
#define setsoft(x) atomic_setbits_ulong(&ssir, (x))
|
||||
|
||||
#define setsoftnet() setsoft(SIR_NET)
|
||||
#define setsoftclock() setsoft(SIR_CLOCK)
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pmap.h,v 1.33 2000/03/01 02:22:03 thorpej Exp $ */
|
||||
/* $NetBSD: pmap.h,v 1.34 2000/05/23 05:12:56 thorpej Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
|
||||
|
@ -314,7 +314,7 @@ do { \
|
|||
u_long cpu_mask = (1UL << cpu_number()); \
|
||||
\
|
||||
if ((pmap)->pm_needisync & cpu_mask) { \
|
||||
alpha_atomic_clearbits_q(&(pmap)->pm_needisync, \
|
||||
atomic_clearbits_ulong(&(pmap)->pm_needisync, \
|
||||
cpu_mask); \
|
||||
alpha_pal_imb(); \
|
||||
} \
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: types.h,v 1.14 2000/02/05 00:07:30 cgd Exp $ */
|
||||
/* $NetBSD: types.h,v 1.15 2000/05/23 05:12:56 thorpej Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1990, 1993
|
||||
|
@ -72,5 +72,6 @@ typedef int64_t register_t;
|
|||
|
||||
#define __HAVE_DEVICE_REGISTER
|
||||
#define __HAVE_NWSCONS
|
||||
#define __HAVE_ATOMIC_OPERATIONS
|
||||
|
||||
#endif /* _MACHTYPES_H_ */
|
||||
|
|
Loading…
Reference in New Issue