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Add a function to extract the primary bus number of PCI host bridges,

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as far as specific code for this already existed.
This commit is contained in:
joerg 2008-05-30 09:49:07 +00:00
parent 1be38c90d8
commit f608e44ab1
2 changed files with 61 additions and 3 deletions
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5
sys/arch/x86/include/pci_machdep.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pci_machdep.h,v 1.7 2008/04/16 16:06:51 cegger Exp $ */
/* $NetBSD: pci_machdep.h,v 1.8 2008/05/30 09:49:07 joerg Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -112,6 +112,9 @@ void pci_intr_disestablish(pci_chipset_tag_t, void *);
* BY PORTABLE CODE.
*/
/* Extract Bus Number for a host bridge or -1 if unknown. */
int pchb_get_bus_number(pci_chipset_tag_t, pcitag_t);
/*
* Section 6.2.4, `Miscellaneous Functions' of the PCI Specification,
* says that 255 means `unknown' or `no connection' to the interrupt

59
sys/arch/x86/pci/pchb.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pchb.c,v 1.11 2008/04/28 20:23:40 martin Exp $ */
/* $NetBSD: pchb.c,v 1.12 2008/05/30 09:49:07 joerg Exp $ */
/*-
* Copyright (c) 1996, 1998, 2000 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.11 2008/04/28 20:23:40 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.12 2008/05/30 09:49:07 joerg Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -93,6 +93,61 @@ pchbmatch(device_t parent, cfdata_t match, void *aux)
return 0;
}
int
pchb_get_bus_number(pci_chipset_tag_t pc, pcitag_t tag)
{
pcireg_t dev_id;
int bus, dev, func;
int bcreg, pbnum;
pci_decompose_tag(pc, tag, &bus, &dev, &func);
dev_id = pci_conf_read(pc, tag, PCI_ID_REG);
switch (PCI_VENDOR(dev_id)) {
case PCI_VENDOR_SERVERWORKS:
return pci_conf_read(pc, tag, 0x44) & 0xff;
case PCI_VENDOR_INTEL:
switch (PCI_PRODUCT(dev_id)) {
case PCI_PRODUCT_INTEL_82452_PB:
bcreg = pci_conf_read(pc, tag, 0x40);
pbnum = PCISET_BRIDGE_NUMBER(bcreg);
if (pbnum != 0xff)
return pbnum + 1;
break;
case PCI_PRODUCT_INTEL_PCI450_PB:
bcreg = pci_conf_read(pc, tag, PCISET_BUSCONFIG_REG);
return PCISET_PCI_BUS_NUMBER(bcreg);
case PCI_PRODUCT_INTEL_82451NX_PXB:
pbnum = 0;
switch (dev) {
case 18: /* PXB 0 bus A - primary bus */
break;
case 19: /* PXB 0 bus B */
/* read SUBA0 from MIOC */
tag = pci_make_tag(pc, 0, 16, 0);
bcreg = pci_conf_read(pc, tag, 0xd0);
pbnum = ((bcreg & 0x0000ff00) >> 8) + 1;
break;
case 20: /* PXB 1 bus A */
/* read BUSNO1 from MIOC */
tag = pci_make_tag(pc, 0, 16, 0);
bcreg = pci_conf_read(pc, tag, 0xd0);
pbnum = (bcreg & 0xff000000) >> 24;
break;
case 21: /* PXB 1 bus B */
/* read SUBA1 from MIOC */
tag = pci_make_tag(pc, 0, 16, 0);
bcreg = pci_conf_read(pc, tag, 0xd4);
pbnum = (bcreg & 0x000000ff) + 1;
break;
}
return pbnum;
}
}
return -1;
}
void
pchbattach(device_t parent, device_t self, void *aux)
{