KNF, and reduce the diff between amd64 and i386.
This commit is contained in:
parent
64e6bd21bc
commit
f4ea937e9d
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@ -1,6 +1,6 @@
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/* $NetBSD: mptramp.S,v 1.21 2016/05/11 19:35:08 maxv Exp $ */
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/* $NetBSD: mptramp.S,v 1.22 2016/05/12 09:40:23 maxv Exp $ */
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/*-
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/*
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* Copyright (c) 2000, 2016 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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@ -71,7 +71,7 @@
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* 1) Get the processors running kernel-code from a special
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* page-table and stack page, do chip identification.
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* 2) halt the processors waiting for them to be enabled
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* by a idle-thread
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* by a idle-thread
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*/
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#include "opt_mpbios.h" /* for MPDEBUG */
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@ -84,10 +84,10 @@
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#include <machine/i82489reg.h>
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#include <machine/gdt.h>
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#define _RELOC(x) ((x) - KERNBASE)
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#define RELOC(x) _RELOC(_C_LABEL(x))
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#define _RELOC(x) ((x) - KERNBASE)
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#define RELOC(x) _RELOC(_C_LABEL(x))
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#define _TRMP_LABEL(a) a = . - _C_LABEL(cpu_spinup_trampoline) + MP_TRAMPOLINE
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#define _TRMP_LABEL(a) a = . - _C_LABEL(cpu_spinup_trampoline) + MP_TRAMPOLINE
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#ifdef MPDEBUG
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/*
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@ -131,10 +131,10 @@ LABEL(cpu_spinup_trampoline)
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#ifdef __clang__
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lgdt (mptramp_gdt32_desc) /* load flat descriptor table */
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#else
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data32 addr32 lgdt (mptramp_gdt32_desc) /* load flat descriptor table */
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data32 addr32 lgdt (mptramp_gdt32_desc) /* load flat descriptor table */
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#endif
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movl %cr0, %eax /* get cr0 */
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orl $0x1, %eax /* enable protected mode */
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orl $CR0_PE, %eax /* enable protected mode */
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movl %eax, %cr0 /* doit */
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ljmpl $0x8, $mp_startup
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@ -149,7 +149,7 @@ _TRMP_LABEL(mp_startup)
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movw %ax, %gs
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/* bootstrap stack end, with scratch space.. */
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movl $(MP_TRAMPOLINE+NBPG-16),%esp
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movl $(MP_TRAMPOLINE+PAGE_SIZE-16),%esp
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#ifdef MPDEBUG
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leal RELOC(cpu_trace),%edi
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@ -208,8 +208,8 @@ mptramp_compat:
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ljmp *(%eax)
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_TRMP_LABEL(mptramp_jmp64)
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.long mptramp_longmode
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.word GSEL(GCODE_SEL, SEL_KPL)
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.long mptramp_longmode
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.word GSEL(GCODE_SEL, SEL_KPL)
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#define GDT_LIMIT 0x17 /* 23 = 3 * 8 - 1 */
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_TRMP_LABEL(mptramp_gdt32)
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@ -237,8 +237,8 @@ _TRMP_LABEL(mptramp_longmode)
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_C_LABEL(cpu_spinup_trampoline_end): /* end of code copied to MP_TRAMPOLINE */
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1:
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/* Don't touch lapic until BP has done init sequence. */
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1:
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movq _C_LABEL(cpu_starting),%rdi
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pause
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testq %rdi, %rdi
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@ -1,13 +1,11 @@
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/* $NetBSD: mptramp.S,v 1.27 2014/02/02 22:41:20 dsl Exp $ */
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/* $NetBSD: mptramp.S,v 1.28 2016/05/12 09:40:23 maxv Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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/*
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* Copyright (c) 2000, 2016 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by RedBack Networks Inc.
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*
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* Author: Bill Sommerfeld
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* by RedBack Networks Inc. (Author: Bill Sommerfeld), and Maxime Villard.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -30,7 +28,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1999 Stefan Grefen
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*
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* MP startup ...
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* the stuff from cpu_spinup_trampoline to mp_startup
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* is copied into the first 640 KB
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* the stuff from cpu_spinup_trampoline to mp_startup is copied into the
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* first 640 KB.
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*
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* We startup the processors now when the kthreads become ready.
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* The steps are:
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* 1) Get the processors running kernel-code from a special
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* page-table and stack page, do chip identification.
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* 2) halt the processors waiting for them to be enabled
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* by a idle-thread
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* 1) Get the processors running kernel-code from a special
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* page-table and stack page, do chip identification.
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* 2) halt the processors waiting for them to be enabled
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* by a idle-thread
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*/
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#include <machine/asm.h>
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__KERNEL_RCSID(0, "$NetBSD: mptramp.S,v 1.27 2014/02/02 22:41:20 dsl Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mptramp.S,v 1.28 2016/05/12 09:40:23 maxv Exp $");
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#include "opt_mpbios.h" /* for MPDEBUG */
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#include "assym.h"
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#include <machine/specialreg.h>
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#include <machine/segments.h>
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#include <machine/i82489reg.h>
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#include <machine/gdt.h>
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#define GDTE(a,b) .byte 0xff,0xff,0x0,0x0,0x0,a,b,0x0
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#define _RELOC(x) ((x) - KERNBASE)
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#define RELOC(x) _RELOC(_C_LABEL(x))
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#define GDTE(a,b) .byte 0xff,0xff,0x0,0x0,0x0,a,b,0x0
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#define _RELOC(x) ((x) - KERNBASE)
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#define RELOC(x) _RELOC(_C_LABEL(x))
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#define _TRMP_LABEL(a) a = . - _C_LABEL(cpu_spinup_trampoline) + MP_TRAMPOLINE
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#define _TRMP_LABEL(a) a = . - _C_LABEL(cpu_spinup_trampoline) + MP_TRAMPOLINE
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#ifdef MPDEBUG
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/*
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* Debug code to stop aux. processors in various stages based on the
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* value in cpu_trace.
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*
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* %edi points at cpu_trace; cpu_trace[0] is the "hold point";
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* cpu_trace[1] is the point which the CPU has reached.
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* %edi points at cpu_trace;
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* cpu_trace[0] is the "hold point";
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* cpu_trace[1] is the point which the CPU has reached;
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* cpu_trace[2] is the last value stored by HALTT.
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*/
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#define HALT(x) 1: movl (%edi),%ebx;cmpl $ x,%ebx ; jle 1b ; movl $x,4(%edi)
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#define HALTT(x,y) movl y,8(%edi); HALT(x)
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#define HALT(x) \
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1: movl (%edi),%ebx ; \
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cmpl $x,%ebx ; \
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jle 1b ; \
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movl $x,4(%edi) ;
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#define HALTT(x,y) \
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movl y,8(%edi) ; \
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HALT(x) ;
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#else
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#define HALT(x) /**/
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#define HALTT(x,y) /**/
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#endif
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#define HALT(x)
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#define HALTT(x,y)
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#endif /* MPDEBUG */
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.global _C_LABEL(cpu_spinup_trampoline)
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.global _C_LABEL(cpu_spinup_trampoline_end)
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/* XXX ENTRY() */
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LABEL(cpu_spinup_trampoline)
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cli
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xorw %ax,%ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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xorw %ax,%ax
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%ss
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#ifdef __clang__
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lgdt (gdt_desc) # load flat descriptor table
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lgdt (gdt_desc) /* load flat descriptor table */
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#else
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data32 addr32 lgdt (gdt_desc) # load flat descriptor table
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data32 addr32 lgdt (gdt_desc) /* load flat descriptor table */
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#endif
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movl %cr0, %eax # get cr0
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orl $CR0_PE, %eax # enable protected mode
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movl %eax, %cr0 # doit
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ljmpl $0x8, $mp_startup
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movl %cr0, %eax /* get cr0 */
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orl $CR0_PE, %eax /* enable protected mode */
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movl %eax, %cr0 /* doit */
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ljmpl $0x8, $mp_startup
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_TRMP_LABEL(mp_startup)
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.code32
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movl $0x10, %eax # data segment
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movw %ax, %ds
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movw %ax, %ss
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movl $ (MP_TRAMPOLINE+PAGE_SIZE-16),%esp # bootstrap stack end,
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# with scratch space..
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movl $0x10, %eax /* data segment */
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movw %ax, %ds
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movw %ax, %ss
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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/* bootstrap stack end, with scratch space.. */
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movl $(MP_TRAMPOLINE+PAGE_SIZE-16),%esp
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#ifdef MPDEBUG
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leal RELOC(cpu_trace),%edi
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leal RELOC(cpu_trace),%edi
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#endif
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HALT(0x1)
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/* First, reset the PSL. */
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pushl $PSL_MBO
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pushl $PSL_MBO
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popfl
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/* Enable PSE if available */
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movl RELOC(pmap_largepages),%eax
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orl %eax,%eax
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jz 1f
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jz no_PSE
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movl %cr4,%eax
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orl $CR4_PSE,%eax
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movl %eax,%cr4
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no_PSE:
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1:
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#ifdef PAE /* Enable PAE */
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#ifdef PAE
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/* Enable PAE */
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movl %cr4,%eax
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or $CR4_PAE,%eax
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movl %eax,%cr4
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movl RELOC(mp_pdirpa),%ecx
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HALTT(0x5,%ecx)
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/* Load base of page directory and enable mapping. */
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movl %ecx,%cr3 # load ptd addr into mmu
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movl %cr0,%eax # get control word
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# enable paging & the fpu
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orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax
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movl %eax,%cr0 # and page NOW!
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/* Load base of page directory and enable mapping. */
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movl %ecx,%cr3 /* load PTD addr into MMU */
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movl %cr0,%eax
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orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax
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movl %eax,%cr0
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#ifdef MPDEBUG
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leal _C_LABEL(cpu_trace),%edi
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leal _C_LABEL(cpu_trace),%edi
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#endif
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HALT(0x6)
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pause
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testl %ecx, %ecx
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jz 1b
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HALTT(0x7, %ecx)
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/* %ecx points at our cpu_info structure. */
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movw $((MAXGDTSIZ*8) - 1), 6(%esp) # prepare segment descriptor
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movl CPU_INFO_GDT(%ecx), %eax # for our real gdt
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movl %eax, 8(%esp)
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movw $((MAXGDTSIZ*8) - 1), 6(%esp) /* prepare segment descriptor */
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movl CPU_INFO_GDT(%ecx), %eax /* for our real gdt */
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movl %eax, 8(%esp)
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lgdt 6(%esp)
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HALT(0x8)
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HALT(0x8)
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jmp 1f
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nop
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1:
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1:
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HALT(0x12)
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movl $GSEL(GDATA_SEL, SEL_KPL),%eax #switch to new segment
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%ss
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movl $GSEL(GDATA_SEL, SEL_KPL),%eax /* switch to new segment */
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movl %eax,%ds
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movl %eax,%es
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movl %eax,%ss
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HALT(0x13)
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pushl $GSEL(GCODE_SEL, SEL_KPL)
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pushl $GSEL(GCODE_SEL, SEL_KPL)
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pushl $mp_cont
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HALT(0x14)
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lret
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.align 4,0x0
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_TRMP_LABEL(gdt_table)
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.word 0x0,0x0,0x0,0x0 # null gdte
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GDTE(0x9f,0xcf) # Kernel text
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GDTE(0x93,0xcf) # Kernel data
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_TRMP_LABEL(gdt_desc)
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.word 0x17 # limit 3 entries
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.long gdt_table # base of gdt
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_C_LABEL(cpu_spinup_trampoline_end): #end of code copied to MP_TRAMPOLINE
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.align 4,0x0
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_TRMP_LABEL(gdt_table)
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.word 0x0,0x0,0x0,0x0 /* null gdte */
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GDTE(0x9f,0xcf) /* Kernel text */
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GDTE(0x93,0xcf) /* Kernel data */
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_TRMP_LABEL(gdt_desc)
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.word 0x17 /* limit 3 entries */
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.long gdt_table /* base of gdt */
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_C_LABEL(cpu_spinup_trampoline_end): /* end of code copied to MP_TRAMPOLINE */
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mp_cont:
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HALT(0x15)
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movl CPU_INFO_IDLELWP(%ecx),%esi
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movl L_PCB(%esi),%esi
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/* %esi now points at our PCB. */
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HALTT(0x19, %esi)
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movl PCB_ESP(%esi),%esp
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movl PCB_EBP(%esi),%ebp
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HALT(0x20)
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HALT(0x20)
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/* Switch address space. */
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movl PCB_CR3(%esi),%eax
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HALTT(0x22, %eax)
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HALTT(0x22, %eax)
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movl %eax,%cr3
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HALT(0x25)
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/* load segment registers. */
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movl $GSEL(GCPU_SEL, SEL_KPL),%eax
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HALTT(0x26,%eax)
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movl %eax,%fs
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HALTT(0x26,%eax)
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movl %eax,%fs
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xorl %eax,%eax
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HALTT(0x27,%eax)
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HALTT(0x27,%eax)
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movl %eax,%gs
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movl PCB_CR0(%esi),%eax
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HALTT(0x28,%eax)
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movl %eax,%cr0
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HALTT(0x30,%ecx)
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movl PCB_CR0(%esi),%eax
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HALTT(0x28,%eax)
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movl %eax,%cr0
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HALTT(0x30,%ecx)
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pushl %ecx
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call _C_LABEL(cpu_hatch)
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END(cpu_spinup_trampoline)
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.data
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LABEL(mp_pdirpa)
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.long 0
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END(mp_pdirpa)
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#ifdef MPDEBUG
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LABEL(cpu_trace)
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.long 0x40
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.long 0xff
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.long 0xff
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.long 0x40
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.long 0xff
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.long 0xff
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END(cpu_trace)
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#endif
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