Update from Ken Wellsch.
This commit is contained in:
ragge
parent
6bd144b812
commit
f4c525a623
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@ -1,4 +1,4 @@
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/* $NetBSD: dhu.c,v 1.4 1996/04/08 18:37:28 ragge Exp $ */
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/* $NetBSD: dhu.c,v 1.5 1996/05/19 16:27:02 ragge Exp $ */
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/*
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* Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
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* Copyright (c) 1992, 1993
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@ -36,10 +36,6 @@
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* SUCH DAMAGE.
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*/
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#include "dhu.h"
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#if NDHU > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ioctl.h>
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@ -60,37 +56,28 @@
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#include <vax/uba/dhureg.h>
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/* A DHU has 16 ports while a DHV has only 8 */
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/* A DHU-11 has 16 ports while a DHV-11 has only 8. We use 16 by default */
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#define NDHULINE (NDHU*16)
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#define NDHULINE 16
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/* This is an experiment to try and fake DHU behavior with a DHV.
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* The DHV does not have any programmable delay on input silo level
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* but interrupts immediately when the first character enters.
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* This is really kludgy and so I doubt it will stay. From what could
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* be measured, doing a timeout() delay reduced the input interrupt
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* rate by an order of magnitude (from over 700 to at most 30) with
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* heavy input (e.g. via kermit). Input performance increased 5% too
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* as more CPU cycles were available for the application to consume input.
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*/
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#define DHU_M2U(c) ((c)>>4) /* convert minor(dev) to unit # */
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#define DHU_LINE(u) ((u)&0xF) /* extract line # from minor(dev) */
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#define RX_DELAY 0 /* ticks to delay RX intr handling */
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struct dhu_softc
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{
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struct dhu_softc {
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struct device sc_dev; /* Device struct used by config */
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dhuregs * sc_addr; /* controller reg address */
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struct tty * sc_tty; /* what we work on */
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unsigned sc_txaddr; /* UBA map address to TX buf */
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u_char sc_type; /* controller type, DHU or DHV */
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u_char sc_state; /* to manage TX output status */
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u_short sc_cc; /* character count on TX */
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u_short sc_modem; /* modem bits state */
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int sc_type; /* controller type, DHU or DHV */
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struct {
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struct tty *dhu_tty; /* what we work on */
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int dhu_state; /* to manage TX output status */
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int dhu_txaddr; /* UBA map address to TX buf */
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short dhu_cc; /* character count on TX */
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short dhu_modem; /* modem bits state */
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} sc_dhu[NDHULINE];
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};
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struct dhu_softc dhu_softc[NDHULINE];
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#define IS_DHU 0 /* cntlr is a DHU */
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#define IS_DHV 1 /* cntlr is a DHV */
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#define IS_DHU 16 /* Unibus DHU-11 board linecount */
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#define IS_DHV 8 /* Q-bus DHV-11 or DHQ-11 */
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#define STATE_IDLE 000 /* no current output in progress */
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#define STATE_DMA_RUNNING 001 /* DMA TX in progress */
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@ -111,8 +98,7 @@ struct dhu_softc dhu_softc[NDHULINE];
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/* a baud rate from the same group. So limiting to B is likely */
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/* best, although clone boards like the ABLE QHV allow all settings. */
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static struct speedtab dhuspeedtab[] =
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{
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static struct speedtab dhuspeedtab[] = {
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{ 0, 0 }, /* Groups */
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{ 50, DHU_LPR_B50 }, /* A */
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{ 75, DHU_LPR_B75 }, /* B */
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@ -135,46 +121,40 @@ static struct speedtab dhuspeedtab[] =
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static int dhu_match __P((struct device *, void *, void *));
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static void dhu_attach __P((struct device *, struct device *, void *));
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static void dhurint __P((int));
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static void dhuxint __P((int));
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static void dhustart __P((struct tty *));
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static int dhuparam __P((struct tty *, struct termios *));
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static int dhuiflow __P((struct tty *, int));
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static unsigned dhumctl __P((struct dhu_softc *,int, int, int));
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int dhuopen __P((dev_t, int, int, struct proc *));
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int dhuclose __P((dev_t, int, int, struct proc *));
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int dhuread __P((dev_t, struct uio *, int));
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int dhuwrite __P((dev_t, struct uio *, int));
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int dhuioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
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int dhustop __P((struct tty *, int));
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struct tty * dhutty __P((dev_t));
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struct cfdriver dhu_cd = {
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NULL, "dhu", DV_TTY
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};
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struct cfattach dhu_ca = {
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sizeof(struct device), dhu_match, dhu_attach
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sizeof(struct dhu_softc), dhu_match, dhu_attach
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};
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static void dhurint __P((int));
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static void dhuxint __P((int));
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static void dhustart __P((struct tty *));
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static int dhuparam __P((struct tty *, struct termios *));
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static int dhuiflow __P((struct tty *, int));
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int dhustop __P((struct tty *, int));
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static unsigned dhumctl __P((int, int, int));
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int dhuopen __P((dev_t, int, int, struct proc *));
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int dhuclose __P((dev_t, int, int, struct proc *));
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int dhuread __P((dev_t, struct uio *, int));
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int dhuwrite __P((dev_t, struct uio *, int));
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int dhuioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
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struct tty * dhutty __P((dev_t));
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/* Autoconfig handles: setup the controller to interrupt, */
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/* then complete the housecleaning for full operation */
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static int
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dhu_match (parent, match, aux)
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dhu_match(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct uba_attach_args *ua = aux;
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static int nunits = 0;
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register dhuregs *dhuaddr;
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register int n;
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if (nunits > NDHU)
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return 0;
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dhuaddr = (dhuregs *) ua->ua_addr;
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/* Reset controller to initialize, enable TX/RX interrupts */
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@ -201,122 +181,80 @@ dhu_match (parent, match, aux)
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if ((dhuaddr->dhu_csr & DHU_CSR_DIAG_FAIL) != 0)
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return 0;
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/* Register the RX interrupt handler and pass unit # as arg */
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/* Register the RX interrupt handler */
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ua->ua_ivec = dhurint;
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nunits++;
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return 1;
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}
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static void
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dhu_attach (parent, self, aux)
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dhu_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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register struct dhu_softc *sc = (void *)self;
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register struct uba_attach_args *ua = aux;
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register dhuregs *dhuaddr;
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register unsigned c;
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register int n, m;
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register int n;
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dhuaddr = (dhuregs *) ua->ua_addr;
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/* Process the 8 bytes of diagnostic info put into */
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/* the FIFO following the master reset operation. */
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printf ("\ndhv%d:", self->dv_unit);
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printf("\n%s:", self->dv_xname);
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for (n = 0; n < 8; n++) {
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c = dhuaddr->dhu_rbuf;
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if ((c&DHU_DIAG_CODE) == DHU_DIAG_CODE) {
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if ((c&0200) == 0000)
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printf (" rom(%d) version %d",
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printf(" rom(%d) version %d",
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((c>>1)&01), ((c>>2)&037));
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else if (((c>>2)&07) != 0)
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printf (" diag-error(proc%d)=%x",
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printf(" diag-error(proc%d)=%x",
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((c>>1)&01), ((c>>2)&07));
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}
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}
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printf ("\n");
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/* Initialize our static softc structure. */
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printf("\n");
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c = dhuaddr->dhu_stat; /* get flag to distinguish DHU from DHV */
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for (n = 0; n < ((c & DHU_STAT_DHU)? 16: 8); n++) {
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m = ((self->dv_unit) << 4) + n;
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dhu_softc[m].sc_addr = dhuaddr;
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dhu_softc[m].sc_tty = ttymalloc();
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dhu_softc[m].sc_type = (c & DHU_STAT_DHU)? IS_DHU: IS_DHV;
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dhu_softc[m].sc_state = STATE_IDLE;
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dhu_softc[m].sc_txaddr = uballoc (parent->dv_unit,
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dhu_softc[m].sc_tty->t_outq.c_cs,
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dhu_softc[m].sc_tty->t_outq.c_cn,
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UBA_CANTWAIT);
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}
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sc->sc_addr = dhuaddr;
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sc->sc_type = (c & DHU_STAT_DHU)? IS_DHU: IS_DHV;
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/* Now stuff TX interrupt handler in place */
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ubasetvec (self, ua->ua_cvec+1, dhuxint);
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ubasetvec(self, ua->ua_cvec + 1, dhuxint);
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return;
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}
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/* Receiver Interrupt */
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#if RX_DELAY > 0
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static int RXtimeout = 0;
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static void
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dhurint (cntlr)
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int cntlr;
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dhurint(unit)
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int unit;
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{
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static void dhuRXint __P((void *));
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if (RXtimeout == 0) {
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RXtimeout = 1;
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timeout (dhuRXint, (void *)cntlr, RX_DELAY);
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}
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return;
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}
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static void
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dhuRXint (arg)
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void * arg;
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{
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#else
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static void
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dhurint (cntlr)
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int cntlr;
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{
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#endif
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struct dhu_softc *sc = dhu_cd.cd_devs[unit];
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register dhuregs *dhuaddr;
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register struct tty *tp;
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register int cc, unit;
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register int cc, line;
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register unsigned c, delta;
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int overrun = 0;
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#if RX_DELAY > 0
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int cntlr = (int) arg;
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int s;
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s = spltty();
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#endif
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dhuaddr = sc->sc_addr;
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dhuaddr = dhu_softc[cntlr].sc_addr;
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while ((c = dhuaddr->dhu_rbuf) & DHU_RBUF_DATA_VALID) {
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while ((c = dhuaddr->dhu_rbuf) & DHU_RBUF_DATA_VALID)
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{
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/* Ignore diagnostic FIFO entries. */
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if ((c&DHU_DIAG_CODE) == DHU_DIAG_CODE)
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if ((c & DHU_DIAG_CODE) == DHU_DIAG_CODE)
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continue;
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cc = c & 0xff;
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unit = (cntlr<<4) | ((c>>8)&017);
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tp = dhu_softc[unit].sc_tty;
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cc = c & 0xFF;
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line = DHU_LINE(c>>8);
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tp = sc->sc_dhu[line].dhu_tty;
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/* LINK.TYPE is set so we get modem control FIFO entries */
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@ -329,28 +267,33 @@ dhurint (cntlr)
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}
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else if ((tp->t_state & TS_CARR_ON) &&
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(*linesw[tp->t_line].l_modem)(tp, 0) == 0)
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(void) dhumctl (unit, 0, DMSET);
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(void) dhumctl(sc, line, 0, DMSET);
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/* Do CRTSCTS flow control */
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delta = c ^ dhu_softc[unit].sc_modem;
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dhu_softc[unit].sc_modem = c;
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delta = c ^ sc->sc_dhu[line].dhu_modem;
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sc->sc_dhu[line].dhu_modem = c;
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if ((delta & DHU_STAT_CTS) &&
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(tp->t_state & TS_ISOPEN) &&
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(tp->t_cflag & CRTSCTS)) {
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if (c & DHU_STAT_CTS) {
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tp->t_state &= ~TS_TTSTOP;
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ttstart (tp);
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ttstart(tp);
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} else {
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tp->t_state |= TS_TTSTOP;
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dhustop (tp, 0);
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dhustop(tp, 0);
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}
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}
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continue;
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}
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if (!(tp->t_state & TS_ISOPEN)) {
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wakeup((caddr_t)&tp->t_rawq);
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continue;
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}
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if ((c & DHU_RBUF_OVERRUN_ERR) && overrun == 0) {
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log(LOG_WARNING, "dhv(%d,%d): silo overflow\n",
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cntlr, (c >> 8) & 017);
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log(LOG_WARNING, "%s: silo overflow, line %d\n",
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sc->sc_dev.dv_xname, line);
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overrun = 1;
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}
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/* A BREAK key will appear as a NULL with a framing error */
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@ -361,71 +304,90 @@ dhurint (cntlr)
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(*linesw[tp->t_line].l_rint)(cc, tp);
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}
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#if RX_DELAY > 0
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RXtimeout = 0;
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(void) splx(s);
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#endif
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return;
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}
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/* Transmitter Interrupt */
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static void
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dhuxint (cntlr)
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int cntlr;
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dhuxint(unit)
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int unit;
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{
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register struct dhu_softc *sc = dhu_cd.cd_devs[unit];
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register dhuregs *dhuaddr;
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register struct dhu_softc *sc;
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register struct tty *tp;
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register unsigned csr;
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register int unit;
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register int line;
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dhuaddr = dhu_softc[cntlr].sc_addr;
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dhuaddr = sc->sc_addr;
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csr = (dhuaddr->dhu_csr_hi) << 8;
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line = DHU_LINE(dhuaddr->dhu_csr_hi);
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unit = (cntlr<<4)|((csr>>8)&017);
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sc = &dhu_softc[unit];
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tp = sc->sc_tty;
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tp = sc->sc_dhu[line].dhu_tty;
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tp->t_state &= ~TS_BUSY;
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if (tp->t_state & TS_FLUSH)
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tp->t_state &= ~TS_FLUSH;
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else {
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if (sc->sc_state == STATE_DMA_STOPPED)
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sc->sc_cc -= dhuaddr->dhu_tbufcnt;
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ndflush (&tp->t_outq, sc->sc_cc);
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sc->sc_cc = 0;
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if (sc->sc_dhu[line].dhu_state == STATE_DMA_STOPPED)
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sc->sc_dhu[line].dhu_cc -= dhuaddr->dhu_tbufcnt;
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ndflush(&tp->t_outq, sc->sc_dhu[line].dhu_cc);
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sc->sc_dhu[line].dhu_cc = 0;
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}
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sc->sc_state = STATE_IDLE;
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sc->sc_dhu[line].dhu_state = STATE_IDLE;
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if (tp->t_line)
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(*linesw[tp->t_line].l_start)(tp);
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else
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dhustart (tp);
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dhustart(tp);
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return;
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}
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int
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dhuopen (dev, flag, mode, p)
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dhuopen(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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{
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register dhuregs *dhuaddr;
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register struct tty *tp;
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register int unit;
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register int unit, line;
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struct dhu_softc *sc;
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int s, error = 0;
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unit = minor(dev);
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if (unit >= NDHULINE)
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unit = DHU_M2U(minor(dev));
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line = DHU_LINE(minor(dev));
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if (unit >= dhu_cd.cd_ndevs || dhu_cd.cd_devs[unit] == NULL)
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return (ENXIO);
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tp = dhu_softc[unit].sc_tty;
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if (tp == NULL)
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tp = dhu_softc[unit].sc_tty = ttymalloc();
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sc = dhu_cd.cd_devs[unit];
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if (line >= sc->sc_type)
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return ENXIO;
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tp = sc->sc_dhu[line].dhu_tty;
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if (tp == NULL) {
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tp = sc->sc_dhu[line].dhu_tty = ttymalloc();
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if (tp == NULL)
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return ENXIO;
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sc->sc_dhu[line].dhu_state = STATE_IDLE;
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sc->sc_dhu[line].dhu_txaddr = uballoc(
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sc->sc_dev.dv_parent->dv_unit,
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tp->t_outq.c_cs, tp->t_outq.c_cn, 0);
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dhuaddr = sc->sc_addr;
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s = spltty();
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dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
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sc->sc_dhu[line].dhu_modem = dhuaddr->dhu_stat;
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(void) splx(s);
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}
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tp->t_oproc = dhustart;
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tp->t_param = dhuparam;
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tp->t_hwiflow = dhuiflow;
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@ -445,7 +407,7 @@ dhuopen (dev, flag, mode, p)
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} else if ((tp->t_state & TS_XCLUDE) && curproc->p_ucred->cr_uid != 0)
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return (EBUSY);
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/* Use DMBIS and *not* DMSET or else we clobber incoming bits */
|
||||
if (dhumctl (unit, DML_DTR|DML_RTS, DMBIS) & DML_DCD)
|
||||
if (dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS) & DML_DCD)
|
||||
tp->t_state |= TS_CARR_ON;
|
||||
s = spltty();
|
||||
while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
|
||||
|
|
@ -464,67 +426,84 @@ dhuopen (dev, flag, mode, p)
|
|||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
dhuclose (dev, flag, mode, p)
|
||||
dhuclose(dev, flag, mode, p)
|
||||
dev_t dev;
|
||||
int flag, mode;
|
||||
struct proc *p;
|
||||
{
|
||||
register struct tty *tp;
|
||||
register int unit = minor(dev);
|
||||
register int unit, line;
|
||||
struct dhu_softc *sc;
|
||||
|
||||
tp = dhu_softc[unit].sc_tty;
|
||||
unit = DHU_M2U(minor(dev));
|
||||
line = DHU_LINE(minor(dev));
|
||||
|
||||
sc = dhu_cd.cd_devs[unit];
|
||||
|
||||
tp = sc->sc_dhu[line].dhu_tty;
|
||||
|
||||
(*linesw[tp->t_line].l_close)(tp, flag);
|
||||
|
||||
/* Make sure a BREAK state is not left enabled. */
|
||||
|
||||
(void) dhumctl (unit, DML_BRK, DMBIC);
|
||||
(void) dhumctl(sc, line, DML_BRK, DMBIC);
|
||||
|
||||
/* Do a hangup if so required. */
|
||||
|
||||
if ((tp->t_cflag & HUPCL) || (tp->t_state & TS_WOPEN) ||
|
||||
!(tp->t_state & TS_ISOPEN))
|
||||
(void) dhumctl (unit, 0, DMSET);
|
||||
(void) dhumctl(sc, line, 0, DMSET);
|
||||
|
||||
return (ttyclose(tp));
|
||||
}
|
||||
|
||||
int
|
||||
dhuread (dev, uio, flag)
|
||||
dhuread(dev, uio, flag)
|
||||
dev_t dev;
|
||||
struct uio *uio;
|
||||
{
|
||||
register struct dhu_softc *sc;
|
||||
register struct tty *tp;
|
||||
|
||||
tp = dhu_softc[minor(dev)].sc_tty;
|
||||
sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
|
||||
|
||||
tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
|
||||
return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
|
||||
}
|
||||
|
||||
int
|
||||
dhuwrite (dev, uio, flag)
|
||||
dhuwrite(dev, uio, flag)
|
||||
dev_t dev;
|
||||
struct uio *uio;
|
||||
{
|
||||
register struct dhu_softc *sc;
|
||||
register struct tty *tp;
|
||||
|
||||
tp = dhu_softc[minor(dev)].sc_tty;
|
||||
sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
|
||||
|
||||
tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
|
||||
return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
|
||||
}
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
dhuioctl (dev, cmd, data, flag, p)
|
||||
dhuioctl(dev, cmd, data, flag, p)
|
||||
dev_t dev;
|
||||
u_long cmd;
|
||||
caddr_t data;
|
||||
int flag;
|
||||
struct proc *p;
|
||||
{
|
||||
register struct dhu_softc *sc;
|
||||
register struct tty *tp;
|
||||
register int unit = minor(dev);
|
||||
register int unit, line;
|
||||
int error;
|
||||
|
||||
tp = dhu_softc[unit].sc_tty;
|
||||
unit = DHU_M2U(minor(dev));
|
||||
line = DHU_LINE(minor(dev));
|
||||
sc = dhu_cd.cd_devs[unit];
|
||||
tp = sc->sc_dhu[line].dhu_tty;
|
||||
|
||||
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
|
||||
if (error >= 0)
|
||||
return (error);
|
||||
|
|
@ -535,35 +514,35 @@ dhuioctl (dev, cmd, data, flag, p)
|
|||
switch (cmd) {
|
||||
|
||||
case TIOCSBRK:
|
||||
(void) dhumctl (unit, DML_BRK, DMBIS);
|
||||
(void) dhumctl(sc, line, DML_BRK, DMBIS);
|
||||
break;
|
||||
|
||||
case TIOCCBRK:
|
||||
(void) dhumctl (unit, DML_BRK, DMBIC);
|
||||
(void) dhumctl(sc, line, DML_BRK, DMBIC);
|
||||
break;
|
||||
|
||||
case TIOCSDTR:
|
||||
(void) dhumctl (unit, DML_DTR|DML_RTS, DMBIS);
|
||||
(void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS);
|
||||
break;
|
||||
|
||||
case TIOCCDTR:
|
||||
(void) dhumctl (unit, DML_DTR|DML_RTS, DMBIC);
|
||||
(void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIC);
|
||||
break;
|
||||
|
||||
case TIOCMSET:
|
||||
(void) dhumctl (unit, *(int *)data, DMSET);
|
||||
(void) dhumctl(sc, line, *(int *)data, DMSET);
|
||||
break;
|
||||
|
||||
case TIOCMBIS:
|
||||
(void) dhumctl (unit, *(int *)data, DMBIS);
|
||||
(void) dhumctl(sc, line, *(int *)data, DMBIS);
|
||||
break;
|
||||
|
||||
case TIOCMBIC:
|
||||
(void) dhumctl (unit, *(int *)data, DMBIC);
|
||||
(void) dhumctl(sc, line, *(int *)data, DMBIC);
|
||||
break;
|
||||
|
||||
case TIOCMGET:
|
||||
*(int *)data = (dhumctl (unit, 0, DMGET) & ~DML_BRK);
|
||||
*(int *)data = (dhumctl(sc, line, 0, DMGET) & ~DML_BRK);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -573,35 +552,37 @@ dhuioctl (dev, cmd, data, flag, p)
|
|||
}
|
||||
|
||||
struct tty *
|
||||
dhutty (dev)
|
||||
dhutty(dev)
|
||||
dev_t dev;
|
||||
{
|
||||
struct tty *tp = dhu_softc[minor(dev)].sc_tty;
|
||||
struct dhu_softc *sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
|
||||
struct tty *tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
|
||||
return (tp);
|
||||
}
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
dhustop (tp, flag)
|
||||
dhustop(tp, flag)
|
||||
register struct tty *tp;
|
||||
{
|
||||
register dhuregs *dhuaddr;
|
||||
register struct dhu_softc *sc;
|
||||
int unit = minor(tp->t_dev);
|
||||
register dhuregs *dhuaddr;
|
||||
register int line;
|
||||
int s;
|
||||
|
||||
s = spltty();
|
||||
|
||||
if (tp->t_state & TS_BUSY)
|
||||
{
|
||||
sc = &dhu_softc[unit];
|
||||
if (tp->t_state & TS_BUSY) {
|
||||
|
||||
if (sc->sc_state == STATE_DMA_RUNNING)
|
||||
{
|
||||
sc->sc_state = STATE_DMA_STOPPED;
|
||||
sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
|
||||
line = DHU_LINE(minor(tp->t_dev));
|
||||
|
||||
if (sc->sc_dhu[line].dhu_state == STATE_DMA_RUNNING) {
|
||||
|
||||
sc->sc_dhu[line].dhu_state = STATE_DMA_STOPPED;
|
||||
|
||||
dhuaddr = sc->sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | (unit & 017));
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
|
||||
dhuaddr->dhu_lnctrl |= DHU_LNCTRL_DMA_ABORT;
|
||||
}
|
||||
|
||||
|
|
@ -613,14 +594,13 @@ dhustop (tp, flag)
|
|||
}
|
||||
|
||||
static void
|
||||
dhustart (tp)
|
||||
dhustart(tp)
|
||||
register struct tty *tp;
|
||||
{
|
||||
register struct dhu_softc *sc;
|
||||
register dhuregs *dhuaddr;
|
||||
register int unit = minor(tp->t_dev);
|
||||
register unsigned addr;
|
||||
register int cc;
|
||||
register int line, cc;
|
||||
register int addr;
|
||||
int s;
|
||||
|
||||
s = spltty();
|
||||
|
|
@ -641,28 +621,30 @@ dhustart (tp)
|
|||
|
||||
tp->t_state |= TS_BUSY;
|
||||
|
||||
sc = &dhu_softc[unit];
|
||||
sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
|
||||
|
||||
line = DHU_LINE(minor(tp->t_dev));
|
||||
|
||||
dhuaddr = sc->sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | (unit & 017));
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
|
||||
|
||||
sc->sc_cc = cc;
|
||||
sc->sc_dhu[line].dhu_cc = cc;
|
||||
|
||||
if (cc == 1)
|
||||
{
|
||||
sc->sc_state = STATE_TX_ONE_CHAR;
|
||||
if (cc == 1) {
|
||||
|
||||
sc->sc_dhu[line].dhu_state = STATE_TX_ONE_CHAR;
|
||||
dhuaddr->dhu_txchar = DHU_TXCHAR_DATA_VALID | *tp->t_outq.c_cf;
|
||||
}
|
||||
else
|
||||
{
|
||||
sc->sc_state = STATE_DMA_RUNNING;
|
||||
|
||||
addr = UBAI_ADDR(sc->sc_txaddr) +
|
||||
} else {
|
||||
|
||||
sc->sc_dhu[line].dhu_state = STATE_DMA_RUNNING;
|
||||
|
||||
addr = UBAI_ADDR(sc->sc_dhu[line].dhu_txaddr) +
|
||||
(tp->t_outq.c_cf - tp->t_outq.c_cs);
|
||||
|
||||
dhuaddr->dhu_tbufcnt = cc;
|
||||
dhuaddr->dhu_tbufad1 = (addr & 0xffff);
|
||||
dhuaddr->dhu_tbufad2 = ((addr>>16) & 0x3f) |
|
||||
dhuaddr->dhu_tbufad1 = (addr & 0xFFFF);
|
||||
dhuaddr->dhu_tbufad2 = ((addr>>16) & 0x3F) |
|
||||
DHU_TBUFAD2_TX_ENABLE;
|
||||
|
||||
dhuaddr->dhu_lnctrl &= ~DHU_LNCTRL_DMA_ABORT;
|
||||
|
|
@ -674,18 +656,24 @@ out:
|
|||
}
|
||||
|
||||
static int
|
||||
dhuparam (tp, t)
|
||||
dhuparam(tp, t)
|
||||
register struct tty *tp;
|
||||
register struct termios *t;
|
||||
{
|
||||
struct dhu_softc *sc;
|
||||
register dhuregs *dhuaddr;
|
||||
register int cflag = t->c_cflag;
|
||||
int unit = minor(tp->t_dev);
|
||||
int ispeed = ttspeedtab(t->c_ispeed, dhuspeedtab);
|
||||
int ospeed = ttspeedtab(t->c_ospeed, dhuspeedtab);
|
||||
register unsigned lpr, lnctrl;
|
||||
int unit, line;
|
||||
int s;
|
||||
|
||||
unit = DHU_M2U(minor(tp->t_dev));
|
||||
line = DHU_LINE(minor(tp->t_dev));
|
||||
|
||||
sc = dhu_cd.cd_devs[unit];
|
||||
|
||||
/* check requested parameters */
|
||||
if (ospeed < 0 || ispeed < 0)
|
||||
return (EINVAL);
|
||||
|
|
@ -695,31 +683,35 @@ dhuparam (tp, t)
|
|||
tp->t_cflag = cflag;
|
||||
|
||||
if (ospeed == 0) {
|
||||
(void) dhumctl (unit, 0, DMSET); /* hang up line */
|
||||
(void) dhumctl(sc, line, 0, DMSET); /* hang up line */
|
||||
return (0);
|
||||
}
|
||||
|
||||
s = spltty();
|
||||
dhuaddr = dhu_softc[unit].sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | (unit & 017));
|
||||
dhuaddr = sc->sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
|
||||
|
||||
lpr = ((ispeed&017)<<8) | ((ospeed&017)<<12) ;
|
||||
|
||||
switch (cflag & CSIZE)
|
||||
{
|
||||
case CS5:
|
||||
switch (cflag & CSIZE) {
|
||||
|
||||
case CS5:
|
||||
lpr |= DHU_LPR_5_BIT_CHAR;
|
||||
break;
|
||||
case CS6:
|
||||
|
||||
case CS6:
|
||||
lpr |= DHU_LPR_6_BIT_CHAR;
|
||||
break;
|
||||
case CS7:
|
||||
|
||||
case CS7:
|
||||
lpr |= DHU_LPR_7_BIT_CHAR;
|
||||
break;
|
||||
default:
|
||||
|
||||
default:
|
||||
lpr |= DHU_LPR_8_BIT_CHAR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (cflag & PARENB)
|
||||
lpr |= DHU_LPR_PARENB;
|
||||
if (!(cflag & PARODD))
|
||||
|
|
@ -737,6 +729,8 @@ dhuparam (tp, t)
|
|||
|
||||
lnctrl |= (DHU_LNCTRL_RX_ENABLE | DHU_LNCTRL_LINK_TYPE);
|
||||
|
||||
/* Enable the auto XON/XOFF feature on the controller */
|
||||
|
||||
if (t->c_iflag & IXON)
|
||||
lnctrl |= DHU_LNCTRL_OAUTO;
|
||||
else
|
||||
|
|
@ -749,29 +743,30 @@ dhuparam (tp, t)
|
|||
|
||||
dhuaddr->dhu_lnctrl = lnctrl;
|
||||
|
||||
dhu_softc[unit].sc_modem = dhuaddr->dhu_stat;
|
||||
|
||||
(void) splx(s);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
dhuiflow (tp, flag)
|
||||
dhuiflow(tp, flag)
|
||||
struct tty *tp;
|
||||
int flag;
|
||||
{
|
||||
int unit = minor(tp->t_dev);
|
||||
register struct dhu_softc *sc;
|
||||
register int line = DHU_LINE(minor(tp->t_dev));
|
||||
|
||||
if (tp->t_cflag & CRTSCTS) {
|
||||
(void) dhumctl (unit, DML_RTS, ((flag)? DMBIC: DMBIS));
|
||||
sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
|
||||
(void) dhumctl(sc, line, DML_RTS, ((flag)? DMBIC: DMBIS));
|
||||
return (1);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static unsigned
|
||||
dhumctl (unit, bits, how)
|
||||
int unit, bits, how;
|
||||
dhumctl(sc, line, bits, how)
|
||||
struct dhu_softc *sc;
|
||||
int line, bits, how;
|
||||
{
|
||||
register dhuregs *dhuaddr;
|
||||
register unsigned status;
|
||||
|
|
@ -781,8 +776,8 @@ dhumctl (unit, bits, how)
|
|||
|
||||
s = spltty();
|
||||
|
||||
dhuaddr = dhu_softc[unit].sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | (unit & 017));
|
||||
dhuaddr = sc->sc_addr;
|
||||
dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
|
||||
|
||||
mbits = 0;
|
||||
|
||||
|
|
@ -815,21 +810,21 @@ dhumctl (unit, bits, how)
|
|||
if (lnctrl & DHU_LNCTRL_BREAK)
|
||||
mbits |= DML_BRK;
|
||||
|
||||
switch (how)
|
||||
{
|
||||
case DMSET:
|
||||
switch (how) {
|
||||
|
||||
case DMSET:
|
||||
mbits = bits;
|
||||
break;
|
||||
|
||||
case DMBIS:
|
||||
case DMBIS:
|
||||
mbits |= bits;
|
||||
break;
|
||||
|
||||
case DMBIC:
|
||||
case DMBIC:
|
||||
mbits &= ~bits;
|
||||
break;
|
||||
|
||||
case DMGET:
|
||||
case DMGET:
|
||||
(void) splx(s);
|
||||
return (mbits);
|
||||
}
|
||||
|
|
@ -854,5 +849,3 @@ dhumctl (unit, bits, how)
|
|||
(void) splx(s);
|
||||
return (mbits);
|
||||
}
|
||||
|
||||
#endif /* #if NDHU > 0 */
|
||||
|
|
|
|||
Loading…
Reference in New Issue