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Nuke sc_iobase (and a serious misuse of it!)

This commit is contained in:
thorpej 1998-07-21 00:22:29 +00:00
parent 22ff8accae
commit f45804c4c6
2 changed files with 6 additions and 8 deletions
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11
sys/arch/arm32/isa/if_cs_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_cs_isa.c,v 1.10 1998/07/21 00:18:35 thorpej Exp $ */
/* $NetBSD: if_cs_isa.c,v 1.11 1998/07/21 00:22:29 thorpej Exp $ */
/*
* Copyright 1997
@ -440,7 +440,6 @@ csAttach(parent, self, aux)
sc->sc_iot = ia->ia_iot;
sc->sc_memt = ia->ia_memt;
sc->sc_iobase = ia->ia_iobase;
sc->sc_drq = ia->ia_drq;
sc->sc_int = ia->ia_irq;
@ -829,10 +828,10 @@ csResetChip(sc)
*/
/* Transition SBHE to switch chip from 8-bit to 16-bit */
bus_space_read_1(sc->sc_iot, sc->sc_iobase, PORT_PKTPG_PTR);
bus_space_read_1(sc->sc_iot, sc->sc_iobase, PORT_PKTPG_PTR + 1);
bus_space_read_1(sc->sc_iot, sc->sc_iobase, PORT_PKTPG_PTR);
bus_space_read_1(sc->sc_iot, sc->sc_iobase, PORT_PKTPG_PTR + 1);
bus_space_read_1(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR);
bus_space_read_1(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR + 1);
bus_space_read_1(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR);
bus_space_read_1(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR + 1);
/* Wait until the EEPROM is not busy */
for (x = 0; x < MAXLOOP; x++) {

3
sys/arch/arm32/isa/if_csvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_csvar.h,v 1.5 1998/07/21 00:20:35 thorpej Exp $ */
/* $NetBSD: if_csvar.h,v 1.6 1998/07/21 00:22:30 thorpej Exp $ */
/*
* Copyright 1997
@ -76,7 +76,6 @@ struct cs_softc {
bus_space_handle_t sc_ioh; /* bus space handles */
bus_space_handle_t sc_memh;
isa_chipset_tag_t sc_ic; /* ISA chipset */
u_int16_t sc_iobase; /* base IO port address */
u_int16_t sc_int; /* interrupt level */
int pPacketPagePhys; /* physical io address */
u_int16_t mediaType; /* 10BaseT, thin wire */