Preliminary UltraSPARC III suport (not enabled yet).
This commit is contained in:
parent
04bdd02c1a
commit
f2e3486b5b
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $ */
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/* $NetBSD: locore.s,v 1.138 2001/08/30 22:58:30 eeh Exp $ */
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/*
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* Copyright (c) 1996-2001 Eduardo Horvath
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@ -56,6 +56,7 @@
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*/
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#define INTRLIST
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#define SPITFIRE /* We don't support Cheetah (USIII) yet */
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#define INTR_INTERLOCK /* Use IH_PEND field to interlock interrupts */
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#undef PARANOID /* Extremely expensive consistency checks */
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#undef NO_VCACHE /* Map w/D$ disabled */
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@ -2183,8 +2184,8 @@ dmmu_write_fault:
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inc %g2
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stw %g2, [%g1+%lo(_C_LABEL(protfix))]
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#endif
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mov 0x010, %g1 ! Secondary flush
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mov 0x020, %g5 ! Nucleus flush
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mov DEMAP_PAGE_SECONDARY, %g1 ! Secondary flush
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mov DEMAP_PAGE_NUCLEUS, %g5 ! Nucleus flush
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stxa %g0, [%g7] ASI_DMMU ! clear out the fault
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membar #Sync
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sllx %g3, (64-13), %g7 ! Need to demap old entry first
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@ -2303,8 +2304,8 @@ data_miss:
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#if 0
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/* This was a miss -- should be nothing to demap. */
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sllx %g3, (64-13), %g6 ! Need to demap old entry first
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mov 0x010, %g1 ! Secondary flush
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mov 0x020, %g5 ! Nucleus flush
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mov DEMAP_PAGE_SECONDARY, %g1 ! Secondary flush
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mov DEMAP_PAGE_NUCLEUS, %g5 ! Nucleus flush
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movrz %g6, %g5, %g1 ! Pick one
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andn %g3, 0xfff, %g6
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or %g6, %g1, %g6
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@ -3269,11 +3270,11 @@ instr_miss:
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stx %g4, [%g6] ! debug -- what we tried to enter in TLB
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stb %g3, [%g6+0x20] ! debug
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#endif
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#if 1
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#if 0
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/* This was a miss -- should be nothing to demap. */
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sllx %g3, (64-13), %g6 ! Need to demap old entry first
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mov 0x010, %g1 ! Secondary flush
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mov 0x020, %g5 ! Nucleus flush
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mov DEMAP_PAGE_SECONDARY, %g1 ! Secondary flush
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mov DEMAP_PAGE_NUCLEUS, %g5 ! Nucleus flush
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movrz %g6, %g5, %g1 ! Pick one
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andn %g3, 0xfff, %g6
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or %g6, %g1, %g6
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@ -5572,7 +5573,7 @@ _C_LABEL(cpu_initialize):
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!!
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!! Demap entire context 0 kernel
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!!
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or %l0, 0x020, %o0 ! Context = Nucleus
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or %l0, DEMAP_PAGE_NUCLEUS, %o0 ! Context = Nucleus
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add %l1, %l7, %o1 ! Demap all of kernel text seg
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andn %o1, %l7, %o1 ! rounded up to 4MB.
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set 0x2000, %o2 ! 8K page size
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@ -5584,7 +5585,7 @@ _C_LABEL(cpu_initialize):
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bleu,pt %xcc, 0b ! Next page
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add %o0, %o2, %o0
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or %l3, 0x020, %o0 ! Context = Nucleus
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or %l3, DEMAP_PAGE_NUCLEUS, %o0 ! Context = Nucleus
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add %l4, %l7, %o1 ! Demap all of kernel data seg
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andn %o1, %l7, %o1 ! rounded up to 4MB.
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0:
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@ -5623,18 +5624,19 @@ _C_LABEL(cpu_initialize):
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!!
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mov CTX_PRIMARY, %o0
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stxa %g0, [%o0] ASI_DMMU
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membar #Sync ! No real reason for this XXXX
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membar #Sync ! No real reason for this XXXX
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flush %o5
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!!
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!! Demap context 1
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!!
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#ifdef SPITFIRE
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mov 1, %o1
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mov CTX_SECONDARY, %o0
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stxa %o1, [%o0] ASI_DMMU
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membar #Sync ! This probably should be a flush, but it works
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flush %l0
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mov 0x050, %o4
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mov DEMAP_CTX_SECONDARY, %o4
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stxa %o4, [%o4] ASI_DMMU_DEMAP
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membar #Sync
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stxa %o4, [%o4] ASI_IMMU_DEMAP
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@ -5643,7 +5645,24 @@ _C_LABEL(cpu_initialize):
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stxa %g0, [%o0] ASI_DMMU
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membar #Sync
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flush %l0
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#else
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mov 1, %o1
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wrpr %g0, 1, %tl ! Enter nucleus context
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mov CTX_PRIMARY, %o0
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stxa %o1, [%o0] ASI_DMMU
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membar #Sync ! This probably should be a flush, but it works
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flush %l0
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mov DEMAP_CTX_PRIMARY, %o4
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stxa %o4, [%o4] ASI_DMMU_DEMAP
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membar #Sync
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stxa %o4, [%o4] ASI_IMMU_DEMAP
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membar #Sync
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flush %l0
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stxa %g0, [%o0] ASI_DMMU
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membar #Sync
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flush %l0
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wrpr %g0, 0, %tl ! Exit nucleus context
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#endif
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#ifdef DEBUG
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set 1f, %o0 ! Debug printf
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call _C_LABEL(prom_printf)
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@ -5923,6 +5942,7 @@ _C_LABEL(tlb_flush_pte):
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.text
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2:
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#endif
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#ifdef SPITFIRE
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mov CTX_SECONDARY, %o2
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andn %o0, 0xfff, %g2 ! drop unused va bits
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ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
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@ -5930,7 +5950,7 @@ _C_LABEL(tlb_flush_pte):
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membar #LoadStore
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stxa %o1, [%o2] ASI_DMMU ! Insert context to demap
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membar #Sync
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or %g2, 0x010, %g2 ! Demap page from secondary context only
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or %g2, DEMAP_PAGE_SECONDARY, %g2 ! Demap page from secondary context only
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! to both TLBs
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@ -5947,7 +5967,43 @@ _C_LABEL(tlb_flush_pte):
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flush %o4
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retl
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nop
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#else
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!!
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!! Cheetahs do not support flushing the IMMU from secondary context
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!!
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rdpr %tl, %o3
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mov CTX_PRIMARY, %o2
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brnz,pt %o3, 1f
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andn %o0, 0xfff, %g2 ! drop unused va bits
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wrpr %g0, 1, %tl ! Make sure we're NUCLEUS
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1:
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ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
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sethi %hi(KERNBASE), %o4
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membar #LoadStore
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stxa %o1, [%o2] ASI_DMMU ! Insert context to demap
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membar #Sync
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or %g2, DEMAP_PAGE_PRIMARY, %g2
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! to both TLBs
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membar #Sync ! No real reason for this XXXX
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flush %o4
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srl %g2, 0, %g2 ! and make sure it's both 32- and 64-bit entries
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
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membar #Sync ! No real reason for this XXXX
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flush %o4
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stxa %g1, [%o2] ASI_DMMU ! Restore secondary asi
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membar #Sync ! No real reason for this XXXX
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brz,pt %o3, 1f
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flush %o4
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retl
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nop
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1:
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retl
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wrpr %g0, 0, %tl ! Return to kernel mode.
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#endif
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/*
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* tlb_flush_ctx(int ctx)
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*
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.text
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2:
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#endif
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#ifdef SPITFIRE
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mov CTX_SECONDARY, %o2
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sethi %hi(KERNBASE), %o4
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ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
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membar #LoadStore
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stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
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membar #Sync
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set 0x030, %g2 ! Demap context from secondary context only
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync ! No real reason for this XXXX
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
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set DEMAP_PAGE_SECONDARY, %g2
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync ! No real reason for this XXXX
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
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membar #Sync
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stxa %g1, [%o2] ASI_DMMU ! Restore secondary asi
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membar #Sync ! No real reason for this XXXX
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membar #Sync ! No real reason for this XXXX
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flush %o4
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retl
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nop
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#else
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rdpr %tl, %o3
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mov CTX_PRIMARY, %o2
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brnz %o3, 1f
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sethi %hi(KERNBASE), %o4
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wrpr %g0, 1, %tl
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1:
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ldxa [%o2] ASI_DMMU, %g1 ! Save secondary context
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membar #LoadStore
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stxa %o0, [%o2] ASI_DMMU ! Insert context to demap
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membar #Sync
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set DEMAP_PAGE_PRIMARY, %g2 ! Demap context from secondary context only
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stxa %g2, [%g2] ASI_DMMU_DEMAP ! Do the demap
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membar #Sync ! No real reason for this XXXX
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stxa %g2, [%g2] ASI_IMMU_DEMAP ! Do the demap
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membar #Sync
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stxa %g1, [%o2] ASI_DMMU ! Restore secondary asi
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membar #Sync ! No real reason for this XXXX
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brz,pt %o3, 1f
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flush %o4
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retl
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nop
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1:
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retl
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wrpr %g0, 0, %tl ! Return to kernel mode.
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#endif
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/*
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* blast_vcache()
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*
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brnz,pt %o5, 1b
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inc 16, %o4
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#ifdef SPITFIRE
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!!
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!! Linux sez that I$ flushes are not needed for cheetah.
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!!
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!! Now do the I$
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srlx %o0, 13-8, %o2
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mov -1, %o1 ! Generate mask for tag: bits [35..8]
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@ -6122,7 +6209,7 @@ _C_LABEL(dcache_flush_page):
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2:
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brnz,pt %o5, 1b
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inc 16, %o4
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#endif
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sethi %hi(KERNBASE), %o5
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flush %o5
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membar #Sync
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@ -6156,8 +6243,10 @@ _C_LABEL(cache_flush_virt):
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stxa %g0, [%o0] ASI_DCACHE_TAG
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dec 16, %o4
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xor %o5, %o0, %o3 ! Second way
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stxa %g0, [%o0] ASI_ICACHE_TAG
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stxa %g0, [%o3] ASI_ICACHE_TAG
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#ifdef SPITFIRE
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stxa %g0, [%o0] ASI_ICACHE_TAG! Don't do this on cheetah
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stxa %g0, [%o3] ASI_ICACHE_TAG! Don't do this on cheetah
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#endif
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brgz,pt %o4, 1b
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inc 16, %o0
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2:
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@ -6223,7 +6312,9 @@ _C_LABEL(cache_flush_phys):
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clr %o4
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1:
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ldxa [%o4] ASI_DCACHE_TAG, %o3
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ldda [%o4] ASI_ICACHE_TAG, %g0 ! Tag goes in %g1
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#ifdef SPITFIRE
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ldda [%o4] ASI_ICACHE_TAG, %g0 ! Tag goes in %g1 -- not on cheetah
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#endif
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sllx %o3, 40-29, %o3 ! Shift D$ tag into place
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and %o3, %o2, %o3 ! Mask out trash
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cmp %o0, %o3
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membar #LoadStore
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stxa %g0, [%o4] ASI_DCACHE_TAG ! Just right
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2:
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#ifndef SPITFIRE
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cmp %o0, %g1
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blt,pt %xcc, 3f
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cmp %o1, %g1
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nop
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stxa %g0, [%o4] ASI_ICACHE_TAG
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3:
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#endif
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membar #StoreLoad
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dec 16, %o5
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brgz,pt %o5, 1b
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@ -7171,15 +7264,27 @@ ENTRY(switchexit)
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LDPTR [%l6 + %lo(CPCB)], %l5
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clr %l4 ! lastproc = NULL;
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brz,pn %l1, 1f
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set 0x030, %l1 ! Demap secondary context
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#ifdef SPITFIRE
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set DEMAP_CTX_SECONDARY, %l1 ! Demap secondary context
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stxa %g1, [%l1] ASI_DMMU_DEMAP
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stxa %g1, [%l1] ASI_IMMU_DEMAP
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membar #Sync
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#else
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mov CTX_PRIMARY, %o0
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wrpr %g0, 1, %tl
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stxa %l1, [%o0] ASI_DMMU
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set DEMAP_CTX_PRIMARY, %l1 ! Demap secondary context
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stxa %g1, [%l1] ASI_DMMU_DEMAP
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stxa %g1, [%l1] ASI_IMMU_DEMAP
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membar #Sync
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stxa %g0, [%o0] ASI_DMMU
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membar #Sync
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wrpr %g0, 0, %tl
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#endif
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1:
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stxa %g0, [%o0] ASI_DMMU ! Clear out our context
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membar #Sync
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/* FALLTHROUGH */
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/*
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* When no processes are on the runq, switch
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* idles here waiting for something to come ready.
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call _C_LABEL(ctx_alloc) ! ctx_alloc(&vm->vm_pmap);
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mov %o2, %o0
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set 0x030, %o1 ! This context has been recycled
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#ifdef SPITFIRE
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set DEMAP_CTX_SECONDARY, %o1 ! This context has been recycled
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stxa %o0, [%l5] ASI_DMMU ! so we need to invalidate
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membar #Sync
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stxa %o1, [%o1] ASI_DMMU_DEMAP ! whatever bits of it may
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stxa %o1, [%o1] ASI_IMMU_DEMAP ! be left in the TLB
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membar #Sync
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#else
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wrpr %g0, 1, %tl
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set DEMAP_CTX_PRIMARY, %o1 ! This context has been recycled
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stxa %o0, [%l5] ASI_DMMU ! so we need to invalidate
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membar #Sync
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stxa %o1, [%o1] ASI_DMMU_DEMAP ! whatever bits of it may
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stxa %o1, [%o1] ASI_IMMU_DEMAP ! be left in the TLB
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membar #Sync
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stxa %g0, [%l5] ASI_DMMU ! so we need to invalidate
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membar #Sync
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wrpr %g0, 0, %tl
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#endif
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#ifdef SCHED_DEBUG
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mov %o0, %g1
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save %sp, -CC64FSZ, %sp
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@ -12197,7 +12315,8 @@ ENTRY(longjmp)
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* Switch to context in %o0
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*/
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ENTRY(switchtoctx)
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set 0x030, %o3
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#ifdef SPITFIRE
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set DEMAP_CTX_SECONDARY, %o3
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stxa %o3, [%o3] ASI_DMMU_DEMAP
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membar #Sync
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mov CTX_SECONDARY, %o4
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@ -12209,6 +12328,11 @@ ENTRY(longjmp)
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flush %o2
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retl
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nop
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#else
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/* UNIMPLEMENTED */
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retl
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nop
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#endif
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#ifndef _LP64
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/*
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