Due to reliability problems on some models, back out the more radical of
the pc532/dev/ncr.c-inspired changes; in particular, wait for previous transfer to complete before starting another, as we used to do. Retain splbio() protection and simplified sbc_pdma_in().
This commit is contained in:
scottr
parent
9f009387fc
commit
f2bdde942a
@ -1,4 +1,4 @@
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/* $NetBSD: sbc.c,v 1.27 1997/06/29 06:10:37 scottr Exp $ */
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/* $NetBSD: sbc.c,v 1.28 1997/06/30 05:24:35 scottr Exp $ */
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/*
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* Copyright (C) 1996 Scott Reynolds. All rights reserved.
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@ -97,8 +97,9 @@ struct cfdriver sbc_cd = {
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NULL, "sbc", DV_DULL
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};
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static int sbc_wait_busy __P((struct ncr5380_softc *));
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static int sbc_ready __P((struct ncr5380_softc *));
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static void sbc_wait_not_req __P((struct ncr5380_softc *));
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static int sbc_wait_dreq __P((struct ncr5380_softc *));
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static void
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sbc_minphys(struct buf *bp)
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@ -113,6 +114,72 @@ sbc_minphys(struct buf *bp)
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* General support for Mac-specific SCSI logic.
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***/
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/* These are used in the following inline functions. */
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int sbc_wait_busy_timo = 1000 * 5000; /* X2 = 10 S. */
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int sbc_ready_timo = 1000 * 5000; /* X2 = 10 S. */
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int sbc_wait_dreq_timo = 1000 * 5000; /* X2 = 10 S. */
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/* Return zero on success. */
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static __inline__ int
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sbc_wait_busy(sc)
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struct ncr5380_softc *sc;
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{
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int timo = sbc_wait_busy_timo;
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for (;;) {
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if (SCI_BUSY(sc)) {
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timo = 0; /* return 0 */
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break;
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}
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if (--timo < 0)
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break; /* return -1 */
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delay(2);
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}
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return (timo);
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}
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static __inline__ int
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sbc_ready(sc)
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struct ncr5380_softc *sc;
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{
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int timo = sbc_ready_timo;
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for (;;) {
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if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
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== (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
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timo = 0;
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break;
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}
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if (((*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0)
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|| (SCI_BUSY(sc) == 0)) {
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timo = -1;
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break;
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}
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if (--timo < 0)
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break; /* return -1 */
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delay(2);
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}
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return (timo);
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}
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static __inline__ int
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sbc_wait_dreq(sc)
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struct ncr5380_softc *sc;
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{
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int timo = sbc_wait_dreq_timo;
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for (;;) {
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if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
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== (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
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timo = 0;
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break;
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}
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if (--timo < 0)
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break; /* return -1 */
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delay(2);
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}
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return (timo);
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}
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void
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sbc_irq_intr(p)
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void *p;
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@ -147,8 +214,8 @@ void
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decode_5380_intr(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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u_char csr = *ncr_sc->sci_csr;
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u_char bus_csr = *ncr_sc->sci_bus_csr;
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u_int8_t csr = *ncr_sc->sci_csr;
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u_int8_t bus_csr = *ncr_sc->sci_bus_csr;
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if (((csr & ~(SCI_CSR_PHASE_MATCH | SCI_CSR_ATN)) == SCI_CSR_INT) &&
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((bus_csr & ~(SCI_BUS_MSG | SCI_BUS_CD | SCI_BUS_IO | SCI_BUS_DBP)) == SCI_BUS_SEL)) {
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@ -182,53 +249,11 @@ decode_5380_intr(ncr_sc)
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* The following code implements polled PDMA.
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***/
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#define TIMEOUT 5000000 /* x 2 usec = 10 sec */
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static __inline__ int
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sbc_ready(sc)
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struct ncr5380_softc *sc;
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{
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int i = TIMEOUT;
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for (;;) {
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if ((*sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
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(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
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return 1;
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if (((*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0) ||
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(SCI_BUSY(sc) == 0))
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return 0;
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if (--i < 0)
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break;
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delay(2);
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}
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printf("%s: ready timeout\n", sc->sc_dev.dv_xname);
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return 0;
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}
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static __inline__ void
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sbc_wait_not_req(sc)
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struct ncr5380_softc *sc;
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{
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int i = TIMEOUT;
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for (;;) {
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if ((*sc->sci_bus_csr & SCI_BUS_REQ) == 0 ||
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(*sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0 ||
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SCI_BUSY(sc) == 0) {
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return;
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}
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if (--i < 0)
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break;
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delay(2);
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}
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printf("%s: pdma not_req timeout\n", sc->sc_dev.dv_xname);
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}
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int
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sbc_pdma_in(ncr_sc, phase, datalen, data)
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struct ncr5380_softc *ncr_sc;
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int phase, datalen;
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int phase;
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int datalen;
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u_char *data;
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{
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struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
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@ -236,25 +261,31 @@ sbc_pdma_in(ncr_sc, phase, datalen, data)
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volatile u_int8_t *byte_data = (u_int8_t *)sc->sc_nodrq_addr;
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int resid, s;
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if (datalen < ncr_sc->sc_min_dma_len ||
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(sc->sc_options & SBC_PDMA) == 0)
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return ncr5380_pio_in(ncr_sc, phase, datalen, data);
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s = splbio();
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if (sbc_wait_busy(ncr_sc)) {
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splx(s);
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return 0;
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}
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*ncr_sc->sci_mode |= SCI_MODE_DMA;
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*ncr_sc->sci_irecv = 0;
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#define R4 *((u_int32_t *)data)++ = *long_data++
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#define R1 *data++ = *byte_data++
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#define R4 *((u_int32_t *)data)++ = *long_data
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#define R1 *((u_int8_t *)data)++ = *byte_data
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for (resid = datalen; resid >= 128; resid -= 128) {
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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R4; R4; R4; R4; R4; R4; R4; R4;
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R4; R4; R4; R4; R4; R4; R4; R4;
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R4; R4; R4; R4; R4; R4; R4; R4;
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R4; R4; R4; R4; R4; R4; R4; R4;
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long_data = (u_int32_t *)sc->sc_drq_addr;
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byte_data = (u_int8_t *)sc->sc_nodrq_addr;
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R4; R4; R4; R4; R4; R4; R4; R4; /* 128 */
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}
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while (resid) {
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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R1;
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resid--;
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@ -262,92 +293,86 @@ sbc_pdma_in(ncr_sc, phase, datalen, data)
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#undef R4
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#undef R1
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sbc_wait_not_req(ncr_sc);
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interrupt:
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SCI_CLR_INTR(ncr_sc);
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*ncr_sc->sci_mode &= ~SCI_MODE_DMA;
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*ncr_sc->sci_icmd = 0;
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splx(s);
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return datalen - resid;
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return (datalen - resid);
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}
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int
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sbc_pdma_out(ncr_sc, phase, datalen, data)
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struct ncr5380_softc *ncr_sc;
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int phase, datalen;
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int phase;
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int datalen;
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u_char *data;
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{
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struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
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volatile u_int32_t *long_data = (u_int32_t *)sc->sc_drq_addr;
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volatile u_int8_t *byte_data = (u_int8_t *)sc->sc_nodrq_addr;
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int i, s, resid;
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u_char icmd;
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int resid, s;
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u_int8_t icmd;
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if (datalen < ncr_sc->sc_min_dma_len)
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if (datalen < ncr_sc->sc_min_dma_len ||
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(sc->sc_options & SBC_PDMA) == 0)
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return ncr5380_pio_out(ncr_sc, phase, datalen, data);
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s = splbio();
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if (sbc_wait_busy(ncr_sc)) {
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splx(s);
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return 0;
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}
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icmd = *(ncr_sc->sci_icmd) & SCI_ICMD_RMASK;
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*ncr_sc->sci_icmd = icmd | SCI_ICMD_DATA;
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*ncr_sc->sci_mode |= SCI_MODE_DMA;
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*ncr_sc->sci_dma_send = 0;
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resid = datalen;
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if (sbc_ready(ncr_sc) == 0)
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goto interrupt;
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#define W1 *byte_data++ = *data++
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#define W4 *long_data++ = *((u_int32_t *)data)++
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while (resid >= 64) {
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if (sbc_ready(ncr_sc) == 0)
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#define W1 *byte_data = *((u_int8_t *)data)++
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#define W4 *long_data = *((u_int32_t *)data)++
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for (resid = datalen; resid >= 64; resid -= 64) {
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W1;
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resid--;
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W1;
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resid--;
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W1;
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resid--;
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W1;
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resid--;
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if (sbc_ready(ncr_sc) == 0)
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W4; W4; W4; W4;
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W4; W4; W4; W4;
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W4; W4; W4; W4;
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W4; W4; W4;
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resid -= 60;
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long_data = (u_int32_t *)sc->sc_drq_addr;
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byte_data = (u_int8_t *)sc->sc_nodrq_addr;
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}
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for (; resid; resid--) {
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if (sbc_ready(ncr_sc) == 0)
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while (resid) {
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if (sbc_ready(ncr_sc))
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goto interrupt;
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W1;
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resid--;
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}
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#undef W1
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#undef W4
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if (sbc_wait_dreq(ncr_sc))
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printf("%s: timeout waiting for DREQ.\n",
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ncr_sc->sc_dev.dv_xname);
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for (i = TIMEOUT; i > 0; i--) {
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if ((*ncr_sc->sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH))
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!= SCI_CSR_DREQ)
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break;
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}
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if (i == 0)
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printf("%s: timeout waiting for final SCI_DSR_DREQ.\n",
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ncr_sc->sc_dev.dv_xname);
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#ifdef __notyet__ /* not sure why this is ever necessary... */
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else
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*byte_data = 0;
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#endif
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*byte_data = 0;
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goto done;
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sbc_wait_not_req(ncr_sc);
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interrupt:
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if ((*ncr_sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0) {
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*ncr_sc->sci_icmd = icmd & ~SCI_ICMD_DATA;
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--resid;
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}
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done:
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SCI_CLR_INTR(ncr_sc);
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*ncr_sc->sci_mode &= ~SCI_MODE_DMA;
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*ncr_sc->sci_icmd = icmd;
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@ -556,7 +581,7 @@ sbc_drq_intr(p)
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* OK. No bus error occurred above. Clear the nofault flag
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* so we no longer short-circuit bus errors.
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*/
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nofault = (int *) 0;
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nofault = (int *)0;
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#ifdef SBC_DEBUG
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if (sbc_debug & (SBC_DB_REG | SBC_DB_INTR))
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