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added support for microtime routines by Steve McCanne (mccanne@ee.lbl.gov)

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This commit is contained in:
cgd 1993-03-23 08:12:09 +00:00
parent 883c20ae5a
commit f23291fb78
8 changed files with 377 additions and 2 deletions
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1
sys/arch/i386/conf/Makefile.i386
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@ -41,6 +41,7 @@ CFLAGS= -O ${COPTS}
NORMAL_C= ${CC} -c ${CFLAGS} ${PROF} $<
NORMAL_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $<
NORMAL_S= ${CPP} -I. -DLOCORE ${COPTS} $< | ${AS} ${ASFLAGS} -o $*.o
DRIVER_C= ${CC} -c ${CFLAGS} ${PROF} $<
DRIVER_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $<
SYSTEM_OBJS=locore.o ${OBJS} param.o ioconf.o conf.o

1
sys/arch/i386/conf/files.i386
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@ -43,5 +43,6 @@ scsi/st.c optional st
scsi/sd.c optional sd
scsi/cd.c optional cd
scsi/ch.c optional ch
i386/i386/microtime.s standard
i386/isa/lpt.c optional lpt
i386/isa/lpa.c optional lpa

4
sys/arch/i386/i386/machdep.c
View File

@ -44,7 +44,7 @@
* 15 Aug 92 William Jolitz Large memory bug
* 15 Aug 92 Terry Lambert Fixed CMOS RAM size bug
*/
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/i386/i386/machdep.c,v 1.2 1993/03/21 18:04:42 cgd Exp $";
static char rcsid[] = "$Header: /cvsroot/src/sys/arch/i386/i386/machdep.c,v 1.3 1993/03/23 08:12:15 cgd Exp $";
#include "param.h"
@ -561,6 +561,7 @@ dumpsys()
DELAY(10000);
}
#ifdef HZ
microtime(tvp)
register struct timeval *tvp;
{
@ -574,6 +575,7 @@ microtime(tvp)
}
splx(s);
}
#endif
physstrat(bp, strat, prio)
struct buf *bp;

135
sys/arch/i386/i386/microtime.s Normal file
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@ -0,0 +1,135 @@
/*-
* Copyright (c) 1993 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Header: /cvsroot/src/sys/arch/i386/i386/Attic/microtime.s,v 1.1 1993/03/23 08:12:17 cgd Exp $
*/
#include "asm.h"
#include "../isa/isa.h"
#include "../isa/timerreg.h"
/*
* Use a higher resolution version of microtime if HZ is not
* overridden (i.e. it is 100Hz).
*/
#ifndef HZ
ENTRY(microtime)
pushl %edi
pushl %esi
pushl %ebx
movl $_time,%ebx
cli # disable interrupts
movl (%ebx),%edi # sec = time.tv_sec
movl 4(%ebx),%esi # usec = time.tv_usec
movl $(TIMER_SEL0|TIMER_LATCH),%eax
outb %al,$TIMER_MODE # latch timer 0's counter
#
# Read counter value into ebx, LSB first
#
inb $TIMER_CNTR0,%al
movzbl %al,%ebx
inb $TIMER_CNTR0,%al
movzbl %al,%eax
sall $8,%eax
orl %eax,%ebx
#
# Now check for counter overflow. This is tricky because the
# timer chip doesn't let us atomically read the current counter
# value and the output state (i.e., overflow state). We have
# to read the ICU interrupt request register (IRR) to see if the
# overflow has occured. Because we lack atomicity, we use
# the (very accurate) heuristic that we only check for
# overflow if the value read is close to the interrupt period.
# E.g., if we just checked the IRR, we might read a non-overflowing
# value close to 0, experience overflow, then read this overflow
# from the IRR, and mistakenly add a correction to the "close
# to zero" value.
#
# We compare the counter value to heuristic constant 11890.
# If the counter value is less than this, we assume the counter
# didn't overflow between disabling interrupts above and latching
# the counter value. For example, we assume that the above 10 or so
# instructions take less than 11932 - 11890 = 42 microseconds to
# execute.
#
# Otherwise, the counter might have overflowed. We check for this
# condition by reading the interrupt request register out of the ICU.
# If it overflowed, we add in one clock period.
#
# The heuristic is "very accurate" because it works 100% if
# we're called from an ipl less than the clock. Otherwise,
# it might not work. Currently, only gettimeofday and bpf
# call microtime so it's not a problem.
#
cmpl $11890,%ebx
jle 2f
movl $0x0a,%eax # tell ICU we want IRR
outb %al,$IO_ICU1
inb $IO_ICU1,%al # read IRR in ICU
testb $1,%al # is a timer interrupt pending?
je 1f
addl $-11932,%ebx # yes, subtract one clock period
1:
movl $0x0b,%eax # tell ICU we want ISR
outb %al,$IO_ICU1 # (rest of kernel expects this)
2:
sti # enable interrupts
movl $11932,%eax # subtract counter value from 11932 since
subl %ebx,%eax # it is a count-down value
imull $1000,%eax,%eax
movl $0,%edx # zero extend eax for div
movl $1193,%ecx
idivl %ecx # convert to usecs: mult by 1000/1193
addl %eax,%esi # add counter usecs to time.tv_usec
cmpl $1000000,%esi # carry in timeval?
jl 3f
subl $1000000,%esi # adjust usec
incl %edi # bump sec
3:
movl 16(%esp),%ecx # load timeval pointer arg
movl %edi,(%ecx) # tvp->tv_sec = sec
movl %esi,4(%ecx) # tvp->tv_usec = usec
popl %ebx # restore regs
popl %esi
popl %edi
ret
#endif

3
sys/arch/i386/isa/clock.c
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@ -60,6 +60,7 @@
#include "i386/isa/icu.h"
#include "i386/isa/isa.h"
#include "i386/isa/rtc.h"
#include "i386/isa/timerreg.h"
#define DAYST 119
#define DAYEN 303
@ -71,7 +72,7 @@ startrtclock() {
findcpuspeed(); /* use the clock (while it's free)
to find the cpu speed */
/* initialize 8253 clock */
outb (IO_TIMER1+3, 0x36);
outb(TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
outb (IO_TIMER1, XTALSPEED/hz);
outb (IO_TIMER1, (XTALSPEED/hz)/256);

89
sys/arch/i386/isa/timerreg.h Normal file
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@ -0,0 +1,89 @@
/*-
* Copyright (c) 1993 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Header: /cvsroot/src/sys/arch/i386/isa/Attic/timerreg.h,v 1.1 1993/03/23 08:12:25 cgd Exp $
*
* Register definitions for the Intel 8253 Programmable Interval Timer.
*
* This chip has three independent 16-bit down counters that can be
* read on the fly. There are three mode registers and three countdown
* registers. The countdown registers are addressed directly, via the
* first three I/O ports. The three mode registers are accessed via
* the fourth I/O port, with two bits in the mode byte indicating the
* register. (Why are hardware interfaces always so braindead?).
*
* To write a value into the countdown register, the mode register
* is first programmed with a command indicating the which byte of
* the two byte register is to be modified. The three possibilities
* are load msb (TMR_MR_MSB), load lsb (TMR_MR_LSB), or load lsb then
* msb (TMR_MR_BOTH).
*
* To read the current value ("on the fly") from the countdown register,
* you write a "latch" command into the mode register, then read the stable
* value from the corresponding I/O port. For example, you write
* TMR_MR_LATCH into the corresponding mode register. Presumably,
* after doing this, a write operation to the I/O port would result
* in undefined behavior (but hopefully not fry the chip).
* Reading in this manner has no side effects.
*
* The outputs of the three timers are connected as follows:
*
* timer 0 -> irq 0
* timer 1 -> dma chan 0 (for dram refresh)
* timer 2 -> speaker (via keyboard controller)
*
* Timer 0 is used to call hardclock.
* Timer 2 is used to generate console beeps.
*/
/*
* Macros for specifying values to be written into a mode register.
*/
#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */
#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */
#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */
#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */
#define TIMER_SEL0 0x00 /* select counter 0 */
#define TIMER_SEL1 0x40 /* select counter 1 */
#define TIMER_SEL2 0x80 /* select counter 2 */
#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */
#define TIMER_ONESHOT 0x02 /* mode 1, one shot */
#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */
#define TIMER_SQWAVE 0x06 /* mode 3, square wave */
#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */
#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */
#define TIMER_LATCH 0x00 /* latch counter for reading */
#define TIMER_LSB 0x10 /* r/w counter LSB */
#define TIMER_MSB 0x20 /* r/w counter MSB */
#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */
#define TIMER_BCD 0x01 /* count in BCD */

89
sys/dev/ic/i8253reg.h Normal file
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@ -0,0 +1,89 @@
/*-
* Copyright (c) 1993 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Header: /cvsroot/src/sys/dev/ic/i8253reg.h,v 1.1 1993/03/23 08:12:25 cgd Exp $
*
* Register definitions for the Intel 8253 Programmable Interval Timer.
*
* This chip has three independent 16-bit down counters that can be
* read on the fly. There are three mode registers and three countdown
* registers. The countdown registers are addressed directly, via the
* first three I/O ports. The three mode registers are accessed via
* the fourth I/O port, with two bits in the mode byte indicating the
* register. (Why are hardware interfaces always so braindead?).
*
* To write a value into the countdown register, the mode register
* is first programmed with a command indicating the which byte of
* the two byte register is to be modified. The three possibilities
* are load msb (TMR_MR_MSB), load lsb (TMR_MR_LSB), or load lsb then
* msb (TMR_MR_BOTH).
*
* To read the current value ("on the fly") from the countdown register,
* you write a "latch" command into the mode register, then read the stable
* value from the corresponding I/O port. For example, you write
* TMR_MR_LATCH into the corresponding mode register. Presumably,
* after doing this, a write operation to the I/O port would result
* in undefined behavior (but hopefully not fry the chip).
* Reading in this manner has no side effects.
*
* The outputs of the three timers are connected as follows:
*
* timer 0 -> irq 0
* timer 1 -> dma chan 0 (for dram refresh)
* timer 2 -> speaker (via keyboard controller)
*
* Timer 0 is used to call hardclock.
* Timer 2 is used to generate console beeps.
*/
/*
* Macros for specifying values to be written into a mode register.
*/
#define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */
#define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */
#define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */
#define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */
#define TIMER_SEL0 0x00 /* select counter 0 */
#define TIMER_SEL1 0x40 /* select counter 1 */
#define TIMER_SEL2 0x80 /* select counter 2 */
#define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */
#define TIMER_ONESHOT 0x02 /* mode 1, one shot */
#define TIMER_RATEGEN 0x04 /* mode 2, rate generator */
#define TIMER_SQWAVE 0x06 /* mode 3, square wave */
#define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */
#define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */
#define TIMER_LATCH 0x00 /* latch counter for reading */
#define TIMER_LSB 0x10 /* r/w counter LSB */
#define TIMER_MSB 0x20 /* r/w counter MSB */
#define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */
#define TIMER_BCD 0x01 /* count in BCD */

57
sys/sys/asm.h Normal file
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@ -0,0 +1,57 @@
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)asm.h 5.5 (Berkeley) 5/7/91
*/
#ifdef PROF
# ifdef __STDC__
# define ENTRY(x) .globl _ ## x; \
.data; 1:; .long 0; .text; .align 2; _ ## x: \
movl $1b,%eax; call mcount
# else
# define ENTRY(x) .globl _/**/x; \
.data; 1:; .long 0; .text; .align 2; _/**/x: \
movl $1b,%eax; call mcount
# endif /* __STDC__ */
#else
# ifdef __STDC__
# define ENTRY(x) .globl _ ## x; .text; .align 2; _ ## x:
# else
# define ENTRY(x) .globl _/**/x; .text; .align 2; _/**/x:
# endif /* __STDC__ */
#endif PROF
#define ASMSTR .asciz