Changes to support NetBSD, written by me, tested by Matthias Drochner:
- Add NetBSD autoconfiguration support. - Rearrange code slightly to minimize the number of #ifdefs. - Don't use a structure to access CSRs. Use macros that DTRT for the NetBSD and FreeBSD cases. - Deal with alignment contraint on Alpha - add 2-byte padding at the beginning of the RFA, so that the data will be 4-byte aligned, after the 14-byte Ethernet header. Thanks to Matthias Drochner for the testing, and David Greenman for the feedback on the changes.
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thorpej
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@ -1,3 +1,5 @@
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/* $NetBSD: if_fxpreg.h,v 1.2 1997/06/05 02:01:57 thorpej Exp $ */
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/*
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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@ -33,19 +35,26 @@
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#define FXP_PCI_MMBA 0x10
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#define FXP_PCI_IOBA 0x14
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struct fxp_csr {
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volatile u_int8_t :2,
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scb_rus:4,
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scb_cus:2;
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volatile u_int8_t scb_statack;
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volatile u_int8_t scb_command;
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volatile u_int8_t scb_intrcntl;
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volatile u_int32_t scb_general;
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volatile u_int32_t port;
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volatile u_int16_t flash_control;
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volatile u_int16_t eeprom_control;
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volatile u_int32_t mdi_control;
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};
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/*
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* Control/status registers.
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*/
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#define FXP_CSR_SCB_RUSCUS 0 /* scb_rus/scb_cus (1 byte) */
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#define FXP_CSR_SCB_STATACK 1 /* scb_statack (1 byte) */
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#define FXP_CSR_SCB_COMMAND 2 /* scb_command (1 byte) */
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#define FXP_CSR_SCB_INTRCNTL 3 /* scb_intrcntl (1 byte) */
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#define FXP_CSR_SCB_GENERAL 4 /* scb_general (4 bytes) */
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#define FXP_CSR_PORT 8 /* port (4 bytes) */
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#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */
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#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */
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#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */
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/*
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* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
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*
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* volatile u_int8_t :2,
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* scb_rus:4,
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* scb_cus:2;
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*/
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#define FXP_PORT_SOFTWARE_RESET 0
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#define FXP_PORT_SELFTEST 1
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108
sys/dev/pci/if_fxpvar.h
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108
sys/dev/pci/if_fxpvar.h
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@ -0,0 +1,108 @@
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/* $NetBSD: if_fxpvar.h,v 1.1 1997/06/05 02:01:58 thorpej Exp $ */
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/*
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Modifications to support NetBSD:
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* Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Id: if_fxp.c,v 1.34 1997/04/23 01:44:30 davidg Exp
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*/
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/*
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* Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast
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* Ethernet driver
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*/
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struct fxp_softc {
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#if defined(__NetBSD__)
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struct device sc_dev; /* generic device structures */
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void *sc_ih; /* interrupt handler cookie */
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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struct ethercom sc_ethercom; /* ethernet common part */
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#else
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struct arpcom arpcom; /* per-interface network data */
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struct caddr_t csr; /* control/status registers */
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#endif /* __NetBSD__ */
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struct fxp_cb_tx *cbl_base; /* base of TxCB list */
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struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
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struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
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struct mbuf *rfa_headm; /* first mbuf in receive frame area */
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struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
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struct fxp_stats *fxp_stats; /* Pointer to interface stats */
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int tx_queued; /* # of active TxCB's */
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int promisc_mode; /* promiscuous mode enabled */
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int phy_primary_addr; /* address of primary PHY */
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int phy_primary_device; /* device type of primary PHY */
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int phy_10Mbps_only; /* PHY is 10Mbps-only device */
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};
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/* Macros to ease CSR access. */
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#if defined(__NetBSD__)
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#else
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#define CSR_READ_1(sc, reg) \
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(*((u_int8_t *)((sc)->csr + (reg))))
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#define CSR_READ_2(sc, reg) \
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(*((u_int16_t *)((sc)->csr + (reg))))
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#define CSR_READ_4(sc, reg) \
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(*((u_int32_t *)((sc)->csr + (reg))))
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#define CSR_WRITE_1(sc, reg, val) \
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(*((u_int8_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_2(sc, reg, val) \
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(*((u_int16_t *)((sc)->csr + (reg)))) = (val)
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#define CSR_WRITE_4(sc, reg, val) \
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(*((u_int32_t *)((sc)->csr + (reg)))) = (val)
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#endif /* __NetBSD__ */
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/* Deal with slight differences in software interfaces. */
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#if defined(__NetBSD__)
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#define sc_if sc_ethercom.ec_if
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#define FXP_FORMAT "%s"
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#define FXP_ARGS(sc) (sc)->sc_dev.dv_xname
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#define FXP_INTR_TYPE int
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#define FXP_IOCTLCMD_TYPE u_long
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#define FXP_BPFTAP_ARG(ifp) (ifp)->if_bpf
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#else /* __FreeBSD__ */
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#define sc_if arpcom.ac_if
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#define FXP_FORMAT "fxp%d"
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#define FXP_ARGS(sc) (sc)->arpcom.ac_if.if_unit
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#define FXP_INTR_TYPE void
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#define FXP_IOCTLCMD_TYPE int
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#define FXP_BPFTAP_ARG(ifp) ifp
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#endif /* __NetBSD__ */
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