Use ffs like routine in the footbridge irq handling. It is now very similair to the iomd irq handler.
Note that I've kept the existing quirk of still passing the irq to the next handler even if the irq handler returned 1. I need to investigate why we do this.
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chris
parent
cbf8e0eb95
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f220cad8dd
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@ -1,4 +1,4 @@
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/* $NetBSD: footbridge_irq.S,v 1.4 1999/10/26 06:53:42 cgd Exp $ */
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/* $NetBSD: footbridge_irq.S,v 1.5 2001/05/23 21:23:54 chris Exp $ */
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/*
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* Copyright (c) 1998 Mark Brinicombe.
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@ -45,6 +45,24 @@
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.text
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.align 0
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/*
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* ffs table used for servicing irq's quickly must be here otherwise adr can't
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* reach it
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* The algorithm for ffs was devised by D. Seal and posted to
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* comp.sys.arm on 16 Feb 1994.
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*/
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.type Lirq_ffs_table, _ASM_TYPE_OBJECT;
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Lirq_ffs_table:
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/* same as ffs table but all nums are -1 from that */
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/* 0 1 2 3 4 5 6 7 */
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.byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */
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.byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */
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.byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */
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.byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */
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.byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */
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.byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */
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.byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */
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.byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */
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/*
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*
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@ -77,13 +95,14 @@ Lspl_masks:
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.word _C_LABEL(spl_masks)
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/*
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* Regsister usage
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* Register usage
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*
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* r5 - Address of ffs table
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* r6 - Address of current handler
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* r7 - Pointer to handler pointer list
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* r8 - Current IRQ requests.
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* r9 - Used to count through possible IRQ bits.
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* r10 - Base address of IOMD
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* r11 - IRQ requests still to service.
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*/
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ASENTRY_NP(irq_entry)
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@ -164,76 +183,114 @@ Lfind_highest_ipl:
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msr cpsr_all, r0
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ldr r7, [pc, #irqhandlers - . - 8]
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mov r9, #0x00000001
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/* take a copy of the irq mask so we can alter it */
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mov r11, r8
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/* ffs routine to find first irq to service */
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/* standard trick to isolate bottom bit in a0 or 0 if a0 = 0 on entry */
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rsb r4, r11, #0
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ands r10, r11, r4
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/*
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* now r10 has at most 1 set bit, call this X
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* if X = 0, branch to exit code
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*/
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beq exitirq
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adr r5, Lirq_ffs_table
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irqloop:
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/* This would benefit from a special ffs type routine */
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tst r8, r9 /* Is a bit set ? */
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beq nextirq /* No ? try next bit */
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/*
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* at this point:
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* r5 = address of ffs table
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* r7 = address of irq handlers table
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* r8 = irq request
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* r10 = bit of irq to be serviced
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* r11 = bitmask of IRQ's to service
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*/
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ldr r6, [r7] /* Get address of first handler structure */
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/* find the set bit */
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orr r9, r10, r10, lsl #4 /* X * 0x11 */
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orr r9, r9, r9, lsl #6 /* X * 0x451 */
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rsb r9, r9, r9, lsl #16 /* X * 0x0450fbaf */
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/* fetch the bit number */
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ldrb r9, [r5, r9, lsr #26 ]
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/*
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* r9 = irq to service
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*/
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/* apologies for the dogs dinner of code here, but it's in an attempt
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* to minimise stalling on SA's, hence lots of things happen here:
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* - getting address of handler, if it doesn't exist we call
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* stray_irqhandler this is assumed to be rare so we don't
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* care about performance for it
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* - statinfo is updated
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* - unsetting of the irq bit in r11
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* - irq stats (if enabled) also get put in the mix
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*/
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ldr r4, Lcnt /* Stat info A */
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ldr r6, [r7, r9, lsl #2] /* Get address of first handler structure */
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ldr r1, [r4, #(V_INTR)] /* Stat info B */
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teq r6, #0x00000000 /* Do we have a handler */
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moveq r0, r8 /* IRQ requests as arg 0 */
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beq _C_LABEL(stray_irqhandler) /* call special handler */
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ldr r0, Lcnt
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ldr r1, [r0, #(V_INTR)]
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#ifdef IRQSTATS
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ldr r2, Lintrcnt
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ldr r3, [r6, #(IH_NUM)]
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#endif
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/* stat info C */
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add r1, r1, #0x00000001
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str r1, [r0, #(V_INTR)]
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irqchainloop:
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add lr, pc, #nextinchain - . - 8 /* return address */
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/*
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* XXX: Should stats be accumlated for every interrupt routine called
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* or for every physical interrupt that is serviced.
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*/
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str r1, [r4, #(V_INTR)]
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#ifdef IRQSTATS
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ldr r0, Lintrcnt
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ldr r1, [r6, #(IH_NUM)]
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ldr r3, [r2, r3, lsl #2]!
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#endif
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bic r11, r11, r10 /* clear the IRQ bit */
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add r0, r0, r1, lsl #2
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ldr r1, [r0]
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add r1, r1, #0x00000001
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str r1, [r0]
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#ifdef IRQSTATS
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add r3, r3, #0x00000001
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str r3, [r2]
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#endif /* IRQSTATS */
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irqchainloop:
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ldr r0, [r6, #(IH_ARG)] /* Get argument pointer */
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add lr, pc, #nextinchain - . - 8 /* return address */
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teq r0, #0x00000000 /* If arg is zero pass stack frame */
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addeq r0, sp, #8 /* ... stack frame */
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addeq r0, sp, #8 /* ... stack frame [XXX needs care] */
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ldr pc, [r6, #(IH_FUNC)] /* Call handler */
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nextinchain:
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/* teq r0, #0x00000001*/ /* Was the irq serviced ? */
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/* beq irqdone*/
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ldr r6, [r6, #(IH_NEXT)]
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ldr r6, [r6, #(IH_NEXT)] /* fetch next handler */
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#if 0
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teq r0, #0x00000001 /* Was the irq serviced ? */
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#endif
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/* if it was it'll just fall through this: */
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teq r6, #0x00000000
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bne irqchainloop
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/*irqdone:*/
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nextirq:
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add r7, r7, #0x00000004 /* update pointer to handlers */
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mov r9, r9, lsl #1 /* move on to next bit */
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teq r9, #0 /* done the last bit ? */
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bne irqloop /* no - loop back. */
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/* Check for next irq */
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rsb r4, r11, #0
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ands r10, r11, r4
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/* check if there are anymore irq's to service */
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bne irqloop
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ldmfd sp!, {r2}
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exitirq:
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ldmfd sp!, {r2, r3}
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ldr r1, Lcurrent_spl_level
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str r2, [r1]
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/* Restore previous disabled mask */
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ldmfd sp!, {r2}
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ldr r1, Lintr_disabled_mask
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str r2, [r1]
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ldr r9, Lintr_disabled_mask
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str r2, [r1] /* store current spl level */
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ldr r1, Lintr_claimed_mask /* get claimed mask */
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str r3, [r9] /* store disabled mask */
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ldr r0, [r1]
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bic r0, r0, r2 /* mask out disabled */
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ldr r1, Lintr_current_mask /* get claimed mask */
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str r0, [r1] /* new current mask */
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ldr r9, Lintr_current_mask /* get claimed mask */
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bic r0, r0, r3 /* mask out disabled */
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str r0, [r9] /* new current mask */
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bl _C_LABEL(irq_setmasks)
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bl _C_LABEL(dosoftints) /* Handle the soft interrupts */
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@ -330,8 +387,8 @@ ENTRY(irq_setmasks)
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/* Calculate DC21285 interrupt mask */
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ldr r1, Lintr_current_mask /* All the enabled interrupts */
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ldr r1, [r1]
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ldr r2, Lspl_mask /* Block due to current spl level */
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ldr r1, [r1]
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ldr r2, [r2]
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and r1, r1, r2
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