Bring to rtc clock code from Mach. Provides resettodr().
This commit is contained in:
parent
4e1ade1731
commit
f21b797b62
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@ -34,8 +34,54 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.11 1993/07/06 06:06:28 deraadt Exp $
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* clock.c,v 1.11 1993/07/06 06:06:28 deraadt Exp
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*/
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/*
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* Mach Operating System
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* Copyright (c) 1991,1990,1989 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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||||
copies and that both the copyright notice and this permission notice
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||||
appear in supporting documentation, and that the name of Intel
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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||||
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Primitive clock interrupt routines.
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@ -47,19 +93,15 @@
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#include "machine/segments.h"
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#include "i386/isa/icu.h"
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#include "i386/isa/isa.h"
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#include "i386/isa/clock.h"
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#include "i386/isa/rtc.h"
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#include "i386/isa/timerreg.h"
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void spinwait __P((int));
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/* XXX all timezone stuff should be moved out of the kernel */
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#if 1
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#define DAYST 119
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#define DAYEN 303
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#endif
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void
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startrtclock() {
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startrtclock(void)
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{
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int s;
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findcpuspeed(); /* use the clock (while it's free)
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@ -71,13 +113,8 @@ startrtclock() {
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outb (IO_TIMER1, TIMER_DIV(hz)%256);
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outb (IO_TIMER1, TIMER_DIV(hz)/256);
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/* initialize brain-dead battery powered clock */
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outb (IO_RTC, RTC_STATUSA);
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outb (IO_RTC+1, 0x26);
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outb (IO_RTC, RTC_STATUSB);
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outb (IO_RTC+1, 2);
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outb (IO_RTC, RTC_DIAG);
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/* Check diagnostic status */
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outb (IO_RTC, RTC_DIAG);
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if (s = inb (IO_RTC+1))
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printf("RTC BIOS diagnostic error %b\n", s, RTCDG_BITS);
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outb (IO_RTC, RTC_DIAG);
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@ -87,7 +124,7 @@ startrtclock() {
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unsigned int delaycount; /* calibrated loop variable (1 millisecond) */
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#define FIRST_GUESS 0x2000
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findcpuspeed()
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findcpuspeed(void)
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{
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unsigned char low;
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unsigned int remainder;
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@ -108,139 +145,14 @@ findcpuspeed()
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delaycount = (FIRST_GUESS * TIMER_DIV(1000)) / (0xffff-remainder);
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}
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/* convert 2 digit BCD number */
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bcd(i)
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int i;
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{
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return ((i/16)*10 + (i%16));
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}
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/* convert years to seconds (from 1970) */
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unsigned long
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ytos(y)
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int y;
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{
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int i;
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unsigned long ret;
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ret = 0;
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for(i = 1970; i < y; i++) {
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if (i % 4) ret += 365*24*60*60;
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else ret += 366*24*60*60;
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}
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return ret;
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}
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/* convert months to seconds */
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unsigned long
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mtos(m,leap)
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int m,leap;
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{
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int i;
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unsigned long ret;
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ret = 0;
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for(i=1;i<m;i++) {
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switch(i){
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case 1: case 3: case 5: case 7: case 8: case 10: case 12:
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ret += 31*24*60*60; break;
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case 4: case 6: case 9: case 11:
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ret += 30*24*60*60; break;
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case 2:
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if (leap) ret += 29*24*60*60;
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else ret += 28*24*60*60;
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}
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}
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return ret;
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}
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/*
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* Initialize the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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inittodr(base)
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time_t base;
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{
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unsigned long sec;
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int leap,day_week,t,yd;
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int sa,s;
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/* do we have a realtime clock present? (otherwise we loop below) */
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sa = rtcin(RTC_STATUSA);
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if (sa == 0xff || sa == 0) return;
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/* ready for a read? */
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while ((sa&RTCSA_TUP) == RTCSA_TUP)
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sa = rtcin(RTC_STATUSA);
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sec = bcd(rtcin(RTC_YEAR)) + 1900;
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if (sec < 1970)
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sec += 100;
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leap = !(sec % 4); sec = ytos(sec); /* year */
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yd = mtos(bcd(rtcin(RTC_MONTH)),leap); sec += yd; /* month */
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t = (bcd(rtcin(RTC_DAY))-1) * 24*60*60; sec += t; yd += t; /* date */
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day_week = rtcin(RTC_WDAY); /* day */
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sec += bcd(rtcin(RTC_HRS)) * 60*60; /* hour */
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sec += bcd(rtcin(RTC_MIN)) * 60; /* minutes */
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sec += bcd(rtcin(RTC_SEC)); /* seconds */
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#ifdef DAYST
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/* XXX off by one? Need to calculate DST on SUNDAY */
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/* Perhaps we should have the RTC hold GMT time to save */
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/* us the bother of converting. */
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yd = yd / (24*60*60);
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if ((yd >= DAYST) && ( yd <= DAYEN)) {
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sec -= 60*60;
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}
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#endif
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sec += tz.tz_minuteswest * 60;
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time.tv_sec = sec;
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}
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#ifdef garbage
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/*
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* Initialze the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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test_inittodr(base)
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time_t base;
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{
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outb(IO_RTC,9); /* year */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,8); /* month */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,7); /* day */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,4); /* hour */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,2); /* minutes */
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printf("%d ",bcd(inb(IO_RTC+1)));
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outb(IO_RTC,0); /* seconds */
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printf("%d\n",bcd(inb(IO_RTC+1)));
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time.tv_sec = base;
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}
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#endif
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/*
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* Restart the clock.
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*/
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void
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resettodr()
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{
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}
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/*
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* Wire clock interrupt in.
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*/
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#define VEC(s) __CONCAT(X, s)
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extern VEC(clk)();
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void
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enablertclock() {
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enablertclock(void) {
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setidt(ICU_OFFSET+0, &VEC(clk), SDT_SYS386IGT, SEL_KPL);
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INTREN(IRQ0);
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}
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@ -249,8 +161,185 @@ enablertclock() {
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* Delay for some number of milliseconds.
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*/
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void
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spinwait(millisecs)
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int millisecs;
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spinwait(int millisecs)
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{
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DELAY(1000 * millisecs);
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}
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static int first_rtcopen_ever = 1;
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void
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rtcinit(void)
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{
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if (first_rtcopen_ever) {
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outb(IO_RTC, RTC_STATUSA);
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outb(IO_RTC+1, RTC_DIV2 | RTC_RATE6);
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outb(IO_RTC, RTC_STATUSB);
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outb(IO_RTC+1, RTC_HM);
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first_rtcopen_ever = 0;
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}
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}
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int
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rtcget(struct rtc_st *rtc_regs)
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{
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int i;
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u_char *regs = (u_char *)rtc_regs;
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if (first_rtcopen_ever) {
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rtcinit();
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}
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outb(IO_RTC, RTC_D);
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if (inb(IO_RTC+1) & RTC_VRT == 0) return(-1);
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outb(IO_RTC, RTC_STATUSA);
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while (inb(IO_RTC+1) & RTC_UIP) /* busy wait */
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outb(IO_RTC, RTC_STATUSA);
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for (i = 0; i < RTC_NREG; i++) {
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outb(IO_RTC, i);
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regs[i] = inb(IO_RTC+1);
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}
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return(0);
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}
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void
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rtcput(struct rtc_st *rtc_regs)
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{
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u_char x;
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int i;
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u_char *regs = (u_char *)rtc_regs;
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if (first_rtcopen_ever) {
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rtcinit();
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}
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outb(IO_RTC, RTC_STATUSB);
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x = inb(IO_RTC+1);
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outb(IO_RTC, RTC_STATUSB);
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outb(IO_RTC+1, x | RTC_SET);
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for (i = 0; i < RTC_NREGP; i++) {
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outb(IO_RTC, i);
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outb(IO_RTC+1, regs[i]);
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}
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outb(IO_RTC, RTC_STATUSB);
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outb(IO_RTC+1, x & ~RTC_SET);
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}
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static int month[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
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static int
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yeartoday(int year)
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{
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return((year%4) ? 365 : 366);
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}
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static int
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hexdectodec(char n)
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{
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return(((n>>4)&0x0F)*10 + (n&0x0F));
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}
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static char
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dectohexdec(int n)
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{
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return((char)(((n/10)<<4)&0xF0) | ((n%10)&0x0F));
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}
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/*
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* Initialize the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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void
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inittodr(base)
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time_t base;
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{
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/*
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* We ignore the suggested time for now and go for the RTC
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* clock time stored in the CMOS RAM.
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*/
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struct rtc_st rtclk;
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time_t n;
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int sec, min, hr, dom, mon, yr;
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int i, days = 0;
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int ospl;
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ospl = splclock();
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if (rtcget(&rtclk)) {
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splx(ospl);
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return;
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}
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splx (ospl);
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sec = hexdectodec(rtclk.rtc_sec);
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min = hexdectodec(rtclk.rtc_min);
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hr = hexdectodec(rtclk.rtc_hr);
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dom = hexdectodec(rtclk.rtc_dom);
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mon = hexdectodec(rtclk.rtc_mon);
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yr = hexdectodec(rtclk.rtc_yr);
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yr = (yr < 70) ? yr+100 : yr;
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n = sec + 60 * min + 3600 * hr;
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n += (dom - 1) * 3600 * 24;
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if (yeartoday(yr) == 366)
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month[1] = 29;
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for (i = mon - 2; i >= 0; i--)
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days += month[i];
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month[1] = 28;
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for (i = 70; i < yr; i++)
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days += yeartoday(i);
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n += days * 3600 * 24;
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n += tz.tz_minuteswest * 60;
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if (tz.tz_dsttime)
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n -= 3600;
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time.tv_sec = n;
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time.tv_usec = 0;
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}
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/*
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* Reset the clock.
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*/
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void
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resettodr()
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{
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struct rtc_st rtclk;
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time_t n;
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int diff, i, j;
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int ospl;
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ospl = splclock();
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if (rtcget(&rtclk)) {
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splx(ospl);
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return;
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}
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splx(ospl);
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diff = tz.tz_minuteswest * 60;
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if (tz.tz_dsttime)
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diff -= 3600;
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n = (time.tv_sec - diff) % (3600 * 24); /* hrs+mins+secs */
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rtclk.rtc_sec = dectohexdec(n%60);
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n /= 60;
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rtclk.rtc_min = dectohexdec(n%60);
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rtclk.rtc_hr = dectohexdec(n/60);
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n = (time.tv_sec - diff) / (3600 * 24); /* days */
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rtclk.rtc_dow = (n + 4) % 7; /* 1/1/70 is Thursday */
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for (j = 1970, i = yeartoday(j); n >= i; j++, i = yeartoday(j))
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n -= i;
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rtclk.rtc_yr = dectohexdec(j - 1900);
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if (i == 366)
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month[1] = 29;
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for (i = 0; n >= month[i]; i++)
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n -= month[i];
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month[1] = 28;
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rtclk.rtc_mon = dectohexdec(++i);
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rtclk.rtc_dom = dectohexdec(++n);
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ospl = splclock();
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rtcput(&rtclk);
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splx(ospl);
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}
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@ -0,0 +1,72 @@
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/*
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* Mach Operating System
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||||
* Copyright (c) 1991,1990,1989 Carnegie Mellon University
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission to use, copy, modify and distribute this software and its
|
||||
* documentation is hereby granted, provided that both the copyright
|
||||
* notice and this permission notice appear in all copies of the
|
||||
* software, derivative works or modified versions, and any portions
|
||||
* thereof, and that both notices appear in supporting documentation.
|
||||
*
|
||||
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
|
||||
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
|
||||
* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
|
||||
*
|
||||
* Carnegie Mellon requests users of this software to return to
|
||||
*
|
||||
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
|
||||
* School of Computer Science
|
||||
* Carnegie Mellon University
|
||||
* Pittsburgh PA 15213-3890
|
||||
*
|
||||
* any improvements or extensions that they make and grant Carnegie Mellon
|
||||
* the rights to redistribute these changes.
|
||||
*/
|
||||
/*
|
||||
Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
|
||||
|
||||
All Rights Reserved
|
||||
|
||||
Permission to use, copy, modify, and distribute this software and
|
||||
its documentation for any purpose and without fee is hereby
|
||||
granted, provided that the above copyright notice appears in all
|
||||
copies and that both the copyright notice and this permission notice
|
||||
appear in supporting documentation, and that the name of Intel
|
||||
not be used in advertising or publicity pertaining to distribution
|
||||
of the software without specific, written prior permission.
|
||||
|
||||
INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
|
||||
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
|
||||
IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
|
||||
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
|
||||
NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
|
||||
WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#define RTCRTIME _IOR('c', 0x01, struct rtc_st) /* Read time from RTC */
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#define RTCSTIME _IOW('c', 0x02, struct rtc_st) /* Set time into RTC */
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|
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struct rtc_st {
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char rtc_sec;
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char rtc_asec;
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char rtc_min;
|
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char rtc_amin;
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char rtc_hr;
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char rtc_ahr;
|
||||
char rtc_dow;
|
||||
char rtc_dom;
|
||||
char rtc_mon;
|
||||
char rtc_yr;
|
||||
char rtc_statusa;
|
||||
char rtc_statusb;
|
||||
char rtc_statusc;
|
||||
char rtc_statusd;
|
||||
};
|
||||
|
||||
#ifdef KERNEL
|
||||
extern int rtcget __P((struct rtc_st *rtc_regs));
|
||||
extern void rtcput __P((struct rtc_st *rtc_regs));
|
||||
extern void rtcinit __P((void));
|
||||
#endif
|
|
@ -34,37 +34,101 @@
|
|||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: @(#)rtc.h 7.1 (Berkeley) 5/12/91
|
||||
* $Id: rtc.h,v 1.3 1993/05/22 08:01:36 cgd Exp $
|
||||
* rtc.h,v 1.3 1993/05/22 08:01:36 cgd Exp
|
||||
*/
|
||||
/*
|
||||
* Mach Operating System
|
||||
* Copyright (c) 1991,1990,1989 Carnegie Mellon University
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission to use, copy, modify and distribute this software and its
|
||||
* documentation is hereby granted, provided that both the copyright
|
||||
* notice and this permission notice appear in all copies of the
|
||||
* software, derivative works or modified versions, and any portions
|
||||
* thereof, and that both notices appear in supporting documentation.
|
||||
*
|
||||
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
|
||||
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
|
||||
* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
|
||||
*
|
||||
* Carnegie Mellon requests users of this software to return to
|
||||
*
|
||||
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
|
||||
* School of Computer Science
|
||||
* Carnegie Mellon University
|
||||
* Pittsburgh PA 15213-3890
|
||||
*
|
||||
* any improvements or extensions that they make and grant Carnegie Mellon
|
||||
* the rights to redistribute these changes.
|
||||
*/
|
||||
/*
|
||||
Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
|
||||
|
||||
All Rights Reserved
|
||||
|
||||
Permission to use, copy, modify, and distribute this software and
|
||||
its documentation for any purpose and without fee is hereby
|
||||
granted, provided that the above copyright notice appears in all
|
||||
copies and that both the copyright notice and this permission notice
|
||||
appear in supporting documentation, and that the name of Intel
|
||||
not be used in advertising or publicity pertaining to distribution
|
||||
of the software without specific, written prior permission.
|
||||
|
||||
INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
|
||||
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
|
||||
IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
|
||||
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
|
||||
NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
|
||||
WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
/*
|
||||
* RTC/CMOS Register locations
|
||||
*/
|
||||
/*
|
||||
* Register A definitions
|
||||
*/
|
||||
#define RTC_STATUSA 0x0a /* register A address */
|
||||
#define RTC_UIP 0x80 /* Update in progress bit */
|
||||
#define RTC_DIV0 0x00 /* Time base of 4.194304 MHz */
|
||||
#define RTC_DIV1 0x10 /* Time base of 1.048576 MHz */
|
||||
#define RTC_DIV2 0x20 /* Time base of 32.768 KHz */
|
||||
#define RTC_RATE6 0x06 /* interrupt rate of 976.562 */
|
||||
|
||||
/*
|
||||
* RTC Register locations
|
||||
* Register B definitions
|
||||
*/
|
||||
#define RTC_STATUSB 0x0b /* register B address */
|
||||
#define RTC_SET 0x80 /* stop updates for time set */
|
||||
#define RTC_PIE 0x40 /* Periodic interrupt enable */
|
||||
#define RTC_AIE 0x20 /* Alarm interrupt enable */
|
||||
#define RTC_UIE 0x10 /* Update ended interrupt enable */
|
||||
#define RTC_SQWE 0x08 /* Square wave enable */
|
||||
#define RTC_DM 0x04 /* Date mode, 1 = binary, 0 = BCD */
|
||||
#define RTC_HM 0x02 /* hour mode, 1 = 24 hour, 0 = 12 hour */
|
||||
#define RTC_DSE 0x01 /* Daylight savings enable */
|
||||
|
||||
#define RTC_SEC 0x00 /* seconds */
|
||||
#define RTC_SECALRM 0x01 /* seconds alarm */
|
||||
#define RTC_MIN 0x02 /* minutes */
|
||||
#define RTC_MINALRM 0x03 /* minutes alarm */
|
||||
#define RTC_HRS 0x04 /* hours */
|
||||
#define RTC_HRSALRM 0x05 /* hours alarm */
|
||||
#define RTC_WDAY 0x06 /* week day */
|
||||
#define RTC_DAY 0x07 /* day of month */
|
||||
#define RTC_MONTH 0x08 /* month of year */
|
||||
#define RTC_YEAR 0x09 /* month of year */
|
||||
#define RTC_STATUSA 0x0a /* status register A */
|
||||
#define RTCSA_TUP 0x80 /* time update, don't look now */
|
||||
/*
|
||||
* Register C definitions
|
||||
*/
|
||||
#define RTC_INTR 0x0c /* register C address */
|
||||
#define RTC_IRQF 0x80 /* IRQ flag */
|
||||
#define RTC_PF 0x40 /* PF flag bit */
|
||||
#define RTC_AF 0x20 /* AF flag bit */
|
||||
#define RTC_UF 0x10 /* UF flag bit */
|
||||
|
||||
#define RTC_STATUSB 0x0b /* status register B */
|
||||
/*
|
||||
* Register D definitions
|
||||
*/
|
||||
#define RTC_D 0x0d /* register D address */
|
||||
#define RTC_VRT 0x80 /* Valid RAM and time bit */
|
||||
|
||||
#define RTC_INTR 0x0c /* status register C (R) interrupt source */
|
||||
#define RTCIR_UPDATE 0x10 /* update intr */
|
||||
#define RTCIR_ALARM 0x20 /* alarm intr */
|
||||
#define RTCIR_PERIOD 0x40 /* periodic intr */
|
||||
#define RTCIR_INT 0x80 /* interrupt output signal */
|
||||
|
||||
#define RTC_STATUSD 0x0d /* status register D (R) Lost Power */
|
||||
#define RTCSD_PWR 0x80 /* clock lost power */
|
||||
#define RTC_NREG 0x0e /* number of RTC registers */
|
||||
#define RTC_NREGP 0x0a /* number of RTC registers to set time */
|
||||
|
||||
/*
|
||||
* These are generic CMOS locations, but we call then RTC anyway...
|
||||
*/
|
||||
#define RTC_DIAG 0x0e /* status register E - bios diagnostic */
|
||||
#define RTCDG_BITS "\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
|
||||
|
||||
|
|
Loading…
Reference in New Issue