Use lowercase consistently for hexadecimal numbers. No functional change.
This commit is contained in:
msaitoh
parent
37fa523fa5
commit
f1f580f5a3
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@ -1,4 +1,4 @@
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/* $NetBSD: tprof_x86.c,v 1.13 2022/12/07 08:11:49 msaitoh Exp $ */
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/* $NetBSD: tprof_x86.c,v 1.14 2022/12/08 02:12:18 msaitoh Exp $ */
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/*
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* Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
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@ -78,14 +78,14 @@ static void x86_cpuid(unsigned int *eax, unsigned int *ebx,
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*/
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static struct name_to_event intel_arch1_names[] = {
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/* Event Name - Event Select - UMask */
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{ "unhalted-core-cycles", 0x3C, 0x00, true },
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{ "instruction-retired", 0xC0, 0x00, true },
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{ "unhalted-reference-cycles", 0x3C, 0x01, true },
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{ "llc-reference", 0x2E, 0x4F, true },
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{ "llc-misses", 0x2E, 0x41, true },
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{ "branch-instruction-retired", 0xC4, 0x00, true },
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{ "branch-misses-retired", 0xC5, 0x00, true },
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{ "topdown-slots", 0xA4, 0x01, true },
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{ "unhalted-core-cycles", 0x3c, 0x00, true },
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{ "instruction-retired", 0xc0, 0x00, true },
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{ "unhalted-reference-cycles", 0x3c, 0x01, true },
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{ "llc-reference", 0x2e, 0x4f, true },
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{ "llc-misses", 0x2e, 0x41, true },
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{ "branch-instruction-retired", 0xc4, 0x00, true },
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{ "branch-misses-retired", 0xc5, 0x00, true },
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{ "topdown-slots", 0xa4, 0x01, true },
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};
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static struct event_table intel_arch1 = {
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@ -103,7 +103,7 @@ init_intel_arch1(void)
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struct event_table *table;
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size_t i;
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eax = 0x0A;
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eax = 0x0a;
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ebx = 0;
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ecx = 0;
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edx = 0;
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@ -150,53 +150,53 @@ static struct name_to_event intel_silvermont_airmont_names[] = {
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{ "PAGE_WALKS.D_SIDE_CYCLES", 0x05, 0x01, true },
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{ "PAGE_WALKS.I_SIDE_CYCLES", 0x05, 0x02, true },
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{ "PAGE_WALKS.WALKS", 0x05, 0x03, true },
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{ "LONGEST_LAT_CACHE.MISS", 0x2E, 0x41, true },
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{ "LONGEST_LAT_CACHE.REFERENCE", 0x2E, 0x4F, true },
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{ "LONGEST_LAT_CACHE.MISS", 0x2e, 0x41, true },
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{ "LONGEST_LAT_CACHE.REFERENCE", 0x2e, 0x4f, true },
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{ "L2_REJECT_XQ.ALL", 0x30, 0x00, true },
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{ "CORE_REJECT_L2Q.ALL", 0x31, 0x00, true },
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{ "CPU_CLK_UNHALTED.CORE_P", 0x3C, 0x00, true },
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{ "CPU_CLK_UNHALTED.REF_P", 0x3C, 0x01, true },
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{ "CPU_CLK_UNHALTED.CORE_P", 0x3c, 0x00, true },
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{ "CPU_CLK_UNHALTED.REF_P", 0x3c, 0x01, true },
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{ "ICACHE.HIT", 0x80, 0x01, true },
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{ "ICACHE.MISSES", 0x80, 0x02, true },
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{ "ICACHE.ACCESSES", 0x80, 0x03, true },
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{ "OFFCORE_RESPONSE_0", 0xB7, 0x01, true },
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{ "OFFCORE_RESPONSE_1", 0xB7, 0x02, true },
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{ "INST_RETIRED.ANY_P", 0xC0, 0x00, true },
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{ "UOPS_RETIRED.MS", 0xC2, 0x01, true },
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{ "UOPS_RETIRED.ALL", 0xC2, 0x10, true },
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{ "MACHINE_CLEARS.SMC", 0xC3, 0x01, true },
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{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true },
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{ "MACHINE_CLEARS.FP_ASSIST", 0xC3, 0x04, true },
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{ "MACHINE_CLEARS.ALL", 0xC3, 0x08, true },
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{ "BR_INST_RETIRED.ALL_BRANCHES", 0xC4, 0x00, true },
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{ "BR_INST_RETIRED.JCC", 0xC4, 0x7E, true },
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{ "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0xBF, true },
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{ "BR_INST_RETIRED.NON_RETURN_IND", 0xC4, 0xEB, true },
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{ "BR_INST_RETIRED.RETURN", 0xC4, 0xF7, true },
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{ "BR_INST_RETIRED.CALL", 0xC4, 0xF9, true },
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{ "BR_INST_RETIRED.IND_CALL", 0xC4, 0xFB, true },
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{ "BR_INST_RETIRED.REL_CALL", 0xC4, 0xFD, true },
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{ "BR_INST_RETIRED.TAKEN_JCC", 0xC4, 0xFE, true },
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{ "BR_MISP_RETIRED.ALL_BRANCHES", 0xC5, 0x00, true },
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{ "BR_MISP_RETIRED.JCC", 0xC5, 0x7E, true },
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{ "BR_MISP_RETIRED.FAR", 0xC5, 0xBF, true },
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{ "BR_MISP_RETIRED.NON_RETURN_IND", 0xC5, 0xEB, true },
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{ "BR_MISP_RETIRED.RETURN", 0xC5, 0xF7, true },
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{ "BR_MISP_RETIRED.CALL", 0xC5, 0xF9, true },
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{ "BR_MISP_RETIRED.IND_CALL", 0xC5, 0xFB, true },
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{ "BR_MISP_RETIRED.REL_CALL", 0xC5, 0xFD, true },
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{ "BR_MISP_RETIRED.TAKEN_JCC", 0xC5, 0xFE, true },
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{ "NO_ALLOC_CYCLES.ROB_FULL", 0xCA, 0x01, true },
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{ "NO_ALLOC_CYCLES.RAT_STALL", 0xCA, 0x20, true },
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{ "NO_ALLOC_CYCLES.ALL", 0xCA, 0x3F, true },
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{ "NO_ALLOC_CYCLES.NOT_DELIVERED", 0xCA, 0x50, true },
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{ "RS_FULL_STALL.MEC", 0xCB, 0x01, true },
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{ "RS_FULL_STALL.ALL", 0xCB, 0x1F, true },
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{ "CYCLES_DIV_BUSY.ANY", 0xCD, 0x01, true },
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{ "BACLEARS.ALL", 0xE6, 0x01, true },
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{ "BACLEARS.RETURN", 0xE6, 0x08, true },
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{ "BACLEARS.COND", 0xE6, 0x10, true },
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{ "MS_DECODED.MS_ENTRY", 0xE7, 0x01, true },
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{ "OFFCORE_RESPONSE_0", 0xb7, 0x01, true },
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{ "OFFCORE_RESPONSE_1", 0xb7, 0x02, true },
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{ "INST_RETIRED.ANY_P", 0xc0, 0x00, true },
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{ "UOPS_RETIRED.MS", 0xc2, 0x01, true },
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{ "UOPS_RETIRED.ALL", 0xc2, 0x10, true },
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{ "MACHINE_CLEARS.SMC", 0xc3, 0x01, true },
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{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xc3, 0x02, true },
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{ "MACHINE_CLEARS.FP_ASSIST", 0xc3, 0x04, true },
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{ "MACHINE_CLEARS.ALL", 0xc3, 0x08, true },
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{ "BR_INST_RETIRED.ALL_BRANCHES", 0xc4, 0x00, true },
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{ "BR_INST_RETIRED.JCC", 0xc4, 0x7e, true },
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{ "BR_INST_RETIRED.FAR_BRANCH", 0xc4, 0xbf, true },
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{ "BR_INST_RETIRED.NON_RETURN_IND", 0xc4, 0xeb, true },
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{ "BR_INST_RETIRED.RETURN", 0xc4, 0xf7, true },
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{ "BR_INST_RETIRED.CALL", 0xc4, 0xf9, true },
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{ "BR_INST_RETIRED.IND_CALL", 0xc4, 0xfb, true },
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{ "BR_INST_RETIRED.REL_CALL", 0xc4, 0xfd, true },
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{ "BR_INST_RETIRED.TAKEN_JCC", 0xc4, 0xfe, true },
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{ "BR_MISP_RETIRED.ALL_BRANCHES", 0xc5, 0x00, true },
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{ "BR_MISP_RETIRED.JCC", 0xc5, 0x7e, true },
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{ "BR_MISP_RETIRED.FAR", 0xc5, 0xbf, true },
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{ "BR_MISP_RETIRED.NON_RETURN_IND", 0xc5, 0xeb, true },
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{ "BR_MISP_RETIRED.RETURN", 0xc5, 0xf7, true },
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{ "BR_MISP_RETIRED.CALL", 0xc5, 0xf9, true },
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{ "BR_MISP_RETIRED.IND_CALL", 0xc5, 0xfb, true },
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{ "BR_MISP_RETIRED.REL_CALL", 0xc5, 0xfd, true },
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{ "BR_MISP_RETIRED.TAKEN_JCC", 0xc5, 0xfe, true },
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{ "NO_ALLOC_CYCLES.ROB_FULL", 0xca, 0x01, true },
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{ "NO_ALLOC_CYCLES.RAT_STALL", 0xca, 0x20, true },
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{ "NO_ALLOC_CYCLES.ALL", 0xca, 0x3f, true },
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{ "NO_ALLOC_CYCLES.NOT_DELIVERED", 0xca, 0x50, true },
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{ "RS_FULL_STALL.MEC", 0xcb, 0x01, true },
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{ "RS_FULL_STALL.ALL", 0xcb, 0x1f, true },
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{ "CYCLES_DIV_BUSY.ANY", 0xcd, 0x01, true },
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{ "BACLEARS.ALL", 0xe6, 0x01, true },
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{ "BACLEARS.RETURN", 0xe6, 0x08, true },
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{ "BACLEARS.COND", 0xe6, 0x10, true },
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{ "MS_DECODED.MS_ENTRY", 0xe7, 0x01, true },
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};
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static struct event_table intel_silvermont_airmont = {
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@ -226,15 +226,15 @@ static struct name_to_event intel_goldmont_names[] = {
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{ "PAGE_WALKS.D_SIDE_CYCLES", 0x05, 0x01, true },
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{ "PAGE_WALKS.I_SIDE_CYCLES", 0x05, 0x02, true },
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{ "PAGE_WALKS.CYCLES", 0x05, 0x03, true },
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{ "UOPS_ISSUED.ANY", 0x0E, 0x00, true },
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{ "UOPS_ISSUED.ANY", 0x0e, 0x00, true },
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{ "MISALIGN_MEM_REF.LOAD_PAGE_SPLIT", 0x13, 0x02, true },
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{ "MISALIGN_MEM_REF.STORE_PAGE_SPLIT", 0x13, 0x04, true },
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{ "LONGEST_LAT_CACHE.REFERENCE", 0x2E, 0x4F, true },
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{ "LONGEST_LAT_CACHE.MISS", 0x2E, 0x41, true },
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{ "LONGEST_LAT_CACHE.REFERENCE", 0x2e, 0x4f, true },
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{ "LONGEST_LAT_CACHE.MISS", 0x2e, 0x41, true },
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{ "L2_REJECT_XQ.ALL", 0x30, 0x00, true },
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{ "CORE_REJECT_L2Q.ALL", 0x31, 0x00, true },
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{ "CPU_CLK_UNHALTED.CORE_P", 0x3C, 0x00, true },
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{ "CPU_CLK_UNHALTED.REF", 0x3C, 0x01, true },
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{ "CPU_CLK_UNHALTED.CORE_P", 0x3c, 0x00, true },
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{ "CPU_CLK_UNHALTED.REF", 0x3c, 0x01, true },
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{ "DL1.DIRTY_EVICTION", 0x51, 0x01, true },
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{ "ICACHE.HIT", 0x80, 0x01, true },
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{ "ICACHE.MISSES", 0x80, 0x02, true },
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@ -243,66 +243,66 @@ static struct name_to_event intel_goldmont_names[] = {
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{ "FETCH_STALL.ALL", 0x86, 0x00, true },
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{ "FETCH_STALL.ITLB_FILL_PENDING_CYCLES", 0x86, 0x01, true },
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{ "FETCH_STALL.ICACHE_FILL_PENDING_CYCLES", 0x86, 0x02, true },
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{ "UOPS_NOT_DELIVERED.ANY", 0x9C, 0x00, true },
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{ "OFFCORE_RESPONSE.0", 0xB7, 0x01, true },
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{ "OFFCORE_RESPONSE.1", 0xB7, 0x02, true },
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{ "INST_RETIRED.ANY_P", 0xC0, 0x00, true },
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{ "UOPS_RETIRED.ANY", 0xC2, 0x00, true },
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{ "UOPS_RETIRED.MS", 0xC2, 0x01, true },
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{ "UOPS_RETIRED.FPDIV", 0xC2, 0x08, true },
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{ "UOPS_RETIRED.IDIV", 0xC2, 0x10, true },
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{ "MACHINE_CLEARS.SMC", 0xC3, 0x01, true },
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{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true },
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{ "MACHINE_CLEARS.FP_ASSIST", 0xC3, 0x04, true },
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{ "MACHINE_CLEARS.DISAMBIGUATION", 0xC3, 0x08, true },
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{ "MACHINE_CLEARS.ALL", 0xC3, 0x00, true },
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{ "BR_INST_RETIRED.ALL_BRANCHES", 0xC4, 0x00, true },
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{ "BR_INST_RETIRED.JCC", 0xC4, 0x7E, true },
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{ "BR_INST_RETIRED.ALL_TAKEN_BRANCHES", 0xC4, 0x80, true },
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{ "BR_INST_RETIRED.TAKEN_JCC", 0xC4, 0xFE, true },
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{ "BR_INST_RETIRED.CALL", 0xC4, 0xF9, true },
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{ "BR_INST_RETIRED.REL_CALL", 0xC4, 0xFD, true },
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{ "BR_INST_RETIRED.IND_CALL", 0xC4, 0xFB, true },
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{ "BR_INST_RETIRED.RETURN", 0xC4, 0xF7, true },
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{ "BR_INST_RETIRED.NON_RETURN_IND", 0xC4, 0xEB, true },
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{ "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0xBF, true },
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{ "BR_MISP_RETIRED.ALL_BRANCHES", 0xC5, 0x00, true },
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{ "BR_MISP_RETIRED.JCC", 0xC5, 0x7E, true },
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{ "BR_MISP_RETIRED.TAKEN_JCC", 0xC5, 0xFE, true },
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{ "BR_MISP_RETIRED.IND_CALL", 0xC5, 0xFB, true },
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{ "BR_MISP_RETIRED.RETURN", 0xC5, 0xF7, true },
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{ "BR_MISP_RETIRED.NON_RETURN_IND", 0xC5, 0xEB, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.RESOURCE_FULL", 0xCA, 0x01, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.RECOVERY", 0xCA, 0x02, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.ANY", 0xCA, 0x00, true },
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{ "HW_INTERRUPTS.RECEIVED", 0xCB, 0x01, true },
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{ "HW_INTERRUPTS.MASKED", 0xCB, 0x02, true },
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{ "HW_INTERRUPTS.PENDING_AND_MASKED", 0xCB, 0x04, true },
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{ "CYCLES_DIV_BUSY.ALL", 0xCD, 0x00, true },
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{ "CYCLES_DIV_BUSY.IDIV", 0xCD, 0x01, true },
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{ "CYCLES_DIV_BUSY.FPDIV", 0xCD, 0x02, true },
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{ "MEM_UOPS_RETIRED.ALL_LOADS", 0xD0, 0x81, true },
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{ "MEM_UOPS_RETIRED.ALL_STORES", 0xD0, 0x82, true },
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{ "MEM_UOPS_RETIRED.ALL", 0xD0, 0x83, true },
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{ "MEM_UOPS_RETIRED.DTLB_MISS_LOADS", 0xD0, 0x11, true },
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{ "MEM_UOPS_RETIRED.DTLB_MISS_STORES", 0xD0, 0x12, true },
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{ "MEM_UOPS_RETIRED.DTLB_MISS", 0xD0, 0x13, true },
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{ "MEM_UOPS_RETIRED.LOCK_LOADS", 0xD0, 0x21, true },
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{ "MEM_UOPS_RETIRED.SPLIT_LOADS", 0xD0, 0x41, true },
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{ "MEM_UOPS_RETIRED.SPLIT_STORES", 0xD0, 0x42, true },
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{ "MEM_UOPS_RETIRED.SPLIT", 0xD0, 0x43, true },
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{ "MEM_LOAD_UOPS_RETIRED.L1_HIT", 0xD1, 0x01, true },
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{ "MEM_LOAD_UOPS_RETIRED.L1_MISS", 0xD1, 0x08, true },
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{ "MEM_LOAD_UOPS_RETIRED.L2_HIT", 0xD1, 0x02, true },
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{ "MEM_LOAD_UOPS_RETIRED.L2_MISS", 0xD1, 0x10, true },
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{ "MEM_LOAD_UOPS_RETIRED.HITM", 0xD1, 0x20, true },
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{ "MEM_LOAD_UOPS_RETIRED.WCB_HIT", 0xD1, 0x40, true },
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{ "MEM_LOAD_UOPS_RETIRED.DRAM_HIT", 0xD1, 0x80, true },
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{ "BACLEARS.ALL", 0xE6, 0x01, true },
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{ "BACLEARS.RETURN", 0xE6, 0x08, true },
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{ "BACLEAR.CONDS", 0xE6, 0x10, true },
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{ "MS_DECODED.MS_ENTRY", 0xE7, 0x01, true },
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{ "DECODED_RESTRICTION.PREDECODE_WRONG", 0xE9, 0x01, true },
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{ "UOPS_NOT_DELIVERED.ANY", 0x9c, 0x00, true },
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{ "OFFCORE_RESPONSE.0", 0xb7, 0x01, true },
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{ "OFFCORE_RESPONSE.1", 0xb7, 0x02, true },
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{ "INST_RETIRED.ANY_P", 0xc0, 0x00, true },
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{ "UOPS_RETIRED.ANY", 0xc2, 0x00, true },
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{ "UOPS_RETIRED.MS", 0xc2, 0x01, true },
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{ "UOPS_RETIRED.FPDIV", 0xc2, 0x08, true },
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{ "UOPS_RETIRED.IDIV", 0xc2, 0x10, true },
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{ "MACHINE_CLEARS.SMC", 0xc3, 0x01, true },
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{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xc3, 0x02, true },
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{ "MACHINE_CLEARS.FP_ASSIST", 0xc3, 0x04, true },
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{ "MACHINE_CLEARS.DISAMBIGUATION", 0xc3, 0x08, true },
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{ "MACHINE_CLEARS.ALL", 0xc3, 0x00, true },
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{ "BR_INST_RETIRED.ALL_BRANCHES", 0xc4, 0x00, true },
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{ "BR_INST_RETIRED.JCC", 0xc4, 0x7e, true },
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{ "BR_INST_RETIRED.ALL_TAKEN_BRANCHES", 0xc4, 0x80, true },
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{ "BR_INST_RETIRED.TAKEN_JCC", 0xc4, 0xfe, true },
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{ "BR_INST_RETIRED.CALL", 0xc4, 0xf9, true },
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{ "BR_INST_RETIRED.REL_CALL", 0xc4, 0xfd, true },
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{ "BR_INST_RETIRED.IND_CALL", 0xc4, 0xfb, true },
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{ "BR_INST_RETIRED.RETURN", 0xc4, 0xf7, true },
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{ "BR_INST_RETIRED.NON_RETURN_IND", 0xc4, 0xeb, true },
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{ "BR_INST_RETIRED.FAR_BRANCH", 0xc4, 0xbf, true },
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{ "BR_MISP_RETIRED.ALL_BRANCHES", 0xc5, 0x00, true },
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{ "BR_MISP_RETIRED.JCC", 0xc5, 0x7e, true },
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{ "BR_MISP_RETIRED.TAKEN_JCC", 0xc5, 0xfe, true },
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{ "BR_MISP_RETIRED.IND_CALL", 0xc5, 0xfb, true },
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{ "BR_MISP_RETIRED.RETURN", 0xc5, 0xf7, true },
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{ "BR_MISP_RETIRED.NON_RETURN_IND", 0xc5, 0xeb, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.RESOURCE_FULL", 0xca, 0x01, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.RECOVERY", 0xca, 0x02, true },
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{ "ISSUE_SLOTS_NOT_CONSUMED.ANY", 0xca, 0x00, true },
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{ "HW_INTERRUPTS.RECEIVED", 0xcb, 0x01, true },
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{ "HW_INTERRUPTS.MASKED", 0xcb, 0x02, true },
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{ "HW_INTERRUPTS.PENDING_AND_MASKED", 0xcb, 0x04, true },
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{ "CYCLES_DIV_BUSY.ALL", 0xcd, 0x00, true },
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{ "CYCLES_DIV_BUSY.IDIV", 0xcd, 0x01, true },
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{ "CYCLES_DIV_BUSY.FPDIV", 0xcd, 0x02, true },
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{ "MEM_UOPS_RETIRED.ALL_LOADS", 0xd0, 0x81, true },
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{ "MEM_UOPS_RETIRED.ALL_STORES", 0xd0, 0x82, true },
|
||||
{ "MEM_UOPS_RETIRED.ALL", 0xd0, 0x83, true },
|
||||
{ "MEM_UOPS_RETIRED.DTLB_MISS_LOADS", 0xd0, 0x11, true },
|
||||
{ "MEM_UOPS_RETIRED.DTLB_MISS_STORES", 0xd0, 0x12, true },
|
||||
{ "MEM_UOPS_RETIRED.DTLB_MISS", 0xd0, 0x13, true },
|
||||
{ "MEM_UOPS_RETIRED.LOCK_LOADS", 0xd0, 0x21, true },
|
||||
{ "MEM_UOPS_RETIRED.SPLIT_LOADS", 0xd0, 0x41, true },
|
||||
{ "MEM_UOPS_RETIRED.SPLIT_STORES", 0xd0, 0x42, true },
|
||||
{ "MEM_UOPS_RETIRED.SPLIT", 0xd0, 0x43, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.L1_HIT", 0xd1, 0x01, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.L1_MISS", 0xd1, 0x08, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.L2_HIT", 0xd1, 0x02, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.L2_MISS", 0xd1, 0x10, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.HITM", 0xd1, 0x20, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.WCB_HIT", 0xd1, 0x40, true },
|
||||
{ "MEM_LOAD_UOPS_RETIRED.DRAM_HIT", 0xd1, 0x80, true },
|
||||
{ "BACLEARS.ALL", 0xe6, 0x01, true },
|
||||
{ "BACLEARS.RETURN", 0xe6, 0x08, true },
|
||||
{ "BACLEAR.CONDS", 0xe6, 0x10, true },
|
||||
{ "MS_DECODED.MS_ENTRY", 0xe7, 0x01, true },
|
||||
{ "DECODED_RESTRICTION.PREDECODE_WRONG", 0xe9, 0x01, true },
|
||||
};
|
||||
|
||||
static struct event_table intel_goldmont = {
|
||||
|
|
@ -333,13 +333,13 @@ static struct name_to_event intel_goldmontplus_names[] = {
|
|||
{ "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", 0x49, 0x04, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED_1GB", 0x49, 0x08, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_PENDING", 0x49, 0x10, true },
|
||||
{ "EPT.WALK_PENDING", 0x4F, 0x10, true },
|
||||
{ "EPT.WALK_PENDING", 0x4f, 0x10, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED_4K", 0x85, 0x08, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED_2M_4M", 0x85, 0x04, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED_1GB", 0x85, 0x08, true },
|
||||
{ "ITLB_MISSES.WALK_PENDING", 0x85, 0x10, true },
|
||||
{ "TLB_FLUSHES.STLB_ANY", 0xBD, 0x20, true },
|
||||
{ "MACHINE_CLEARS.PAGE_FAULT", 0xC3, 0x20, true },
|
||||
{ "TLB_FLUSHES.STLB_ANY", 0xbd, 0x20, true },
|
||||
{ "MACHINE_CLEARS.PAGE_FAULT", 0xc3, 0x20, true },
|
||||
};
|
||||
|
||||
static struct event_table intel_goldmontplus = {
|
||||
|
|
@ -381,49 +381,49 @@ static struct name_to_event intel_skylake_kabylake_names[] = {
|
|||
{ "DTLB_LOAD_MISSES.WALK_COMPLETED_4K", 0x08, 0x02, true },
|
||||
{ "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", 0x08, 0x04, true },
|
||||
{ "DTLB_LOAD_MISSES.WALK_COMPLETED_1G", 0x08, 0x08, true },
|
||||
{ "DTLB_LOAD_MISSES.WALK_COMPLETED", 0x08, 0x0E, true },
|
||||
{ "DTLB_LOAD_MISSES.WALK_COMPLETED", 0x08, 0x0e, true },
|
||||
{ "DTLB_LOAD_MISSES.WALK_PENDING", 0x08, 0x10, true },
|
||||
{ "DTLB_LOAD_MISSES.STLB_HIT", 0x08, 0x20, true },
|
||||
{ "INT_MISC.RECOVERY_CYCLES", 0x0D, 0x01, true },
|
||||
{ "INT_MISC.CLEAR_RESTEER_CYCLES", 0x0D, 0x80, true },
|
||||
{ "UOPS_ISSUED.ANY", 0x0E, 0x01, true },
|
||||
{ "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH", 0x0E, 0x02, true },
|
||||
{ "UOPS_ISSUED.SLOW_LEA", 0x0E, 0x20, true },
|
||||
{ "INT_MISC.RECOVERY_CYCLES", 0x0d, 0x01, true },
|
||||
{ "INT_MISC.CLEAR_RESTEER_CYCLES", 0x0d, 0x80, true },
|
||||
{ "UOPS_ISSUED.ANY", 0x0e, 0x01, true },
|
||||
{ "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH", 0x0e, 0x02, true },
|
||||
{ "UOPS_ISSUED.SLOW_LEA", 0x0e, 0x20, true },
|
||||
{ "L2_RQSTS.DEMAND_DATA_RD_MISS", 0x24, 0x21, true },
|
||||
{ "L2_RQSTS.RFO_MISS", 0x24, 0x22, true },
|
||||
{ "L2_RQSTS.CODE_RD_MISS", 0x24, 0x24, true },
|
||||
{ "L2_RQSTS.ALL_DEMAND_MISS", 0x24, 0x27, true },
|
||||
{ "L2_RQSTS.PF_MISS", 0x24, 0x38, true },
|
||||
{ "L2_RQSTS.MISS", 0x24, 0x3F, true },
|
||||
{ "L2_RQSTS.MISS", 0x24, 0x3f, true },
|
||||
{ "L2_RQSTS.DEMAND_DATA_RD_HIT", 0x24, 0x41, true },
|
||||
{ "L2_RQSTS.RFO_HIT", 0x24, 0x42, true },
|
||||
{ "L2_RQSTS.CODE_RD_HIT", 0x24, 0x44, true },
|
||||
{ "L2_RQSTS.PF_HIT", 0x24, 0xD8, true },
|
||||
{ "L2_RQSTS.ALL_DEMAND_DATA_RD", 0x24, 0xE1, true },
|
||||
{ "L2_RQSTS.ALL_RFO", 0x24, 0xE2, true },
|
||||
{ "L2_RQSTS.ALL_CODE_RD", 0x24, 0xE4, true },
|
||||
{ "L2_RQSTS.ALL_DEMAND_REFERENCES", 0x24, 0xE7, true },
|
||||
{ "L2_RQSTS.ALL_PF", 0x24, 0xF8, true },
|
||||
{ "L2_RQSTS.REFERENCES", 0x24, 0xFF, true },
|
||||
{ "L2_RQSTS.PF_HIT", 0x24, 0xd8, true },
|
||||
{ "L2_RQSTS.ALL_DEMAND_DATA_RD", 0x24, 0xe1, true },
|
||||
{ "L2_RQSTS.ALL_RFO", 0x24, 0xe2, true },
|
||||
{ "L2_RQSTS.ALL_CODE_RD", 0x24, 0xe4, true },
|
||||
{ "L2_RQSTS.ALL_DEMAND_REFERENCES", 0x24, 0xe7, true },
|
||||
{ "L2_RQSTS.ALL_PF", 0x24, 0xf8, true },
|
||||
{ "L2_RQSTS.REFERENCES", 0x24, 0xff, true },
|
||||
{ "SW_PREFETCH_ACCESS.NTA", 0x32, 0x01, true },
|
||||
{ "SW_PREFETCH_ACCESS.T0", 0x32, 0x02, true },
|
||||
{ "SW_PREFETCH_ACCESS.T1_T2", 0x32, 0x04, true },
|
||||
{ "SW_PREFETCH_ACCESS.PREFETCHW", 0x32, 0x08, true },
|
||||
{ "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true },
|
||||
{ "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true },
|
||||
{ "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", 0x3c, 0x02, true },
|
||||
{ "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE", 0x3c, 0x02, true },
|
||||
{ "L1D_PEND_MISS.PENDING", 0x48, 0x01, true },
|
||||
{ "L1D_PEND_MISS.FB_FULL", 0x48, 0x02, true },
|
||||
{ "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", 0x49, 0x01, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED_4K", 0x49, 0x02, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", 0x49, 0x04, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED_1G", 0x49, 0x08, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED", 0x49, 0x0E, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_COMPLETED", 0x49, 0x0e, true },
|
||||
{ "DTLB_STORE_MISSES.WALK_PENDING", 0x49, 0x10, true },
|
||||
{ "DTLB_STORE_MISSES.STLB_HIT", 0x49, 0x20, true },
|
||||
{ "LOAD_HIT_PRE.SW_PF", 0x4C, 0x01, true },
|
||||
{ "EPT.WALK_PENDING", 0x4F, 0x10, true },
|
||||
{ "LOAD_HIT_PRE.SW_PF", 0x4c, 0x01, true },
|
||||
{ "EPT.WALK_PENDING", 0x4f, 0x10, true },
|
||||
{ "L1D.REPLACEMENT", 0x51, 0x01, true },
|
||||
{ "RS_EVENTS.EMPTY_CYCLES", 0x5E, 0x01, true },
|
||||
{ "RS_EVENTS.EMPTY_CYCLES", 0x5e, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", 0x60, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", 0x60, 0x02, true },
|
||||
{ "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", 0x60, 0x04, true },
|
||||
|
|
@ -442,75 +442,75 @@ static struct name_to_event intel_skylake_kabylake_names[] = {
|
|||
{ "ITLB_MISSES.WALK_COMPLETED_4K", 0x85, 0x02, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED_2M_4M", 0x85, 0x04, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED_1G", 0x85, 0x08, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED", 0x85, 0x0E, true },
|
||||
{ "ITLB_MISSES.WALK_COMPLETED", 0x85, 0x0e, true },
|
||||
{ "ITLB_MISSES.WALK_PENDING", 0x85, 0x10, true },
|
||||
{ "ITLB_MISSES.STLB_HIT", 0x85, 0x20, true },
|
||||
{ "ILD_STALL.LCP", 0x87, 0x01, true },
|
||||
{ "IDQ_UOPS_NOT_DELIVERED.CORE", 0x9C, 0x01, true },
|
||||
{ "RESOURCE_STALLS.ANY", 0xA2, 0x01, true },
|
||||
{ "RESOURCE_STALLS.SB", 0xA2, 0x08, true },
|
||||
{ "EXE_ACTIVITY.EXE_BOUND_0_PORTS", 0xA6, 0x01, true },
|
||||
{ "EXE_ACTIVITY.1_PORTS_UTIL", 0xA6, 0x02, true },
|
||||
{ "EXE_ACTIVITY.2_PORTS_UTIL", 0xA6, 0x04, true },
|
||||
{ "EXE_ACTIVITY.3_PORTS_UTIL", 0xA6, 0x08, true },
|
||||
{ "EXE_ACTIVITY.4_PORTS_UTIL", 0xA6, 0x10, true },
|
||||
{ "EXE_ACTIVITY.BOUND_ON_STORES", 0xA6, 0x40, true },
|
||||
{ "LSD.UOPS", 0xA8, 0x01, true },
|
||||
{ "DSB2MITE_SWITCHES.PENALTY_CYCLES", 0xAB, 0x02, true },
|
||||
{ "ITLB.ITLB_FLUSH", 0xAE, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_DATA_RD", 0xB0, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_CODE_RD", 0xB0, 0x02, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_RFO", 0xB0, 0x04, true },
|
||||
{ "OFFCORE_REQUESTS.ALL_DATA_RD", 0xB0, 0x08, true },
|
||||
{ "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 0xB0, 0x10, true },
|
||||
{ "OFFCORE_REQUESTS.ALL_REQUESTS", 0xB0, 0x80, true },
|
||||
{ "UOPS_EXECUTED.THREAD", 0xB1, 0x01, true },
|
||||
{ "UOPS_EXECUTED.CORE", 0xB1, 0x02, true },
|
||||
{ "UOPS_EXECUTED.X87", 0xB1, 0x10, true },
|
||||
{ "OFFCORE_REQUESTS_BUFFER.SQ_FULL", 0xB2, 0x01, true },
|
||||
{ "TLB_FLUSH.DTLB_THREAD", 0xBD, 0x01, true },
|
||||
{ "TLB_FLUSH.STLB_ANY", 0xBD, 0x20, true },
|
||||
{ "INST_RETIRED.PREC_DIST", 0xC0, 0x01, true },
|
||||
{ "OTHER_ASSISTS.ANY", 0xC1, 0x3F, true },
|
||||
{ "UOPS_RETIRED.RETIRE_SLOTS", 0xC2, 0x02, true },
|
||||
{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true },
|
||||
{ "MACHINE_CLEARS.SMC", 0xC3, 0x04, true },
|
||||
{ "BR_INST_RETIRED.CONDITIONAL", 0xC4, 0x01, true },
|
||||
{ "BR_INST_RETIRED.NEAR_CALL", 0xC4, 0x02, true },
|
||||
{ "BR_INST_RETIRED.NEAR_RETURN", 0xC4, 0x08, true },
|
||||
{ "BR_INST_RETIRED.NOT_TAKEN", 0xC4, 0x10, true },
|
||||
{ "BR_INST_RETIRED.NEAR_TAKEN", 0xC4, 0x20, true },
|
||||
{ "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0x40, true },
|
||||
{ "BR_MISP_RETIRED.CONDITIONAL", 0xC5, 0x01, true },
|
||||
{ "BR_MISP_RETIRED.NEAR_CALL", 0xC5, 0x02, true },
|
||||
{ "BR_MISP_RETIRED.NEAR_TAKEN", 0xC5, 0x20, true },
|
||||
{ "HW_INTERRUPTS.RECEIVED", 0xCB, 0x01, true },
|
||||
{ "MEM_INST_RETIRED.STLB_MISS_LOADS", 0xD0, 0x11, true },
|
||||
{ "MEM_INST_RETIRED.STLB_MISS_STORES", 0xD0, 0x12, true },
|
||||
{ "MEM_INST_RETIRED.LOCK_LOADS", 0xD0, 0x21, true },
|
||||
{ "MEM_INST_RETIRED.SPLIT_LOADS", 0xD0, 0x41, true },
|
||||
{ "MEM_INST_RETIRED.SPLIT_STORES", 0xD0, 0x42, true },
|
||||
{ "MEM_INST_RETIRED.ALL_LOADS", 0xD0, 0x81, true },
|
||||
{ "MEM_INST_RETIRED.ALL_STORES", 0xD0, 0x82, true },
|
||||
{ "MEM_LOAD_RETIRED.L1_HIT", 0xD1, 0x01, true },
|
||||
{ "MEM_LOAD_RETIRED.L2_HIT", 0xD1, 0x02, true },
|
||||
{ "MEM_LOAD_RETIRED.L3_HIT", 0xD1, 0x04, true },
|
||||
{ "MEM_LOAD_RETIRED.L1_MISS", 0xD1, 0x08, true },
|
||||
{ "MEM_LOAD_RETIRED.L2_MISS", 0xD1, 0x10, true },
|
||||
{ "MEM_LOAD_RETIRED.L3_MISS", 0xD1, 0x20, true },
|
||||
{ "MEM_LOAD_RETIRED.FB_HIT", 0xD1, 0x40, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", 0xD2, 0x01, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", 0xD2, 0x02, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", 0xD2, 0x04, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", 0xD2, 0x08, true },
|
||||
{ "MEM_LOAD_MISC_RETIRED.UC", 0xD4, 0x04, true },
|
||||
{ "BACLEARS.ANY", 0xE6, 0x01, true },
|
||||
{ "L2_TRANS.L2_WB", 0xF0, 0x40, true },
|
||||
{ "L2_LINES_IN.ALL", 0xF1, 0x1F, true },
|
||||
{ "L2_LINES_OUT.SILENT", 0xF2, 0x01, true },
|
||||
{ "L2_LINES_OUT.NON_SILENT", 0xF2, 0x02, true },
|
||||
{ "L2_LINES_OUT.USELESS_HWPF", 0xF2, 0x04, true },
|
||||
{ "SQ_MISC.SPLIT_LOCK", 0xF4, 0x10, true },
|
||||
{ "IDQ_UOPS_NOT_DELIVERED.CORE", 0x9c, 0x01, true },
|
||||
{ "RESOURCE_STALLS.ANY", 0xa2, 0x01, true },
|
||||
{ "RESOURCE_STALLS.SB", 0xa2, 0x08, true },
|
||||
{ "EXE_ACTIVITY.EXE_BOUND_0_PORTS", 0xa6, 0x01, true },
|
||||
{ "EXE_ACTIVITY.1_PORTS_UTIL", 0xa6, 0x02, true },
|
||||
{ "EXE_ACTIVITY.2_PORTS_UTIL", 0xa6, 0x04, true },
|
||||
{ "EXE_ACTIVITY.3_PORTS_UTIL", 0xa6, 0x08, true },
|
||||
{ "EXE_ACTIVITY.4_PORTS_UTIL", 0xa6, 0x10, true },
|
||||
{ "EXE_ACTIVITY.BOUND_ON_STORES", 0xa6, 0x40, true },
|
||||
{ "LSD.UOPS", 0xa8, 0x01, true },
|
||||
{ "DSB2MITE_SWITCHES.PENALTY_CYCLES", 0xab, 0x02, true },
|
||||
{ "ITLB.ITLB_FLUSH", 0xae, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_DATA_RD", 0xb0, 0x01, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_CODE_RD", 0xb0, 0x02, true },
|
||||
{ "OFFCORE_REQUESTS.DEMAND_RFO", 0xb0, 0x04, true },
|
||||
{ "OFFCORE_REQUESTS.ALL_DATA_RD", 0xb0, 0x08, true },
|
||||
{ "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 0xb0, 0x10, true },
|
||||
{ "OFFCORE_REQUESTS.ALL_REQUESTS", 0xb0, 0x80, true },
|
||||
{ "UOPS_EXECUTED.THREAD", 0xb1, 0x01, true },
|
||||
{ "UOPS_EXECUTED.CORE", 0xb1, 0x02, true },
|
||||
{ "UOPS_EXECUTED.X87", 0xb1, 0x10, true },
|
||||
{ "OFFCORE_REQUESTS_BUFFER.SQ_FULL", 0xb2, 0x01, true },
|
||||
{ "TLB_FLUSH.DTLB_THREAD", 0xbd, 0x01, true },
|
||||
{ "TLB_FLUSH.STLB_ANY", 0xbd, 0x20, true },
|
||||
{ "INST_RETIRED.PREC_DIST", 0xc0, 0x01, true },
|
||||
{ "OTHER_ASSISTS.ANY", 0xc1, 0x3f, true },
|
||||
{ "UOPS_RETIRED.RETIRE_SLOTS", 0xc2, 0x02, true },
|
||||
{ "MACHINE_CLEARS.MEMORY_ORDERING", 0xc3, 0x02, true },
|
||||
{ "MACHINE_CLEARS.SMC", 0xc3, 0x04, true },
|
||||
{ "BR_INST_RETIRED.CONDITIONAL", 0xc4, 0x01, true },
|
||||
{ "BR_INST_RETIRED.NEAR_CALL", 0xc4, 0x02, true },
|
||||
{ "BR_INST_RETIRED.NEAR_RETURN", 0xc4, 0x08, true },
|
||||
{ "BR_INST_RETIRED.NOT_TAKEN", 0xc4, 0x10, true },
|
||||
{ "BR_INST_RETIRED.NEAR_TAKEN", 0xc4, 0x20, true },
|
||||
{ "BR_INST_RETIRED.FAR_BRANCH", 0xc4, 0x40, true },
|
||||
{ "BR_MISP_RETIRED.CONDITIONAL", 0xc5, 0x01, true },
|
||||
{ "BR_MISP_RETIRED.NEAR_CALL", 0xc5, 0x02, true },
|
||||
{ "BR_MISP_RETIRED.NEAR_TAKEN", 0xc5, 0x20, true },
|
||||
{ "HW_INTERRUPTS.RECEIVED", 0xcb, 0x01, true },
|
||||
{ "MEM_INST_RETIRED.STLB_MISS_LOADS", 0xd0, 0x11, true },
|
||||
{ "MEM_INST_RETIRED.STLB_MISS_STORES", 0xd0, 0x12, true },
|
||||
{ "MEM_INST_RETIRED.LOCK_LOADS", 0xd0, 0x21, true },
|
||||
{ "MEM_INST_RETIRED.SPLIT_LOADS", 0xd0, 0x41, true },
|
||||
{ "MEM_INST_RETIRED.SPLIT_STORES", 0xd0, 0x42, true },
|
||||
{ "MEM_INST_RETIRED.ALL_LOADS", 0xd0, 0x81, true },
|
||||
{ "MEM_INST_RETIRED.ALL_STORES", 0xd0, 0x82, true },
|
||||
{ "MEM_LOAD_RETIRED.L1_HIT", 0xd1, 0x01, true },
|
||||
{ "MEM_LOAD_RETIRED.L2_HIT", 0xd1, 0x02, true },
|
||||
{ "MEM_LOAD_RETIRED.L3_HIT", 0xd1, 0x04, true },
|
||||
{ "MEM_LOAD_RETIRED.L1_MISS", 0xd1, 0x08, true },
|
||||
{ "MEM_LOAD_RETIRED.L2_MISS", 0xd1, 0x10, true },
|
||||
{ "MEM_LOAD_RETIRED.L3_MISS", 0xd1, 0x20, true },
|
||||
{ "MEM_LOAD_RETIRED.FB_HIT", 0xd1, 0x40, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", 0xd2, 0x01, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", 0xd2, 0x02, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", 0xd2, 0x04, true },
|
||||
{ "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", 0xd2, 0x08, true },
|
||||
{ "MEM_LOAD_MISC_RETIRED.UC", 0xd4, 0x04, true },
|
||||
{ "BACLEARS.ANY", 0xe6, 0x01, true },
|
||||
{ "L2_TRANS.L2_WB", 0xf0, 0x40, true },
|
||||
{ "L2_LINES_IN.ALL", 0xf1, 0x1f, true },
|
||||
{ "L2_LINES_OUT.SILENT", 0xf2, 0x01, true },
|
||||
{ "L2_LINES_OUT.NON_SILENT", 0xf2, 0x02, true },
|
||||
{ "L2_LINES_OUT.USELESS_HWPF", 0xf2, 0x04, true },
|
||||
{ "SQ_MISC.SPLIT_LOCK", 0xf4, 0x10, true },
|
||||
};
|
||||
|
||||
static struct event_table intel_skylake_kabylake = {
|
||||
|
|
@ -553,24 +553,24 @@ init_intel_generic(void)
|
|||
if (CPUID_TO_FAMILY(eax) == 6) {
|
||||
switch (CPUID_TO_MODEL(eax)) {
|
||||
case 0x37: /* Silvermont (Bay Trail) */
|
||||
case 0x4A: /* Silvermont (Tangier) */
|
||||
case 0x4C: /* Airmont (Braswell, Cherry Trail) */
|
||||
case 0x4D: /* Silvermont (Avoton, Rangeley) */
|
||||
case 0x5A: /* Silvermont (Anniedale) */
|
||||
case 0x5D: /* Silvermont (SoFIA) */
|
||||
case 0x4a: /* Silvermont (Tangier) */
|
||||
case 0x4c: /* Airmont (Braswell, Cherry Trail) */
|
||||
case 0x4d: /* Silvermont (Avoton, Rangeley) */
|
||||
case 0x5a: /* Silvermont (Anniedale) */
|
||||
case 0x5d: /* Silvermont (SoFIA) */
|
||||
table->next = init_intel_silvermont_airmont();
|
||||
break;
|
||||
case 0x5C: /* Goldmont (Apollo Lake) */
|
||||
case 0x5F: /* Goldmont (Denverton) */
|
||||
case 0x5c: /* Goldmont (Apollo Lake) */
|
||||
case 0x5f: /* Goldmont (Denverton) */
|
||||
table->next = init_intel_goldmont();
|
||||
break;
|
||||
case 0x7A: /* Goldmont Plus (Gemini Lake) */
|
||||
case 0x7a: /* Goldmont Plus (Gemini Lake) */
|
||||
table->next = init_intel_goldmontplus();
|
||||
break;
|
||||
case 0x4E: /* Skylake */
|
||||
case 0x5E: /* Skylake */
|
||||
case 0x8E: /* Kabylake */
|
||||
case 0x9E: /* Kabylake */
|
||||
case 0x4e: /* Skylake */
|
||||
case 0x5e: /* Skylake */
|
||||
case 0x8e: /* Kabylake */
|
||||
case 0x9e: /* Kabylake */
|
||||
table->next = init_intel_skylake_kabylake();
|
||||
break;
|
||||
}
|
||||
|
|
@ -613,10 +613,10 @@ static struct name_to_event amd_f10h_names[] = {
|
|||
{ "l1cache-writeback-exclusive",0x44, 0x04, true },
|
||||
{ "l1cache-writeback-owner", 0x44, 0x08, true },
|
||||
{ "l1cache-writeback-modified", 0x44, 0x10, true },
|
||||
{ "l1DTLB-hit-all", 0x4D, 0x07, true },
|
||||
{ "l1DTLB-hit-4Kpage", 0x4D, 0x01, true },
|
||||
{ "l1DTLB-hit-2Mpage", 0x4D, 0x02, true },
|
||||
{ "l1DTLB-hit-1Gpage", 0x4D, 0x04, true },
|
||||
{ "l1DTLB-hit-all", 0x4d, 0x07, true },
|
||||
{ "l1DTLB-hit-4Kpage", 0x4d, 0x01, true },
|
||||
{ "l1DTLB-hit-2Mpage", 0x4d, 0x02, true },
|
||||
{ "l1DTLB-hit-1Gpage", 0x4d, 0x04, true },
|
||||
{ "l1DTLB-miss-all", 0x45, 0x07, true },
|
||||
{ "l1DTLB-miss-4Kpage", 0x45, 0x01, true },
|
||||
{ "l1DTLB-miss-2Mpage", 0x45, 0x02, true },
|
||||
|
|
@ -635,26 +635,26 @@ static struct name_to_event amd_f10h_names[] = {
|
|||
{ "ins-refill-l2", 0x82, 0x00, true },
|
||||
{ "ins-refill-sys", 0x83, 0x00, true },
|
||||
{ "ins-fetch-stall", 0x87, 0x00, true },
|
||||
{ "ins-retired", 0xC0, 0x00, true },
|
||||
{ "ins-empty", 0xD0, 0x00, true },
|
||||
{ "ops-retired", 0xC1, 0x00, true },
|
||||
{ "branch-retired", 0xC2, 0x00, true },
|
||||
{ "branch-miss-retired", 0xC3, 0x00, true },
|
||||
{ "branch-taken-retired", 0xC4, 0x00, true },
|
||||
{ "branch-taken-miss-retired", 0xC5, 0x00, true },
|
||||
{ "branch-far-retired", 0xC6, 0x00, true },
|
||||
{ "branch-resync-retired", 0xC7, 0x00, true },
|
||||
{ "branch-near-retired", 0xC8, 0x00, true },
|
||||
{ "branch-near-miss-retired", 0xC9, 0x00, true },
|
||||
{ "branch-indirect-miss-retired", 0xCA, 0x00, true },
|
||||
{ "int-hw", 0xCF, 0x00, true },
|
||||
{ "int-cycles-masked", 0xCD, 0x00, true },
|
||||
{ "int-cycles-masked-pending", 0xCE, 0x00, true },
|
||||
{ "fpu-exceptions", 0xDB, 0x00, true },
|
||||
{ "break-match0", 0xDC, 0x00, true },
|
||||
{ "break-match1", 0xDD, 0x00, true },
|
||||
{ "break-match2", 0xDE, 0x00, true },
|
||||
{ "break-match3", 0xDF, 0x00, true },
|
||||
{ "ins-retired", 0xc0, 0x00, true },
|
||||
{ "ins-empty", 0xd0, 0x00, true },
|
||||
{ "ops-retired", 0xc1, 0x00, true },
|
||||
{ "branch-retired", 0xc2, 0x00, true },
|
||||
{ "branch-miss-retired", 0xc3, 0x00, true },
|
||||
{ "branch-taken-retired", 0xc4, 0x00, true },
|
||||
{ "branch-taken-miss-retired", 0xc5, 0x00, true },
|
||||
{ "branch-far-retired", 0xc6, 0x00, true },
|
||||
{ "branch-resync-retired", 0xc7, 0x00, true },
|
||||
{ "branch-near-retired", 0xc8, 0x00, true },
|
||||
{ "branch-near-miss-retired", 0xc9, 0x00, true },
|
||||
{ "branch-indirect-miss-retired", 0xca, 0x00, true },
|
||||
{ "int-hw", 0xcf, 0x00, true },
|
||||
{ "int-cycles-masked", 0xcd, 0x00, true },
|
||||
{ "int-cycles-masked-pending", 0xce, 0x00, true },
|
||||
{ "fpu-exceptions", 0xdb, 0x00, true },
|
||||
{ "break-match0", 0xdc, 0x00, true },
|
||||
{ "break-match1", 0xdd, 0x00, true },
|
||||
{ "break-match2", 0xde, 0x00, true },
|
||||
{ "break-match3", 0xdf, 0x00, true },
|
||||
};
|
||||
|
||||
static struct event_table amd_f10h = {
|
||||
|
|
@ -796,31 +796,31 @@ static struct name_to_event amd_f17h_names[] = {
|
|||
{ "IcCacheFillL2", 0x82, 0x00, true },
|
||||
{ "IcCacheFillSys", 0x83, 0x00, true },
|
||||
{ "IcFetchStall", 0x87, __BITS(2,0), true },
|
||||
{ "IcCacheInval", 0x8C, __BITS(1,0), true },
|
||||
{ "IcCacheInval", 0x8c, __BITS(1,0), true },
|
||||
{ "BpL1TlbMissL2Hit", 0x84, 0x00, true },
|
||||
{ "BpL1TlbMissL2Miss", 0x85, 0x00, true },
|
||||
{ "BpSnpReSync", 0x86, 0x00, true },
|
||||
{ "BpL1BTBCorrect", 0x8A, 0x00, true },
|
||||
{ "BpL2BTBCorrect", 0x8B, 0x00, true },
|
||||
{ "BpL1BTBCorrect", 0x8a, 0x00, true },
|
||||
{ "BpL2BTBCorrect", 0x8b, 0x00, true },
|
||||
{ "BpTlbRel", 0x99, 0x00, true },
|
||||
{ "ExRetInstr", 0xC0, 0x00, true },
|
||||
{ "ExRetCops", 0xC1, 0x00, true },
|
||||
{ "ExRetBrn", 0xC2, 0x00, true },
|
||||
{ "ExRetBrnMisp", 0xC3, 0x00, true },
|
||||
{ "ExRetBrnTkn", 0xC4, 0x00, true },
|
||||
{ "ExRetBrnTknMisp", 0xC5, 0x00, true },
|
||||
{ "ExRetBrnFar", 0xC6, 0x00, true },
|
||||
{ "ExRetBrnResync", 0xC7, 0x00, true },
|
||||
{ "ExRetBrnIndMisp", 0xCA, 0x00, true },
|
||||
{ "ExRetNearRet", 0xC8, 0x00, true },
|
||||
{ "ExRetNearRetMispred", 0xC9, 0x00, true },
|
||||
{ "ExRetMmxFpInstr@X87", 0xCB, __BIT(0), true },
|
||||
{ "ExRetMmxFpInstr@Mmx", 0xCB, __BIT(1), true },
|
||||
{ "ExRetMmxFpInstr@Sse", 0xCB, __BIT(2), true },
|
||||
{ "ExRetCond", 0xD1, 0x00, true },
|
||||
{ "ExRetCondMisp", 0xD2, 0x00, true },
|
||||
{ "ExDivBusy", 0xD3, 0x00, true },
|
||||
{ "ExDivCount", 0xD4, 0x00, true },
|
||||
{ "ExRetInstr", 0xc0, 0x00, true },
|
||||
{ "ExRetCops", 0xc1, 0x00, true },
|
||||
{ "ExRetBrn", 0xc2, 0x00, true },
|
||||
{ "ExRetBrnMisp", 0xc3, 0x00, true },
|
||||
{ "ExRetBrnTkn", 0xc4, 0x00, true },
|
||||
{ "ExRetBrnTknMisp", 0xc5, 0x00, true },
|
||||
{ "ExRetBrnFar", 0xc6, 0x00, true },
|
||||
{ "ExRetBrnResync", 0xc7, 0x00, true },
|
||||
{ "ExRetBrnIndMisp", 0xca, 0x00, true },
|
||||
{ "ExRetNearRet", 0xc8, 0x00, true },
|
||||
{ "ExRetNearRetMispred", 0xc9, 0x00, true },
|
||||
{ "ExRetMmxFpInstr@X87", 0xcb, __BIT(0), true },
|
||||
{ "ExRetMmxFpInstr@Mmx", 0xcb, __BIT(1), true },
|
||||
{ "ExRetMmxFpInstr@Sse", 0xcb, __BIT(2), true },
|
||||
{ "ExRetCond", 0xd1, 0x00, true },
|
||||
{ "ExRetCondMisp", 0xd2, 0x00, true },
|
||||
{ "ExDivBusy", 0xd3, 0x00, true },
|
||||
{ "ExDivCount", 0xd4, 0x00, true },
|
||||
};
|
||||
|
||||
static struct event_table amd_f17h = {
|
||||
|
|
|
|||
Loading…
Reference in New Issue