From f1bbc2447aa0dc5a9a97921d8d7f82c83c74ae91 Mon Sep 17 00:00:00 2001 From: kiyohara Date: Tue, 21 Aug 2007 11:39:11 +0000 Subject: [PATCH] The initarm() should initialize GPIO. We must not initialize GPIO in foo_attach() of the each drivers. And, it is necessary to confirm whether to be initialized in foo_match(). To avoid a dangerous configuring on the evaluation boards. --- sys/arch/arm/xscale/pxa2x0_ac97.c | 20 +- sys/arch/arm/xscale/pxa2x0_com.c | 24 +- sys/arch/arm/xscale/pxa2x0_gpio.c | 281 +++++++++++++++++++++- sys/arch/arm/xscale/pxa2x0_gpio.h | 27 +++ sys/arch/arm/xscale/pxa2x0_i2c.c | 11 +- sys/arch/arm/xscale/pxa2x0_i2s.c | 10 +- sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c | 24 +- sys/arch/evbarm/gumstix/gxio.c | 42 ++-- sys/arch/evbarm/gumstix/gxpcic.c | 37 +-- sys/arch/evbarm/lubbock/lubbock_machdep.c | 29 ++- sys/arch/evbarm/viper/viper_machdep.c | 23 +- sys/arch/zaurus/zaurus/machdep.c | 93 +++++-- 12 files changed, 500 insertions(+), 121 deletions(-) diff --git a/sys/arch/arm/xscale/pxa2x0_ac97.c b/sys/arch/arm/xscale/pxa2x0_ac97.c index 35e2112164aa..b3161fee21d1 100644 --- a/sys/arch/arm/xscale/pxa2x0_ac97.c +++ b/sys/arch/arm/xscale/pxa2x0_ac97.c @@ -1,4 +1,4 @@ -/* $NetBSD: pxa2x0_ac97.c,v 1.5 2007/03/04 05:59:38 christos Exp $ */ +/* $NetBSD: pxa2x0_ac97.c,v 1.6 2007/08/21 11:39:11 kiyohara Exp $ */ /* * Copyright (c) 2003, 2005 Wasabi Systems, Inc. @@ -53,6 +53,7 @@ #include #include +#include #include #include #include @@ -232,11 +233,23 @@ static int pxaacu_match(struct device *parent, struct cfdata *cf, void *aux) { struct pxaip_attach_args *pxa = aux; + struct pxa2x0_gpioconf *gpioconf; + u_int gpio; + int i; if (pxa->pxa_addr != PXA2X0_AC97_BASE || pxa->pxa_intr != PXA2X0_INT_AC97) return (0); + gpioconf = CPU_IS_PXA250 ? pxa25x_pxaacu_gpioconf : + pxa27x_pxaacu_gpioconf; + for (i = 0; gpioconf[i].pin != -1; i++) { + gpio = pxa2x0_gpio_get_function(gpioconf[i].pin); + if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) || + GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value)) + return (0); + } + pxa->pxa_size = PXA2X0_AC97_SIZE; return (1); @@ -267,11 +280,6 @@ pxaacu_attach(struct device *parent, struct device *self, void *aux) /* Make sure the AC97 clock is enabled */ pxa2x0_clkman_config(CKEN_AC97, true); delay(100); - pxa2x0_gpio_set_function(31, GPIO_CLR | GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(30, GPIO_CLR | GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(28, GPIO_CLR | GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(29, GPIO_CLR | GPIO_ALT_FN_1_IN); - delay(100); /* Do a cold reset */ acu_reg_write(sc, AC97_GCR, 0); diff --git a/sys/arch/arm/xscale/pxa2x0_com.c b/sys/arch/arm/xscale/pxa2x0_com.c index 774d4d54242d..bf65bdd392b1 100644 --- a/sys/arch/arm/xscale/pxa2x0_com.c +++ b/sys/arch/arm/xscale/pxa2x0_com.c @@ -1,4 +1,4 @@ -/* $NetBSD: pxa2x0_com.c,v 1.7 2006/12/10 12:46:48 kiyohara Exp $ */ +/* $NetBSD: pxa2x0_com.c,v 1.8 2007/08/21 11:39:11 kiyohara Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -36,7 +36,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pxa2x0_com.c,v 1.7 2006/12/10 12:46:48 kiyohara Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pxa2x0_com.c,v 1.8 2007/08/21 11:39:11 kiyohara Exp $"); #include "opt_com.h" @@ -55,8 +55,10 @@ __KERNEL_RCSID(0, "$NetBSD: pxa2x0_com.c,v 1.7 2006/12/10 12:46:48 kiyohara Exp #include #include +#include #include #include +#include #include "locators.h" @@ -72,32 +74,48 @@ pxauart_match(struct device *parent, struct cfdata *cf, void *aux) struct pxaip_attach_args *pxa = aux; bus_space_tag_t bt = &pxa2x0_a4x_bs_tag; /* XXX: This sucks */ bus_space_handle_t bh; - int rv; + struct pxa2x0_gpioconf *gpioconf; + u_int gpio; + int rv, i; switch (pxa->pxa_addr) { case PXA2X0_FFUART_BASE: if (pxa->pxa_intr != PXA2X0_INT_FFUART) return (0); + gpioconf = CPU_IS_PXA250 ? pxa25x_com_ffuart_gpioconf : + pxa27x_com_ffuart_gpioconf; break; case PXA2X0_STUART_BASE: if (pxa->pxa_intr != PXA2X0_INT_STUART) return (0); + gpioconf = CPU_IS_PXA250 ? pxa25x_com_stuart_gpioconf : + pxa27x_com_stuart_gpioconf; break; case PXA2X0_BTUART_BASE: /* XXX: Config file option ... */ if (pxa->pxa_intr != PXA2X0_INT_BTUART) return (0); + gpioconf = CPU_IS_PXA250 ? pxa25x_com_btuart_gpioconf : + pxa27x_com_btuart_gpioconf; break; case PXA2X0_HWUART_BASE: if (pxa->pxa_intr != PXA2X0_INT_HWUART) return (0); + gpioconf = CPU_IS_PXA250 ? pxa25x_com_hwuart_gpioconf : + pxa27x_com_hwuart_gpioconf; break; default: return (0); } + for (i = 0; gpioconf[i].pin != -1; i++) { + gpio = pxa2x0_gpio_get_function(gpioconf[i].pin); + if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) || + GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value)) + return (0); + } pxa->pxa_size = 0x20; diff --git a/sys/arch/arm/xscale/pxa2x0_gpio.c b/sys/arch/arm/xscale/pxa2x0_gpio.c index 5bb2d831a22c..e09a9edbc355 100644 --- a/sys/arch/arm/xscale/pxa2x0_gpio.c +++ b/sys/arch/arm/xscale/pxa2x0_gpio.c @@ -1,4 +1,4 @@ -/* $NetBSD: pxa2x0_gpio.c,v 1.7 2006/12/17 16:03:33 peter Exp $ */ +/* $NetBSD: pxa2x0_gpio.c,v 1.8 2007/08/21 11:39:11 kiyohara Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -36,7 +36,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio.c,v 1.7 2006/12/17 16:03:33 peter Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio.c,v 1.8 2007/08/21 11:39:11 kiyohara Exp $"); #include "opt_pxa2x0_gpio.h" @@ -670,3 +670,280 @@ pxa2x0_gpio_set_intr_level(u_int gpio, int level) splx(s); } + + +#if defined(CPU_XSCALE_PXA250) +/* + * Configurations of GPIO for PXA25x + */ +struct pxa2x0_gpioconf pxa25x_com_btuart_gpioconf[] = { + { 42, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BTRXD */ + { 43, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* BTTXD */ + +#if 0 /* optional */ + { 44, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BTCTS */ + { 45, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* BTRTS */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_com_ffuart_gpioconf[] = { + { 34, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + +#if 0 /* optional */ + { 35, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* CTS */ + { 36, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* DCD */ + { 37, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* DSR */ + { 38, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* RI */ +#endif + + { 39, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* FFTXD */ + +#if 0 /* optional */ + { 40, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* DTR */ + { 41, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* RTS */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_com_hwuart_gpioconf[] = { +#if 0 /* We can select and/or. */ + { 42, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* HWRXD */ + { 49, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* HWRXD */ + + { 43, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* HWTXD */ + { 48, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* HWTXD */ + +#if 0 /* optional */ + { 44, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* HWCST */ + { 51, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* HWCST */ + + { 45, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* HWRST */ + { 52, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* HWRST */ +#endif +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_com_stuart_gpioconf[] = { + { 46, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* RXD */ + { 47, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* TXD */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_i2c_gpioconf[] = { + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_i2s_gpioconf[] = { + { 28, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* BITCLK */ + { 29, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* SDATA_IN */ + { 30, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* SDATA_OUT */ + { 31, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* SYNC */ + { 32, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* SYSCLK */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_pcic_gpioconf[] = { + { 48, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPOE */ + { 49, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPWE */ + { 50, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPIOR */ + { 51, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPIOW */ + +#if 0 /* We can select and/or. */ + { 52, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPCE1 */ + { 53, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPCE2 */ +#endif + + { 54, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* pSKTSEL */ + { 55, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPREG */ + { 56, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* nPWAIT */ + { 57, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* nIOIS16 */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_pxaacu_gpioconf[] = { + { 28, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BITCLK */ + { 30, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* SDATA_OUT */ + { 31, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* SYNC */ + +#if 0 /* We can select and/or. */ + { 29, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */ + { 32, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDATA_IN1 */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa25x_pxamci_gpioconf[] = { +#if 0 /* We can select and/or. */ + { 6, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCLK */ + { 53, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCLK */ + { 54, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCLK */ + + { 8, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS0 */ + { 34, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* MMCCS0 */ + { 67, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS0 */ + + { 9, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS1 */ + { 39, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS1 */ + { 68, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS1 */ +#endif + + { -1 } +}; +#endif + +#if defined(CPU_XSCALE_PXA270) +/* + * Configurations of GPIO for PXA27x + */ +struct pxa2x0_gpioconf pxa27x_com_btuart_gpioconf[] = { + { 42, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BTRXD */ + { 43, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* BTTXD */ + +#if 0 /* optional */ + { 44, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BTCTS */ + { 45, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* BTRTS */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_com_ffuart_gpioconf[] = { +#if 0 /* We can select and/or. */ + { 16, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFTXD */ + { 37, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFTXD */ + { 39, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* FFTXD */ + { 83, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* FFTXD */ + { 99, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFTXD */ + + { 19, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFRXD */ + { 33, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 34, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 41, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 53, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 85, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 96, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFRXD */ + { 102, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFRXD */ + + { 9, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFCTS */ + { 26, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFCTS */ + { 35, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFCTS */ + { 100, GPIO_CLR | GPIO_ALT_FN_3_IN }, /* FFCTS */ + + { 27, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFRTS */ + { 41, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* FFRTS */ + { 83, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFRTS */ + { 98, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFRTS */ + + { 40, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* FFDTR */ + { 82, GPIO_CLR | GPIO_ALT_FN_3_OUT }, /* FFDTR */ + + { 36, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFDCD */ + + { 33, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* FFDSR */ + { 37, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFDSR */ + + { 38, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* FFRI */ +#endif + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_com_hwuart_gpioconf[] = { + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_com_stuart_gpioconf[] = { + { 46, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* STD_RXD */ + { 47, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* STD_TXD */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_i2c_gpioconf[] = { + { 117, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SCL */ + { 118, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDA */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_i2s_gpioconf[] = { + { 28, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* I2S_BITCLK */ + { 29, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* I2S_SDATA_IN */ + { 30, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* I2S_SDATA_OUT */ + { 31, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* I2S_SYNC */ + { 113, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* I2S_SYSCLK */ + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_pcic_gpioconf[] = { + { 48, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPOE */ + { 49, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPWE */ + { 50, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPIOR */ + { 51, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPIOW */ + { 55, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPREG */ + { 56, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* nPWAIT */ + { 57, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* nIOIS16 */ + { 104, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* pSKTSEL */ + +#if 0 /* We can select and/or. */ + { 85, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* nPCE1 */ + { 86, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* nPCE1 */ + { 102, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* nPCE1 */ + + { 54, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* nPCE2 */ + { 78, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* nPCE2 */ + { 105, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* nPCE2 */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_pxaacu_gpioconf[] = { + { 28, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* BITCLK */ + { 30, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* SDATA_OUT */ + +#if 0 /* We can select and/or. */ + { 31, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* SYNC */ + { 94, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* SYNC */ + + { 29, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */ + { 116, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* SDATA_IN0 */ + + { 32, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDATA_IN1 */ + { 99, GPIO_CLR | GPIO_ALT_FN_2_IN }, /* SDATA_IN1 */ + + { 95, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* RESET_n */ + { 113, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* RESET_n */ +#endif + + { -1 } +}; + +struct pxa2x0_gpioconf pxa27x_pxamci_gpioconf[] = { + { 32, GPIO_CLR | GPIO_ALT_FN_2_OUT }, /* MMCLK */ + { 112, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* MMCMD */ + { 92, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* MMDAT<0> */ + +#if 0 /* optional */ + { 109, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* MMDAT<1> */ + { 110, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* MMDAT<2>/MMCCS<0> */ + { 111, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* MMDAT<3>/MMCCS<1> */ +#endif + + { -1 } +}; +#endif + +void +pxa2x0_gpio_config(struct pxa2x0_gpioconf **conflist) +{ + int i, j; + + for (i = 0; conflist[i] != NULL; i++) + for (j = 0; conflist[i][j].pin != -1; j++) + pxa2x0_gpio_set_function(conflist[i][j].pin, + conflist[i][j].value); +} diff --git a/sys/arch/arm/xscale/pxa2x0_gpio.h b/sys/arch/arm/xscale/pxa2x0_gpio.h index 3152d3890b61..6995c208498c 100644 --- a/sys/arch/arm/xscale/pxa2x0_gpio.h +++ b/sys/arch/arm/xscale/pxa2x0_gpio.h @@ -67,4 +67,31 @@ extern void pxa2x0_gpio_intr_mask(void *); extern void pxa2x0_gpio_intr_unmask(void *); extern void pxa2x0_gpio_set_intr_level(u_int, int); + +struct pxa2x0_gpioconf { + int pin; + u_int value; +}; +void pxa2x0_gpio_config(struct pxa2x0_gpioconf **); + +extern struct pxa2x0_gpioconf pxa25x_com_ffuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_com_stuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_com_btuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_com_hwuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_i2c_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_i2s_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_pcic_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_pxaacu_gpioconf[]; +extern struct pxa2x0_gpioconf pxa25x_pxamci_gpioconf[]; + +extern struct pxa2x0_gpioconf pxa27x_com_ffuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_com_stuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_com_btuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_com_hwuart_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_i2c_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_i2s_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_pcic_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_pxaacu_gpioconf[]; +extern struct pxa2x0_gpioconf pxa27x_pxamci_gpioconf[]; + #endif /* _PXA2X0_GPIO_H */ diff --git a/sys/arch/arm/xscale/pxa2x0_i2c.c b/sys/arch/arm/xscale/pxa2x0_i2c.c index 9e7439ec8d4b..76515cbf5dc4 100644 --- a/sys/arch/arm/xscale/pxa2x0_i2c.c +++ b/sys/arch/arm/xscale/pxa2x0_i2c.c @@ -1,4 +1,4 @@ -/* $NetBSD: pxa2x0_i2c.c,v 1.1 2006/12/17 16:03:33 peter Exp $ */ +/* $NetBSD: pxa2x0_i2c.c,v 1.2 2007/08/21 11:39:11 kiyohara Exp $ */ /* $OpenBSD: pxa2x0_i2c.c,v 1.2 2005/05/26 03:52:07 pascoe Exp $ */ /* @@ -18,7 +18,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2c.c,v 1.1 2006/12/17 16:03:33 peter Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2c.c,v 1.2 2007/08/21 11:39:11 kiyohara Exp $"); #include #include @@ -45,13 +45,6 @@ pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc) bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size, BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); - /* - * Configure the alternate functions. The _IN is arbitrary, as the - * direction is managed by the I2C unit when comms are in progress. - */ - pxa2x0_gpio_set_function(117, GPIO_ALT_FN_1_IN); /* SCL */ - pxa2x0_gpio_set_function(118, GPIO_ALT_FN_1_IN); /* SDA */ - pxa2x0_i2c_init(sc); return 0; diff --git a/sys/arch/arm/xscale/pxa2x0_i2s.c b/sys/arch/arm/xscale/pxa2x0_i2s.c index 0dd4ebb5bb45..8811811c35a3 100644 --- a/sys/arch/arm/xscale/pxa2x0_i2s.c +++ b/sys/arch/arm/xscale/pxa2x0_i2s.c @@ -1,4 +1,4 @@ -/* $NetBSD: pxa2x0_i2s.c,v 1.5 2007/06/26 15:08:42 nonaka Exp $ */ +/* $NetBSD: pxa2x0_i2s.c,v 1.6 2007/08/21 11:39:11 kiyohara Exp $ */ /* $OpenBSD: pxa2x0_i2s.c,v 1.7 2006/04/04 11:45:40 pascoe Exp $ */ /* @@ -18,7 +18,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2s.c,v 1.5 2007/06/26 15:08:42 nonaka Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2s.c,v 1.6 2007/08/21 11:39:11 kiyohara Exp $"); #include #include @@ -82,12 +82,6 @@ pxa2x0_i2s_attach_sub(struct pxa2x0_i2s_softc *sc) bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size, BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); - pxa2x0_gpio_set_function(28, GPIO_ALT_FN_1_OUT); /* I2S_BITCLK */ - pxa2x0_gpio_set_function(113, GPIO_ALT_FN_1_OUT); /* I2S_SYSCLK */ - pxa2x0_gpio_set_function(31, GPIO_ALT_FN_1_OUT); /* I2S_SYNC */ - pxa2x0_gpio_set_function(30, GPIO_ALT_FN_1_OUT); /* I2S_SDATA_OUT */ - pxa2x0_gpio_set_function(29, GPIO_ALT_FN_2_IN); /* I2S_SDATA_IN */ - pxa2x0_i2s_init(sc); return 0; diff --git a/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c b/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c index 7f2f379bfa62..345e4f4631e9 100644 --- a/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c +++ b/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: g42xxeb_machdep.c,v 1.10 2006/11/24 22:04:22 wiz Exp $ */ +/* $NetBSD: g42xxeb_machdep.c,v 1.11 2007/08/21 11:39:11 kiyohara Exp $ */ /* * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation. @@ -261,6 +261,23 @@ bs_protos(bs_notimpl); int comcnspeed = CONSPEED; int comcnmode = CONMODE; +static struct pxa2x0_gpioconf boarddep_gpioconf[] = { + { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ + { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ + + { -1 } +}; +static struct pxa2x0_gpioconf *g42xxeb_gpioconf[] = { + pxa25x_com_btuart_gpioconf, + pxa25x_com_ffuart_gpioconf, +#if 0 + pxa25x_com_stuart_gpioconf, + pxa25x_pxaacu_gpioconf, +#endif + boarddep_gpioconf, + NULL +}; + /* * void cpu_reboot(int howto, char *bootstr) * @@ -498,10 +515,7 @@ initarm(void *arg) /* setup GPIO for BTUART, in case bootloader doesn't take care of it */ pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE); - pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); + pxa2x0_gpio_config(g42xxeb_gpioconf); LEDSTEP(); diff --git a/sys/arch/evbarm/gumstix/gxio.c b/sys/arch/evbarm/gumstix/gxio.c index 57544647175d..28a9c833cc41 100644 --- a/sys/arch/evbarm/gumstix/gxio.c +++ b/sys/arch/evbarm/gumstix/gxio.c @@ -1,4 +1,4 @@ -/* $NetBSD: gxio.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $ */ +/* $NetBSD: gxio.c,v 1.5 2007/08/21 11:39:11 kiyohara Exp $ */ /* * Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation. * All rights reserved. @@ -31,7 +31,7 @@ * POSSIBILITY OF SUCH DAMAGE. */ #include -__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $"); +__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.5 2007/08/21 11:39:11 kiyohara Exp $"); #include "opt_gxio.h" @@ -52,10 +52,6 @@ __KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $"); #include "locators.h" -struct gpioconf { - int pin; - u_int value; -}; struct gxioconf { const char *name; void (*config)(void); @@ -82,21 +78,13 @@ CFATTACH_DECL( char busheader[MAX_BOOT_STRING]; -struct gpioconf gpioconf[] = { +static struct pxa2x0_gpioconf boarddep_gpioconf[] = { /* Bluetooth module configuration */ { 7, GPIO_OUT | GPIO_SET }, /* power on */ { 12, GPIO_ALT_FN_1_OUT }, /* 32kHz out. required by SingleStone */ /* AC97 configuration */ -#if 1 - /* this configuration set by pxaacu_attach()::pxa2x0_ac97.c */ -#else - /* Don't reorder */ - { 31, GPIO_ALT_FN_2_OUT }, /* SYNC */ - { 30, GPIO_ALT_FN_2_OUT }, /* SDATA_OUT */ - { 28, GPIO_ALT_FN_1_IN }, /* BITCLK */ - { 29, GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */ -#endif + { 29, GPIO_CLR | GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */ /* FFUART configuration : is connected only TXD/RXD */ { 34, GPIO_ALT_FN_1_IN }, /* FFRXD */ @@ -104,8 +92,6 @@ struct gpioconf gpioconf[] = { #ifndef GXIO_BLUETOOTH_ON_HWUART /* BTUART configuration */ - { 42, GPIO_ALT_FN_1_IN }, /* BTRXD */ - { 43, GPIO_ALT_FN_2_OUT }, /* BTTXD */ { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ #else @@ -116,10 +102,6 @@ struct gpioconf gpioconf[] = { { 45, GPIO_ALT_FN_3_OUT }, /* HWRST */ #endif - /* STUART configuration : is connected only TXD/RXD */ - { 46, GPIO_ALT_FN_2_IN }, /* RXD */ - { 47, GPIO_ALT_FN_1_OUT }, /* TXD */ - #ifndef GXIO_BLUETOOTH_ON_HWUART /* HWUART configuration */ { 48, GPIO_ALT_FN_1_OUT }, /* HWTXD */ @@ -220,14 +202,24 @@ gxioprint(void *aux, const char *name) void gxio_config_pin() { - int i; + struct pxa2x0_gpioconf *gumstix_gpioconf[] = { + pxa25x_com_ffuart_gpioconf, + pxa25x_com_stuart_gpioconf, +#ifndef GXIO_BLUETOOTH_ON_HWUART + pxa25x_com_btuart_gpioconf, +#endif + pxa25x_com_hwuart_gpioconf, + pxa25x_i2c_gpioconf, + pxa25x_pxaacu_gpioconf, + boarddep_gpioconf, + NULL + }; /* XXX: turn off for power of bluetooth module */ pxa2x0_gpio_set_function(7, GPIO_OUT | GPIO_CLR); delay(100); - for (i = 0; gpioconf[i].pin != -1; i++) - pxa2x0_gpio_set_function(gpioconf[i].pin, gpioconf[i].value); + pxa2x0_gpio_config(gumstix_gpioconf); } void diff --git a/sys/arch/evbarm/gumstix/gxpcic.c b/sys/arch/evbarm/gumstix/gxpcic.c index 5a47ad20c5a4..009a78970741 100644 --- a/sys/arch/evbarm/gumstix/gxpcic.c +++ b/sys/arch/evbarm/gumstix/gxpcic.c @@ -1,4 +1,4 @@ -/* $NetBSD: gxpcic.c,v 1.4 2007/04/20 13:00:08 kiyohara Exp $ */ +/* $NetBSD: gxpcic.c,v 1.5 2007/08/21 11:39:12 kiyohara Exp $ */ /* * Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation. * All rights reserved. @@ -78,8 +78,10 @@ #include #include +#include #include #include +#include #include #include @@ -137,37 +139,22 @@ static struct { static int gxpcic_match(struct device *parent, struct cfdata *cf, void *aux) { - struct { - int gpio; - u_int fn; - } pcic_gpiomodes[] = { - { 48, GPIO_ALT_FN_2_OUT }, /* nPOE */ - { 49, GPIO_ALT_FN_2_OUT }, /* nPWE */ - { 50, GPIO_ALT_FN_2_OUT }, /* nPIOR */ - { 51, GPIO_ALT_FN_2_OUT }, /* nPIOW */ - { 52, GPIO_ALT_FN_2_OUT }, /* nPCE1 */ - { 53, GPIO_ALT_FN_2_OUT }, /* nPCE2 */ - { 54, GPIO_ALT_FN_2_OUT }, /* pSKTSEL */ - { 55, GPIO_ALT_FN_2_OUT }, /* nPREG */ - { 56, GPIO_ALT_FN_1_IN }, /* nPWAIT */ - { 57, GPIO_ALT_FN_1_IN }, /* nIOIS16 */ - { -1 } - }; + struct pxa2x0_gpioconf *gpioconf; u_int reg; int i; /* * Check GPIO configuration. If you use these, it is sure already - * to have been set by gxio. + * to have been set by gxio. */ - for (i = 0; pcic_gpiomodes[i].gpio != -1; i++) { - reg = pxa2x0_gpio_get_function(pcic_gpiomodes[i].gpio); - if (GPIO_FN(reg) != GPIO_FN(pcic_gpiomodes[i].fn) || - GPIO_FN_IS_OUT(reg) != GPIO_FN_IS_OUT(pcic_gpiomodes[i].fn)) - break; + gpioconf = CPU_IS_PXA250 ? pxa25x_pcic_gpioconf : + pxa27x_pcic_gpioconf; + for (i = 0; gpioconf[i].pin != -1; i++) { + reg = pxa2x0_gpio_get_function(gpioconf[i].pin); + if (GPIO_FN(reg) != GPIO_FN(gpioconf[i].value) || + GPIO_FN_IS_OUT(reg) != GPIO_FN_IS_OUT(gpioconf[i].value)) + return (0); } - if (pcic_gpiomodes[i].gpio != -1) - return 0; return 1; /* match */ } diff --git a/sys/arch/evbarm/lubbock/lubbock_machdep.c b/sys/arch/evbarm/lubbock/lubbock_machdep.c index afb745c6db7e..473bedfdaab4 100644 --- a/sys/arch/evbarm/lubbock/lubbock_machdep.c +++ b/sys/arch/evbarm/lubbock/lubbock_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: lubbock_machdep.c,v 1.14 2006/11/24 22:04:22 wiz Exp $ */ +/* $NetBSD: lubbock_machdep.c,v 1.15 2007/08/21 11:39:12 kiyohara Exp $ */ /* * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. @@ -112,7 +112,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.14 2006/11/24 22:04:22 wiz Exp $"); +__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.15 2007/08/21 11:39:12 kiyohara Exp $"); #include "opt_ddb.h" #include "opt_kgdb.h" @@ -266,6 +266,26 @@ bs_protos(bs_notimpl); int comcnspeed = CONSPEED; int comcnmode = CONMODE; +static struct pxa2x0_gpioconf boarddep_gpioconf[] = { + { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ + { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ + + { 29, GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */ + + { -1 } +}; +static struct pxa2x0_gpioconf *lubbock_gpioconf[] = { + pxa25x_com_btuart_gpioconf, + pxa25x_com_ffuart_gpioconf, +#if 0 + pxa25x_com_stuart_gpioconf, +#endif + pxa25x_pcic_gpioconf, + pxa25x_pxaacu_gpioconf, + boarddep_gpioconf, + NULL +}; + /* * void cpu_reboot(int howto, char *bootstr) * @@ -509,10 +529,7 @@ initarm(void *arg) /* setup GPIO for BTUART, in case bootloader doesn't take care of it */ pxa2x0_gpio_bootstrap(LUBBOCK_GPIO_VBASE); - pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); + pxa2x0_gpio_config(lubbock_gpioconf); /* turn on clock to UART block. XXX: this should not be done here. */ diff --git a/sys/arch/evbarm/viper/viper_machdep.c b/sys/arch/evbarm/viper/viper_machdep.c index 46b8cd653da2..bd688083857c 100644 --- a/sys/arch/evbarm/viper/viper_machdep.c +++ b/sys/arch/evbarm/viper/viper_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: viper_machdep.c,v 1.6 2006/11/24 22:04:22 wiz Exp $ */ +/* $NetBSD: viper_machdep.c,v 1.7 2007/08/21 11:39:12 kiyohara Exp $ */ /* * Startup routines for the Arcom Viper. Below you can trace the @@ -112,7 +112,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: viper_machdep.c,v 1.6 2006/11/24 22:04:22 wiz Exp $"); +__KERNEL_RCSID(0, "$NetBSD: viper_machdep.c,v 1.7 2007/08/21 11:39:12 kiyohara Exp $"); #include "opt_ddb.h" #include "opt_kgdb.h" @@ -265,6 +265,20 @@ bs_protos(bs_notimpl); int comcnspeed = CONSPEED; int comcnmode = CONMODE; +static struct pxa2x0_gpioconf boarddep_gpioconf[] = { + { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ + { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ + + { -1 } +}; +static struct pxa2x0_gpioconf *viper_gpioconf[] = { + pxa25x_com_btuart_gpioconf, + pxa25x_com_ffuart_gpioconf, + pxa25x_com_stuart_gpioconf, + boarddep_gpioconf, + NULL +}; + /* * void cpu_reboot(int howto, char *bootstr) * @@ -429,10 +443,7 @@ initarm(void *arg) /* setup GPIO for BTUART, in case bootloader doesn't take care of it */ pxa2x0_gpio_bootstrap(VIPER_GPIO_VBASE); - pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); + pxa2x0_gpio_config(viper_gpioconf); /* turn on clock to UART block. XXX: this should not be done here. */ diff --git a/sys/arch/zaurus/zaurus/machdep.c b/sys/arch/zaurus/zaurus/machdep.c index 07b8e0590584..ed5f19348c51 100644 --- a/sys/arch/zaurus/zaurus/machdep.c +++ b/sys/arch/zaurus/zaurus/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.5 2007/06/28 16:07:12 nonaka Exp $ */ +/* $NetBSD: machdep.c,v 1.6 2007/08/21 11:39:12 kiyohara Exp $ */ /* $OpenBSD: zaurus_machdep.c,v 1.25 2006/06/20 18:24:04 todd Exp $ */ /* @@ -107,7 +107,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2007/06/28 16:07:12 nonaka Exp $"); +__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.6 2007/08/21 11:39:12 kiyohara Exp $"); #include "opt_ddb.h" #include "opt_kgdb.h" @@ -255,6 +255,64 @@ void process_kernel_args(char *); void kgdb_port_init(void); #endif +#if defined(CPU_XSCALE_PXA250) +static struct pxa2x0_gpioconf pxa25x_boarddep_gpioconf[] = { + { 34, GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 35, GPIO_ALT_FN_1_IN }, /* FFCTS */ + { 39, GPIO_ALT_FN_2_OUT }, /* FFTXD */ + { 40, GPIO_ALT_FN_2_OUT }, /* FFDTR */ + { 41, GPIO_ALT_FN_2_OUT }, /* FFRTS */ + + { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ + { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ + + { -1 } +}; +static struct pxa2x0_gpioconf *pxa25x_zaurus_gpioconf[] = { + pxa25x_com_btuart_gpioconf, + pxa25x_com_ffuart_gpioconf, + pxa25x_com_stuart_gpioconf, + pxa25x_boarddep_gpioconf, + NULL +}; +#else +static struct pxa2x0_gpioconf *pxa25x_zaurus_gpioconf[] = { + NULL +}; +#endif +#if defined(CPU_XSCALE_PXA270) +static struct pxa2x0_gpioconf pxa27x_boarddep_gpioconf[] = { + { 34, GPIO_ALT_FN_1_IN }, /* FFRXD */ + { 35, GPIO_ALT_FN_1_IN }, /* FFCTS */ + { 39, GPIO_ALT_FN_2_OUT }, /* FFTXD */ + { 40, GPIO_ALT_FN_2_OUT }, /* FFDTR */ + { 41, GPIO_ALT_FN_2_OUT }, /* FFRTS */ + + { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ + { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ + + { 109, GPIO_ALT_FN_1_IN }, /* MMDAT<1> */ + { 110, GPIO_ALT_FN_1_IN }, /* MMDAT<2>/MMCCS<0> */ + { 111, GPIO_ALT_FN_1_IN }, /* MMDAT<3>/MMCCS<1> */ + + { -1 } +}; +static struct pxa2x0_gpioconf *pxa27x_zaurus_gpioconf[] = { + pxa27x_com_btuart_gpioconf, + pxa27x_com_ffuart_gpioconf, + pxa27x_com_stuart_gpioconf, + pxa27x_i2c_gpioconf, + pxa27x_i2s_gpioconf, + pxa27x_pxamci_gpioconf, + pxa27x_boarddep_gpioconf, + NULL +}; +#else +static struct pxa2x0_gpioconf *pxa27x_zaurus_gpioconf[] = { + NULL +}; +#endif + /* * void cpu_reboot(int howto, char *bootstr) * @@ -501,6 +559,7 @@ initarm(void *arg) pv_addr_t kernel_l1pt; paddr_t memstart; psize_t memsize; + struct pxa2x0_gpioconf **zaurus_gpioconf; /* Get ready for zaurus_restart() */ pxa2x0_memctl_bootstrap(PXA2X0_MEMCTL_BASE); @@ -540,13 +599,17 @@ initarm(void *arg) * This test will work for now but has to be revised when support * for other models is added. */ - if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X) + if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA27X) { zaurusmod = ZAURUS_C3000; - else + zaurus_gpioconf = pxa27x_zaurus_gpioconf; + } else { zaurusmod = ZAURUS_C860; + zaurus_gpioconf = pxa25x_zaurus_gpioconf; + } /* setup a serial console for very early boot */ pxa2x0_gpio_bootstrap(ZAURUS_GPIO_VBASE); + pxa2x0_gpio_config(zaurus_gpioconf); pxa2x0_clkman_bootstrap(ZAURUS_CLKMAN_VBASE); if (strcmp(console, "glass") != 0) consinit(); @@ -1076,23 +1139,12 @@ consinit(void) if (strcmp(console, "ffuart") == 0) { paddr = PXA2X0_FFUART_BASE; cken = CKEN_FFUART; - pxa2x0_gpio_set_function(34, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(39, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(35, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(40, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(41, GPIO_ALT_FN_2_OUT); } else if (strcmp(console, "btuart") == 0) { paddr = PXA2X0_BTUART_BASE; cken = CKEN_BTUART; - pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); } else if (strcmp(console, "stuart") == 0) { paddr = PXA2X0_STUART_BASE; cken = CKEN_STUART; - pxa2x0_gpio_set_function(46, GPIO_ALT_FN_2_IN); - pxa2x0_gpio_set_function(47, GPIO_ALT_FN_1_OUT); irda_on(0); } else #endif @@ -1124,23 +1176,12 @@ kgdb_port_init(void) if (strcmp(kgdb_devname, "ffuart") == 0) { paddr = PXA2X0_FFUART_BASE; cken = CKEN_FFUART; - pxa2x0_gpio_set_function(34, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(39, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(35, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(40, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(41, GPIO_ALT_FN_2_OUT); } else if (strcmp(kgdb_devname, "btuart") == 0) { paddr = PXA2X0_BTUART_BASE; cken = CKEN_BTUART; - pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); - pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); - pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); } else if (strcmp(kgdb_devname, "stuart") == 0) { paddr = PXA2X0_STUART_BASE; cken = CKEN_STUART; - pxa2x0_gpio_set_function(46, GPIO_ALT_FN_2_IN); - pxa2x0_gpio_set_function(47, GPIO_ALT_FN_1_OUT); irda_on(0); } else return;