- Rename cpu_use_fxsave to i386_use_fxsave.
- If we detect SSE/SSE2 support in the CPU, enable SSE exceptions and set i386_has_{sse,sse2} as appropriate. - Expose i386_use_fxsave and i386_has_{sse,sse2} through sysctl as machdep.{osfsxr,sse,sse2}.
This commit is contained in:
parent
99a7f640fe
commit
f0449fd933
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.450 2001/08/02 21:04:43 thorpej Exp $ */
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/* $NetBSD: machdep.c,v 1.451 2001/08/02 22:04:28 thorpej Exp $ */
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/*-
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/*-
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* Copyright (c) 1996, 1997, 1998, 2000 The NetBSD Foundation, Inc.
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* Copyright (c) 1996, 1997, 1998, 2000 The NetBSD Foundation, Inc.
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@ -200,7 +200,9 @@ int i386_fpu_present;
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int i386_fpu_exception;
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int i386_fpu_exception;
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int i386_fpu_fdivbug;
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int i386_fpu_fdivbug;
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int cpu_use_fxsave;
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int i386_use_fxsave;
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int i386_has_sse;
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int i386_has_sse2;
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#define CPUID2MODEL(cpuid) (((cpuid) >> 4) & 15)
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#define CPUID2MODEL(cpuid) (((cpuid) >> 4) & 15)
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@ -1523,10 +1525,22 @@ identifycpu(struct cpu_info *ci)
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* If we have FXSAVE/FXRESTOR, use them.
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* If we have FXSAVE/FXRESTOR, use them.
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*/
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*/
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if (cpu_feature & CPUID_FXSR) {
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if (cpu_feature & CPUID_FXSR) {
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cpu_use_fxsave = 1;
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i386_use_fxsave = 1;
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lcr4(rcr4() | CR4_OSFXSR);
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lcr4(rcr4() | CR4_OSFXSR);
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/*
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* If we have SSE/SSE2, enable XMM exceptions, and
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* notify userland.
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*/
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if (cpu_feature & (CPUID_SSE|CPUID_SSE2)) {
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if (cpu_feature & CPUID_SSE)
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i386_has_sse = 1;
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if (cpu_feature & CPUID_SSE2)
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i386_has_sse2 = 1;
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lcr4(rcr4() | CR4_OSXMMEXCPT);
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}
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} else
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} else
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cpu_use_fxsave = 0;
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i386_use_fxsave = 0;
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#endif /* I686_CPU */
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#endif /* I686_CPU */
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}
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}
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@ -1582,6 +1596,13 @@ cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p)
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return (sysctl_rdstruct(oldp, oldlenp, newp, i386_alldisks,
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return (sysctl_rdstruct(oldp, oldlenp, newp, i386_alldisks,
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sizeof (struct disklist) +
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sizeof (struct disklist) +
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(i386_ndisks - 1) * sizeof (struct nativedisk_info)));
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(i386_ndisks - 1) * sizeof (struct nativedisk_info)));
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case CPU_OSFXSR:
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return (sysctl_rdint(oldp, oldlenp, newp, i386_use_fxsave));
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case CPU_SSE:
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return (sysctl_rdint(oldp, oldlenp, newp, i386_has_sse));
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case CPU_SSE2:
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return (sysctl_rdint(oldp, oldlenp, newp, i386_has_sse2));
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default:
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default:
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return (EOPNOTSUPP);
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return (EOPNOTSUPP);
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}
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}
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@ -2145,7 +2166,7 @@ setregs(p, pack, stack)
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p->p_md.md_flags &= ~MDP_USEDFPU;
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p->p_md.md_flags &= ~MDP_USEDFPU;
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pcb->pcb_flags = 0;
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pcb->pcb_flags = 0;
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if (cpu_use_fxsave)
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if (i386_use_fxsave)
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pcb->pcb_savefpu.sv_xmm.sv_env.en_cw = __NetBSD_NPXCW__;
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pcb->pcb_savefpu.sv_xmm.sv_env.en_cw = __NetBSD_NPXCW__;
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else
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else
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pcb->pcb_savefpu.sv_87.sv_env.en_cw = __NetBSD_NPXCW__;
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pcb->pcb_savefpu.sv_87.sv_env.en_cw = __NetBSD_NPXCW__;
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@ -1,4 +1,4 @@
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/* $NetBSD: process_machdep.c,v 1.35 2001/08/02 21:04:44 thorpej Exp $ */
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/* $NetBSD: process_machdep.c,v 1.36 2001/08/02 22:04:28 thorpej Exp $ */
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/*-
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/*-
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* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
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* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
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@ -222,7 +222,7 @@ process_read_fpregs(p, regs)
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* The initial control word was already set by setregs(), so
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* The initial control word was already set by setregs(), so
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* save it temporarily.
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* save it temporarily.
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*/
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*/
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if (cpu_use_fxsave) {
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if (i386_use_fxsave) {
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cw = frame->sv_xmm.sv_env.en_cw;
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cw = frame->sv_xmm.sv_env.en_cw;
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/* XXX Don't zero XMM regs? */
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/* XXX Don't zero XMM regs? */
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memset(&frame->sv_xmm, 0, sizeof(frame->sv_xmm));
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memset(&frame->sv_xmm, 0, sizeof(frame->sv_xmm));
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@ -239,7 +239,7 @@ process_read_fpregs(p, regs)
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p->p_md.md_flags |= MDP_USEDFPU;
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p->p_md.md_flags |= MDP_USEDFPU;
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}
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}
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if (cpu_use_fxsave) {
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if (i386_use_fxsave) {
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struct save87 s87;
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struct save87 s87;
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/* XXX Yuck */
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/* XXX Yuck */
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@ -320,7 +320,7 @@ process_write_fpregs(p, regs)
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p->p_md.md_flags |= MDP_USEDFPU;
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p->p_md.md_flags |= MDP_USEDFPU;
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}
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}
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if (cpu_use_fxsave) {
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if (i386_use_fxsave) {
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struct save87 s87;
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struct save87 s87;
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/* XXX Yuck. */
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/* XXX Yuck. */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.74 2001/08/02 21:04:44 thorpej Exp $ */
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/* $NetBSD: cpu.h,v 1.75 2001/08/02 22:04:29 thorpej Exp $ */
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/*-
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* Copyright (c) 1990 The Regents of the University of California.
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@ -181,7 +181,9 @@ extern int cpuid_level;
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extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
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extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
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extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
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extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
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extern int cpu_use_fxsave;
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extern int i386_use_fxsave;
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extern int i386_has_sse;
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extern int i386_has_sse2;
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/* machdep.c */
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/* machdep.c */
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void delay __P((int));
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void delay __P((int));
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@ -259,7 +261,10 @@ void i386_bus_space_mallocok __P((void));
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#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
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#define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */
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#define CPU_DISKINFO 6 /* disk geometry information */
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#define CPU_DISKINFO 6 /* disk geometry information */
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#define CPU_FPU_PRESENT 7 /* FPU is present */
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#define CPU_FPU_PRESENT 7 /* FPU is present */
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#define CPU_MAXID 8 /* number of valid machdep ids */
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#define CPU_OSFXSR 8 /* OS uses FXSAVE/FXRSTOR */
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#define CPU_SSE 9 /* OS/CPU supports SSE */
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#define CPU_SSE2 10 /* OS/CPU supports SSE2 */
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#define CPU_MAXID 11 /* number of valid machdep ids */
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#define CTL_MACHDEP_NAMES { \
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ 0, 0 }, \
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{ "booted_kernel", CTLTYPE_STRING }, \
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{ "booted_kernel", CTLTYPE_STRING }, \
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{ "diskinfo", CTLTYPE_STRUCT }, \
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{ "diskinfo", CTLTYPE_STRUCT }, \
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{ "fpu_present", CTLTYPE_INT }, \
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{ "fpu_present", CTLTYPE_INT }, \
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{ "osfxsr", CTLTYPE_INT }, \
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{ "sse", CTLTYPE_INT }, \
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{ "sse2", CTLTYPE_INT }, \
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}
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: npx.c,v 1.77 2001/08/02 21:04:45 thorpej Exp $ */
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/* $NetBSD: npx.c,v 1.78 2001/08/02 22:04:29 thorpej Exp $ */
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#if 0
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#if 0
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#define IPRINTF(x) printf x
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#define IPRINTF(x) printf x
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{
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{
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#ifdef I686_CPU
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#ifdef I686_CPU
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if (cpu_use_fxsave) {
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if (i386_use_fxsave) {
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fxsave(&addr->sv_xmm);
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fxsave(&addr->sv_xmm);
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/* FXSAVE doesn't FNINIT like FNSAVE does -- so do it here. */
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/* FXSAVE doesn't FNINIT like FNSAVE does -- so do it here. */
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fwait(); /* XXX needed? */
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fwait(); /* XXX needed? */
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i386_fpu_present = 1;
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i386_fpu_present = 1;
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#ifdef I686_CPU
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#ifdef I686_CPU
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if (cpu_use_fxsave)
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if (i386_use_fxsave)
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npxdna_func = npxdna_xmm;
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npxdna_func = npxdna_xmm;
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else
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else
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#endif /* I686_CPU */
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#endif /* I686_CPU */
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/*
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/*
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* Restore control word (was clobbered by fpu_save).
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* Restore control word (was clobbered by fpu_save).
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*/
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*/
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if (cpu_use_fxsave)
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if (i386_use_fxsave)
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fldcw(&addr->sv_xmm.sv_env.en_cw);
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fldcw(&addr->sv_xmm.sv_env.en_cw);
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else
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else
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fldcw(&addr->sv_87.sv_env.en_cw);
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fldcw(&addr->sv_87.sv_env.en_cw);
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* preserved the control word and will copy the status and tag
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* preserved the control word and will copy the status and tag
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* words, so the complete exception state can be recovered.
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* words, so the complete exception state can be recovered.
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*/
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*/
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if (cpu_use_fxsave) {
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if (i386_use_fxsave) {
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addr->sv_xmm.sv_ex_sw = addr->sv_xmm.sv_env.en_sw;
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addr->sv_xmm.sv_ex_sw = addr->sv_xmm.sv_env.en_sw;
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addr->sv_xmm.sv_ex_tw = addr->sv_xmm.sv_env.en_tw;
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addr->sv_xmm.sv_ex_tw = addr->sv_xmm.sv_env.en_tw;
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} else {
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} else {
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npxproc = p;
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npxproc = p;
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if ((p->p_md.md_flags & MDP_USEDFPU) == 0) {
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if ((p->p_md.md_flags & MDP_USEDFPU) == 0) {
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if (cpu_use_fxsave)
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if (i386_use_fxsave)
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fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_xmm.sv_env.en_cw);
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fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_xmm.sv_env.en_cw);
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else
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else
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fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_87.sv_env.en_cw);
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fldcw(&p->p_addr->u_pcb.pcb_savefpu.sv_87.sv_env.en_cw);
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