Implement basic bus space access macros/functions.
Note: we currently do not use the extent manager.
This commit is contained in:
scottr
parent
b2f7c338bf
commit
f042e543c9
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@ -0,0 +1,370 @@
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/* $NetBSD: bus.h,v 1.1 1997/02/03 17:32:54 scottr Exp $ */
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/*
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* Copyright "g" (c) 1997 Scott Reynolds. All rights reserved.
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* Copyright "g" (c) 1996 Jason R. Thorpe. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Scott Reynolds for the
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* NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MAC68K_BUS_H_
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#define _MAC68K_BUS_H_
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/*
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* Value for the mac68k bus space tag, not to be used directly by MI code.
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*/
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#define MAC68K_BUS_SPACE_MEM 0 /* space is mem space */
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/*
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* Bus address and size types
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*/
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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/*
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* Access methods for bus resources and address space.
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*/
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typedef u_long bus_space_tag_t;
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typedef caddr_t bus_space_handle_t;
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int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t,
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int, bus_space_handle_t *));
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void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t,
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bus_size_t));
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int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp));
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/*
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* u_intN_t bus_space_read_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset));
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*
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* Read a 1, 2, 4, or 8 byte quantity from bus space
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* described by tag/handle/offset.
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*/
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#define bus_space_read_1(t, h, o) \
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((void) t, (*(volatile u_int8_t *)((h) + (o))))
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#define bus_space_read_2(t, h, o) \
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((void) t, (*(volatile u_int16_t *)((h) + (o))))
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#define bus_space_read_4(t, h, o) \
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((void) t, (*(volatile u_int32_t *)((h) + (o))))
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#if 0 /* Cause a link error for bus_space_read_8 */
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#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
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#endif
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/*
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* void bus_space_read_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t *addr, size_t count));
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*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle/offset and copy into buffer provided.
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*/
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#define bus_space_read_multi_1(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_read_multi_2(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_read_multi_4(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a0@,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#if 0 /* Cause a link error for bus_space_read_multi_8 */
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
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#endif
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/*
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* void bus_space_read_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t *addr, size_t count));
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*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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#define bus_space_read_region_1(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_read_region_2(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_read_region_4(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a0@+,a1@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#if 0 /* Cause a link error for bus_space_read_region_8 */
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#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
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#endif
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/*
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* void bus_space_write_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t value));
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*
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* Write the 1, 2, 4, or 8 byte value `value' to bus space
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* described by tag/handle/offset.
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*/
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#define bus_space_write_1(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))))
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#define bus_space_write_2(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))))
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#define bus_space_write_4(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))))
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#if 0 /* Cause a link error for bus_space_write_8 */
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#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
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#endif
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/*
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* void bus_space_write_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* const u_intN_t *addr, size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
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* provided to bus space described by tag/handle/offset.
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*/
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#define bus_space_write_multi_1(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a1@+,a0@ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_write_multi_2(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a1@+,a0@ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_write_multi_4(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a1@+,a0@ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#if 0 /* Cause a link error for bus_space_write_8 */
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#define bus_space_write_multi_8(t, h, o, a, c) \
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!!! bus_space_write_multi_8 unimplimented !!!
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#endif
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/*
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* void bus_space_write_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* const u_intN_t *addr, size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
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* to bus space described by tag/handle starting at `offset'.
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*/
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#define bus_space_write_region_1(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movb a1@+,a0@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_write_region_2(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movw a1@+,a0@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#define bus_space_write_region_4(t, h, o, a, c) do { \
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__asm __volatile (" \
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movl %0,a0 ; \
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movl %1,a1 ; \
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movl %2,d0 ; \
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1: movl a1@+,a0@+ ; \
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subql #1,d0 ; \
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jne 1b" : \
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: \
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"r" ((h) + (o)), "g" (a), "g" (c) : \
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"a0","a1","d0"); \
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} while (0);
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#if 0 /* Cause a link error for bus_space_write_region_8 */
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#define bus_space_write_region_8 \
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!!! bus_space_write_region_8 unimplemented !!!
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#endif
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/*
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* void bus_space_set_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
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* size_t count));
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*
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* Write the 1, 2, 4, or 8 byte value `val' to bus space described
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* by tag/handle/offset `count' times.
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*/
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/* XXX IMPLEMENT bus_space_set_multi_N() XXX */
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/*
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* void bus_space_set_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
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* size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
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* by tag/handle starting at `offset'.
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*/
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/* XXX IMPLEMENT bus_space_set_region_N() XXX */
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/*
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* void bus_space_copy_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh1, bus_size_t off1,
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* bus_space_handle_t bsh2, bus_size_t off2,
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* size_t count));
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*
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* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
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* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
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*/
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/* XXX IMPLEMENT bus_space_copy_N() XXX */
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/*
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* Bus read/write barrier methods.
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*
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* void bus_space_barrier __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* bus_size_t len, int flags));
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*
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* Note: the 680x0 does not currently require barriers, but we must
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* provide the flags to MI code.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
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#define BUS_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_BARRIER_WRITE 0x02 /* force write barrier */
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/*
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* Machine-dependent extensions.
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*/
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int bus_probe __P((bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t offset, int sz));
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#endif /* _MAC68K_BUS_H_ */
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@ -1,6 +1,7 @@
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/* $NetBSD: machdep.c,v 1.129 1997/01/09 07:20:46 scottr Exp $ */
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/* $NetBSD: machdep.c,v 1.130 1997/02/03 17:32:57 scottr Exp $ */
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/*
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* Copyright (c) 1996 Jason R. Thorpe. All rights reserved.
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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@ -116,6 +117,7 @@
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#include <machine/reg.h>
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#include <machine/psl.h>
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#include <machine/pte.h>
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#include <machine/bus.h>
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#include <net/netisr.h>
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#define MAXMEM 64*1024*CLSIZE /* XXX - from cmap.h */
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@ -2483,13 +2485,11 @@ mac68k_set_io_offsets(base)
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vm_offset_t base;
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{
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extern volatile u_char *sccA;
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extern volatile u_char *ASCBase;
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switch (current_mac_model->class) {
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case MACH_CLASSQ:
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Via1Base = (volatile u_char *) base;
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sccA = (volatile u_char *) base + 0xc000;
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ASCBase = (volatile u_char *) base + 0x14000;
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switch (current_mac_model->machineid) {
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case MACH_MACQ900:
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case MACH_MACQ950:
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@ -2510,13 +2510,11 @@ mac68k_set_io_offsets(base)
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*/
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Via1Base = (volatile u_char *) base;
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sccA = (volatile u_char *) base + 0xc020;
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ASCBase = (volatile u_char *) base + 0x14000;
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SCSIBase = base + 0x10000;
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break;
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case MACH_CLASSAV:
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Via1Base = (volatile u_char *) base;
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sccA = (volatile u_char *) base + 0x4000;
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ASCBase = (volatile u_char *) base + 0x14000;
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SCSIBase = base + 0x18000;
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break;
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case MACH_CLASSII:
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@ -2527,7 +2525,6 @@ mac68k_set_io_offsets(base)
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case MACH_CLASSLC:
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Via1Base = (volatile u_char *) base;
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sccA = (volatile u_char *) base + 0x4000;
|
||||
ASCBase = (volatile u_char *) base + 0x14000;
|
||||
SCSIBase = base;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -2862,3 +2859,112 @@ printstar(void)
|
|||
movl sp@+,a1;
|
||||
movl sp@+,a0");
|
||||
}
|
||||
|
||||
int
|
||||
bus_space_map(t, bpa, size, cacheable, bshp)
|
||||
bus_space_tag_t t;
|
||||
bus_addr_t bpa;
|
||||
bus_size_t size;
|
||||
int cacheable;
|
||||
bus_space_handle_t *bshp;
|
||||
{
|
||||
vm_offset_t va;
|
||||
u_long pa, endpa;
|
||||
|
||||
pa = mac68k_trunc_page(bpa + t);
|
||||
endpa = mac68k_round_page((bpa + t + size) - 1);
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if (endpa <= pa)
|
||||
panic("bus_space_map: overflow");
|
||||
#endif
|
||||
|
||||
va = kmem_alloc_pageable(kernel_map, endpa - pa);
|
||||
if (va == 0)
|
||||
return 1;
|
||||
*bshp = (caddr_t)(va + (bpa & PGOFSET));
|
||||
|
||||
for(; pa < endpa; pa += NBPG, va += NBPG) {
|
||||
pmap_enter(pmap_kernel(), (vm_offset_t)va, pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, TRUE);
|
||||
if (!cacheable)
|
||||
pmap_changebit(pa, PG_CI, TRUE);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
bus_space_unmap(t, bsh, size)
|
||||
bus_space_tag_t t;
|
||||
bus_space_handle_t bsh;
|
||||
bus_size_t size;
|
||||
{
|
||||
vm_offset_t va, endva;
|
||||
|
||||
va = mac68k_trunc_page(bsh);
|
||||
endva = mac68k_round_page((bsh + size) - 1);
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if (endva <= va)
|
||||
panic("bus_space_unmap: overflow");
|
||||
#endif
|
||||
|
||||
kmem_free(kernel_map, va, endva - va);
|
||||
}
|
||||
|
||||
int
|
||||
bus_space_subregion(t, bsh, offset, size, nbshp)
|
||||
bus_space_tag_t t;
|
||||
bus_space_handle_t bsh;
|
||||
bus_size_t offset, size;
|
||||
bus_space_handle_t *nbshp;
|
||||
{
|
||||
|
||||
*nbshp = bsh + offset;
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
bus_probe(t, bsh, offset, sz)
|
||||
bus_space_tag_t t;
|
||||
bus_space_handle_t bsh;
|
||||
bus_size_t offset;
|
||||
int sz;
|
||||
{
|
||||
int i;
|
||||
label_t faultbuf;
|
||||
|
||||
#ifdef lint
|
||||
i = *addr;
|
||||
if (i)
|
||||
return (0);
|
||||
#endif
|
||||
nofault = (int *) &faultbuf;
|
||||
if (setjmp((label_t *) nofault)) {
|
||||
nofault = (int *) 0;
|
||||
return (0);
|
||||
}
|
||||
|
||||
switch (sz) {
|
||||
case 1:
|
||||
i = bus_space_read_1(t, bsh, offset);
|
||||
break;
|
||||
case 2:
|
||||
i = bus_space_read_2(t, bsh, offset);
|
||||
break;
|
||||
case 4:
|
||||
i = bus_space_read_4(t, bsh, offset);
|
||||
break;
|
||||
case 8:
|
||||
/*FALLTHROUGH*/
|
||||
default:
|
||||
#ifdef DIAGNOSTIC
|
||||
printf("bus_probe: unsupported data size %d\n", sz);
|
||||
#endif
|
||||
nofault = (int *) 0;
|
||||
return (0);
|
||||
}
|
||||
|
||||
nofault = (int *) 0;
|
||||
return (1);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue