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sun4c and sun4m `aux' register bits differ slightly.

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This commit is contained in:
pk 1997-04-07 21:00:34 +00:00
parent e934bd737e
commit efeeba419f
4 changed files with 150 additions and 65 deletions
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62
sys/arch/sparc/dev/fd.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fd.c,v 1.48 1997/03/31 20:27:32 pk Exp $ */
/* $NetBSD: fd.c,v 1.49 1997/04/07 21:01:56 pk Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995 Charles Hannum.
@ -160,7 +160,7 @@ struct fd_type {
int steprate; /* step rate and head unload time */
int gap1; /* gap len between sectors */
int gap2; /* formatting gap */
int tracks; /* total num of tracks */
int cylinders; /* total num of cylinders */
int size; /* size of disk in sectors */
int step; /* steps per cylinder */
int rate; /* transfer speed code */
@ -528,7 +528,7 @@ fdmatch(parent, match, aux)
/* wait for motor to spin up */
delay(250000);
} else {
auxregbisc(AUXIO_FDS, 0);
auxregbisc(AUXIO4C_FDS, 0);
}
fdc->sc_nstat = 0;
out_fdc(fdc, NE7CMD_RECAL);
@ -568,7 +568,7 @@ fdmatch(parent, match, aux)
/* select drive and turn on motor */
*fdc->sc_reg_dor = FDO_FRST;
} else {
auxregbisc(0, AUXIO_FDS);
auxregbisc(0, AUXIO4C_FDS);
}
return (ok);
@ -592,7 +592,7 @@ fdattach(parent, self, aux)
if (type)
printf(": %s %d cyl, %d head, %d sec\n", type->name,
type->tracks, type->heads, type->sectrac);
type->cylinders, type->heads, type->sectrac);
else
printf(": density unknown\n");
@ -801,9 +801,9 @@ fd_set_motor(fdc)
if ((fd = fdc->sc_fd[n]) && (fd->sc_flags & FD_MOTOR))
on = 1;
if (on) {
auxregbisc(AUXIO_FDS, 0);
auxregbisc(AUXIO4C_FDS, 0);
} else {
auxregbisc(0, AUXIO_FDS);
auxregbisc(0, AUXIO4C_FDS);
}
}
}
@ -1097,7 +1097,6 @@ fdchwintr(fdc)
FD_SET_SWINTR;
return (1);
case ISTATE_SPURIOUS:
auxregbisc(0, AUXIO_FDS); /* Does this help? */
fdcresult(fdc);
fdc->sc_istate = ISTATE_SPURIOUS;
printf("fdc: stray hard interrupt... ");
@ -1132,10 +1131,8 @@ fdchwintr(fdc)
*fdc->sc_reg_fifo = *fdc->sc_data++;
}
if (--fdc->sc_tc == 0) {
auxregbisc(AUXIO_FTC, 0);
fdc->sc_istate = ISTATE_IDLE;
delay(10);
auxregbisc(0, AUXIO_FTC);
FTC_FLIP;
fdcresult(fdc);
FD_SET_SWINTR;
break;
@ -1243,7 +1240,7 @@ loop:
/* Make sure the right drive is selected. */
fd_set_motor(fdc);
/* fall through */
/*FALLTHROUGH*/
case DOSEEK:
doseek:
if ((fdc->sc_flags & FDC_EIS) &&
@ -1354,7 +1351,7 @@ loop:
timeout(fdcpseudointr, fdc, hz / 50);
return (1); /* will return later */
}
/*FALLTHROUGH*/
case SEEKCOMPLETE:
disk_unbusy(&fd->sc_dk, 0); /* no data on seek */
@ -1372,10 +1369,9 @@ loop:
goto doio;
case IOTIMEDOUT:
auxregbisc(AUXIO_FTC, 0);
delay(10);
auxregbisc(0, AUXIO_FTC);
FTC_FLIP;
(void)fdcresult(fdc);
/*FALLTHROUGH*/
case SEEKTIMEDOUT:
case RECALTIMEDOUT:
case RESETTIMEDOUT:
@ -1654,7 +1650,7 @@ fdioctl(dev, cmd, addr, flag, p)
form_parms = (struct fdformat_parms *)addr;
form_parms->fdformat_version = FDFORMAT_VERSION;
form_parms->nbps = 128 * (1 << fd->sc_type->secsize);
form_parms->ncyl = fd->sc_type->tracks;
form_parms->ncyl = fd->sc_type->cylinders;
form_parms->nspt = fd->sc_type->sectrac;
form_parms->ntrk = fd->sc_type->heads;
form_parms->stepspercyl = fd->sc_type->step;
@ -1715,13 +1711,13 @@ fdioctl(dev, cmd, addr, flag, p)
fd->sc_type->seccyl = form_parms->nspt * form_parms->ntrk;
fd->sc_type->secsize = ffs(i)-1;
fd->sc_type->gap2 = form_parms->gaplen;
fd->sc_type->tracks = form_parms->ncyl;
fd->sc_type->cylinders = form_parms->ncyl;
fd->sc_type->size = fd->sc_type->seccyl * form_parms->ncyl *
form_parms->nbps / DEV_BSIZE;
fd->sc_type->step = form_parms->stepspercyl;
fd->sc_type->fillbyte = form_parms->fillbyte;
fd->sc_type->interleave = form_parms->interleave;
return 0;
return (0);
case FDIOCFORMAT_TRACK:
if((flag & FWRITE) == 0)
@ -1733,7 +1729,7 @@ fdioctl(dev, cmd, addr, flag, p)
return (EINVAL);
if (form_cmd->head >= fd->sc_type->heads ||
form_cmd->cylinder >= fd->sc_type->tracks) {
form_cmd->cylinder >= fd->sc_type->cylinders) {
return (EINVAL);
}
@ -1745,11 +1741,11 @@ fdioctl(dev, cmd, addr, flag, p)
fd_formb.fd_formb_gaplen = fd->sc_type->gap2;
fd_formb.fd_formb_fillbyte = fd->sc_type->fillbyte;
bzero(il,sizeof il);
bzero(il, sizeof il);
for (j = 0, i = 1; i <= fd_formb.fd_formb_nsecs; i++) {
while (il[(j%fd_formb.fd_formb_nsecs)+1])
while (il[(j%fd_formb.fd_formb_nsecs) + 1])
j++;
il[(j%fd_formb.fd_formb_nsecs)+1] = i;
il[(j%fd_formb.fd_formb_nsecs) + 1] = i;
j += fd->sc_type->interleave;
}
for (i = 0; i < fd_formb.fd_formb_nsecs; i++) {
@ -1838,8 +1834,8 @@ fdformat(dev, finfo, p)
bp->b_dev = dev;
/*
* calculate a fake blkno, so fdstrategy() would initiate a
* seek to the requested cylinder
* Calculate a fake blkno, so fdstrategy() would initiate a
* seek to the requested cylinder.
*/
bp->b_blkno = (finfo->cyl * (type->sectrac * type->heads)
+ finfo->head * type->sectrac) * FDC_BSIZE / DEV_BSIZE;
@ -1849,7 +1845,7 @@ fdformat(dev, finfo, p)
#ifdef FD_DEBUG
if (fdc_debug)
printf("fdformat: blkno %x count %lx\n",
printf("fdformat: blkno %x count %ld\n",
bp->b_blkno, bp->b_bcount);
#endif
@ -1894,7 +1890,7 @@ fdgetdisklabel(dev)
lp->d_secsize = FDC_BSIZE;
lp->d_secpercyl = fd->sc_type->seccyl;
lp->d_nsectors = fd->sc_type->sectrac;
lp->d_ncylinders = fd->sc_type->tracks;
lp->d_ncylinders = fd->sc_type->cylinders;
lp->d_ntracks = fd->sc_type->heads; /* Go figure... */
lp->d_rpm = 3600; /* XXX like it matters... */
@ -1943,10 +1939,14 @@ fdgetdisklabel(dev)
void
fd_do_eject()
{
auxregbisc(AUXIO_FDS, AUXIO_FEJ);
delay(10);
auxregbisc(AUXIO_FEJ, AUXIO_FDS);
if (CPU_ISSUN4C) {
auxregbisc(AUXIO4C_FDS, AUXIO4C_FEJ);
delay(10);
auxregbisc(AUXIO4C_FEJ, AUXIO4C_FDS);
}
if (CPU_ISSUN4M) {
/*notyet*/
}
}
#ifdef MEMORY_DISK_HOOKS

9
sys/arch/sparc/sparc/auxreg.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: auxreg.c,v 1.18 1996/12/11 00:51:06 pk Exp $ */
/* $NetBSD: auxreg.c,v 1.19 1997/04/07 21:00:34 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -122,7 +122,7 @@ auxregattach(parent, self, aux)
struct romaux *ra = &ca->ca_ra;
(void)mapdev(ra->ra_reg, AUXREG_VA, 0, sizeof(long), ca->ca_bustype);
auxio_reg = AUXIO_REG;
auxio_reg = CPU_ISSUN4M ? AUXIO4M_REG : AUXIO4C_REG;
printf("\n");
#ifdef BLINK
blink((caddr_t)0);
@ -143,8 +143,9 @@ auxregbisc(bis, bic)
panic("no aux register");
s = splhigh();
v = *AUXIO_REG;
*AUXIO_REG = ((v | bis) & ~bic) | AUXIO_MB1;
v = *auxio_reg;
*auxio_reg = ((v | bis) & ~bic) |
(CPU_ISSUN4M ? AUXIO4M_MB1 : AUXIO4C_MB1);
splx(s);
return v;
}

71
sys/arch/sparc/sparc/auxreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: auxreg.h,v 1.5 1996/03/14 21:08:54 christos Exp $ */
/* $NetBSD: auxreg.h,v 1.6 1997/04/07 21:00:35 pk Exp $ */
/*
* Copyright (c) 1992, 1993
@ -49,32 +49,67 @@
* (if it exists) and the front-panel LED.
*/
#define AUXIO_MB1 0xf0 /* must be set on write */
#define AUXIO_FHD 0x20 /* floppy: high density (unreliable?)*/
#define AUXIO_FDC 0x10 /* floppy: diskette was changed */
#define AUXIO_FDS 0x08 /* floppy: drive select */
#define AUXIO_FTC 0x04 /* floppy: drives Terminal Count pin */
#define AUXIO_FEJ 0x02 /* floppy: eject disk */
#define AUXIO_LED 0x01 /* front panel LED */
#define AUXIO4C_MB1 0xf0 /* must be set on write */
#define AUXIO4C_FHD 0x20 /* floppy: high density (unreliable?)*/
#define AUXIO4C_FDC 0x10 /* floppy: diskette was changed */
#define AUXIO4C_FDS 0x08 /* floppy: drive select */
#define AUXIO4C_FTC 0x04 /* floppy: drives Terminal Count pin */
#define AUXIO4C_FEJ 0x02 /* floppy: eject disk */
#define AUXIO4C_LED 0x01 /* front panel LED */
#define AUXIO4M_MB1 0xc0 /* must be set on write? */
#define AUXIO4M_FHD 0x20 /* floppy: high density (unreliable?)*/
#define AUXIO4M_LTE 0x08 /* link-test enable */
#define AUXIO4M_MMX 0x04 /* Monitor/Mouse MUX; what is it? */
#define AUXIO4M_FTC 0x02 /* floppy: drives Terminal Count pin */
#define AUXIO4M_LED 0x01 /* front panel LED */
/*
* We use a fixed virtual address for the register because we use it for
* timing short sections of code (via external hardware attached to the LED).
*/
#define AUXIO_REG ((volatile u_char *)(AUXREG_VA + 3))
#define AUXIO4C_REG ((volatile u_char *)(AUXREG_VA + 3))
#define AUXIO4M_REG ((volatile u_char *)(AUXREG_VA))
#define LED_ON *AUXIO_REG = AUXIO_MB1|AUXIO_FEJ|AUXIO_LED
#define LED_OFF *AUXIO_REG = AUXIO_MB1|AUXIO_FEJ
#define LED_FLIP *AUXIO_REG = (*AUXIO_REG | AUXIO_MB1) ^ AUXIO_LED
#define LED_ON do { \
if (CPU_ISSUN4M) \
*AUXIO4M_REG = *AUXIO4M_REG|AUXIO4M_MB1|AUXIO4M_LED; \
else \
*AUXIO4C_REG = AUXIO4C_MB1|AUXIO4C_FEJ|AUXIO4C_LED; \
} while(0)
#define AUXIO_BITS "\20\6FHD\5FDC\4FDS\3FTC\2FEJ\1LED"
#define LED_OFF do { \
if (CPU_ISSUN4M) \
*AUXIO4M_REG = (*AUXIO4M_REG & ~AUXIO4M_LED)|AUXIO4M_MB1;\
else \
*AUXIO4C_REG = AUXIO4C_MB1|AUXIO4C_FEJ; \
} while(0)
#define LED_FLIP do { \
if (CPU_ISSUN4M) \
*AUXIO4M_REG = (*AUXIO4M_REG | AUXIO4M_MB1) ^ AUXIO4M_LED;\
else \
*AUXIO4C_REG = (*AUXIO4C_REG | AUXIO4C_MB1) ^ AUXIO4C_LED;\
} while(0)
#define FTC_FLIP do { \
if (CPU_ISSUN4M) \
*AUXIO4M_REG = *AUXIO4M_REG | AUXIO4M_MB1 | AUXIO4M_FTC;\
else { \
*AUXIO4C_REG |= AUXIO4C_MB1 | AUXIO4C_FTC | AUXIO4C_FEJ;\
DELAY(10); \
*AUXIO4C_REG |= AUXIO4C_MB1 | AUXIO4C_FEJ; \
} \
} while(0)
#define AUXIO_BITS ( \
CPU_ISSUN4M \
? "\20\6FHD\4LTE\3MMX\2FTC\1LED" \
: "\20\6FHD\5FDC\4FDS\3FTC\2FEJ\1LED" \
)
#ifndef _LOCORE
/*
* Copy of AUXIO_REG for the benefit of assembler modules (eg. trap handlers)
* as AUXREG_VA depends on NBPG which is not a constant.
*/
volatile u_char *auxio_reg;
volatile u_char *auxio_reg; /* Copy of AUXIO_REG */
unsigned int auxregbisc __P((int, int));
#endif

73
sys/arch/sparc/sparc/bsd_fdintr.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: bsd_fdintr.s,v 1.10 1997/03/10 23:08:32 pk Exp $ */
/* $NetBSD: bsd_fdintr.s,v 1.11 1997/04/07 21:00:36 pk Exp $ */
/*
* Copyright (c) 1995 Paul Kranenburg
@ -71,6 +71,63 @@
9:
#endif
! flip TC bit in auxreg
! assumes %l6 remains unchanged between ASSERT and DEASSERT
#define FD_ASSERT_TC_4C \
sethi %hi(AUXREG_VA), %l6; \
ldub [%l6 + %lo(AUXREG_VA) + 3], %l7; \
or %l7, AUXIO4C_MB1|AUXIO4C_FTC, %l7; \
stb %l7, [%l6 + %lo(AUXREG_VA) + 3];
#define FD_DEASSERT_TC_4C \
ldub [%l6 + %lo(AUXREG_VA) + 3], %l7; \
andn %l7, AUXIO4C_FTC, %l7; \
or %l7, AUXIO4C_MB1, %l7; \
stb %l7, [%l6 + %lo(AUXREG_VA) + 3];
! flip TC bit in auxreg
#define FD_ASSERT_TC_4M \
sethi %hi(AUXREG_VA), %l6; \
ldub [%l6 + %lo(AUXREG_VA) + 3], %l7; \
or %l7, AUXIO4M_MB1|AUXIO4M_FTC, %l7; \
stb %l7, [%l6 + %lo(AUXREG_VA) + 3];
#define FD_DEASSERT_TC_4M
/*
* flip TC bit in auxreg
* assumes %l5 remains unchanged between ASSERT and DEASSERT
*/
#if (defined(SUN4) || defined(SUN4C)) && !defined(SUN4M)
#define FD_ASSERT_TC FD_ASSERT_TC_4C
#define FD_DEASSERT_TC FD_DEASSERT_TC_4C
#elif !(defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
#define FD_ASSERT_TC FD_ASSERT_TC_4M
#define FD_DEASSERT_TC FD_DEASSERT_TC_4M
#else
#define FD_ASSERT_TC \
sethi %hi(_cputyp), %l5; \
ld [%l5 + %lo(_cputyp)], %l5; \
cmp %l5, CPU_SUN4M; \
be 8f; \
nop; \
FD_ASSERT_TC_4C; \
ba,a 9f; \
8: \
FD_ASSERT_TC_4M; \
9:
#define FD_DEASSERT_TC \
cmp %l5, CPU_SUN4M; \
be 8f; \
nop; \
FD_DEASSERT_TC_4C; \
ba,a 9f; \
8: \
FD_DEASSERT_TC_4M; \
9:
#endif
/* Timeout waiting for chip ready */
#define POLL_TIMO 100000
@ -175,11 +232,7 @@ nextc:
st R_buf, [R_fdc + FDC_DATA]
! flip TC bit in auxreg
sethi %hi(_auxio_reg), %l6
ld [%l6 + %lo(_auxio_reg)], %l6
ldub [%l6], %l7
or %l7, AUXIO_MB1|AUXIO_FTC, %l7
stb %l7, [%l6]
FD_ASSERT_TC
! we have some time to kill; anticipate on upcoming
! result phase.
@ -187,12 +240,8 @@ nextc:
mov -1, %l7
st %l7, [R_fdc + FDC_NSTAT] ! fdc->sc_nstat = -1;
ldub [%l6], %l7
andn %l7, AUXIO_FTC, %l7
or %l7, AUXIO_MB1, %l7
stb %l7, [%l6]
b resultphase1
nop
FD_DEASSERT_TC
b,a resultphase1
spurious:
mov ISTATE_SPURIOUS, %l7