For Ricoh 5c47x class controllers, restore the "misc control" PCI config
register on resume.
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5045be0e4d
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efd8b75c34
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@ -1,4 +1,4 @@
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/* $NetBSD: pccbb.c,v 1.128 2006/04/05 22:16:42 dyoung Exp $ */
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/* $NetBSD: pccbb.c,v 1.129 2006/06/17 17:06:51 jmcneill Exp $ */
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/*
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* Copyright (c) 1998, 1999 and 2000
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.128 2006/04/05 22:16:42 dyoung Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.129 2006/06/17 17:06:51 jmcneill Exp $");
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/*
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#define CBB_DEBUG
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@ -3419,8 +3419,12 @@ pccbb_powerhook(why, arg)
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pci_conf_capture(sc->sc_pc, sc->sc_tag, &sc->sc_pciconf);
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/* ToDo: deactivate or suspend child devices */
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if (sc->sc_chipset == CB_RX5C47X)
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sc->sc_ricoh_misc_ctrl = pci_conf_read(sc->sc_pc,
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sc->sc_tag,
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RICOH_PCI_MISC_CTRL);
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/* ToDo: deactivate or suspend child devices */
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}
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if (why == PWR_RESUME) {
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@ -3450,8 +3454,13 @@ pccbb_powerhook(why, arg)
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goto norestore;
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}
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}
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pci_conf_restore(sc->sc_pc, sc->sc_tag, &sc->sc_pciconf);
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norestore:
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pci_conf_restore(sc->sc_pc, sc->sc_tag, &sc->sc_pciconf);
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if (sc->sc_chipset == CB_RX5C47X) {
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pci_conf_write(sc->sc_pc, sc->sc_tag,
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RICOH_PCI_MISC_CTRL, sc->sc_ricoh_misc_ctrl);
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}
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if (pci_conf_read (sc->sc_pc, sc->sc_tag, PCI_SOCKBASE) == 0)
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/* BIOS did not recover this register */
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@ -1,4 +1,4 @@
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/* $NetBSD: pccbbreg.h,v 1.10 2006/04/25 04:22:15 dyoung Exp $ */
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/* $NetBSD: pccbbreg.h,v 1.11 2006/06/17 17:06:52 jmcneill Exp $ */
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/*
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* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
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*
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@ -137,6 +137,11 @@
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#define CB_BCRI_RL_3E0_ENA 0x08000000
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#define CB_BCRI_RL_3E2_ENA 0x10000000
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/* PCI configuration register definition for Ricoh 5C475 */
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#define RICOH_PCI_MISC_CTRL 0x82
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/*
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* Special resister definition for Toshiba ToPIC95/97
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* These values are borrowed from pcmcia-cs/Linux.
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@ -1,4 +1,4 @@
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/* $NetBSD: pccbbvar.h,v 1.25 2005/12/11 12:22:50 christos Exp $ */
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/* $NetBSD: pccbbvar.h,v 1.26 2006/06/17 17:06:52 jmcneill Exp $ */
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/*
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* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
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*
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@ -165,6 +165,7 @@ struct pccbb_softc {
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int sc_pwrmgt_offs; /* Offset for power management capability */
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struct pci_conf_state sc_pciconf;
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pcireg_t sc_ricoh_misc_ctrl;
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};
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/*
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