Move IPL/spl interrupt code to intr.h; this include file is expected to
exist in some networking code.
This commit is contained in:
simonb
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/* $NetBSD: intr.h,v 1.1 2002/05/25 04:27:21 simonb Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)psl.h 5.2 (Berkeley) 1/18/91
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*/
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#ifndef _NS532_INTR_H_
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#define _NS532_INTR_H_
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#ifdef _KERNEL
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#include <machine/icu.h>
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/*
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* Interrupt levels
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*/
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#define IPL_ZERO 0 /* level 0 */
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#define IPL_HIGH 1 /* block all interrupts */
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#define IPL_BIO 2 /* block I/O */
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#define IPL_NET 3 /* network */
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#define IPL_TTY 4 /* terminal */
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#define IPL_CLOCK 5 /* clock */
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#define IPL_IMP 6 /* memory allocation */
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#define IPL_SOFTCLOCK 7 /* softlock */
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#define IPL_SOFTNET 8 /* softnet */
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#define NIPL 9 /* number of interrupt priority levels */
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#define IPL_NAMES {"zero", "", "bio", "net", "tty", "clock", "imp", \
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"softclock", "softnet" }
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/* IPL_RTTY (for the scn driver) is the same as IPL_HIGH. */
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#define IPL_RTTY IPL_HIGH
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/*
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* Preassigned software interrupts
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*/
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#define SOFTINT 16
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#define SIR_CLOCK (SOFTINT+0)
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#define SIR_CLOCKMASK ((1 << SIR_CLOCK) | (1 << IR_SOFT))
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#define SIR_NET (SOFTINT+1)
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_ALLMASK 0xffff0000
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#ifndef _LOCORE
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/*
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* Structure of the software interrupt table
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*/
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struct iv {
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void (*iv_vec) __P((void *));
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void *iv_arg;
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long iv_level;
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long iv_mask;
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long iv_cnt;
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char *iv_use;
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};
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extern struct iv ivt[];
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extern unsigned int imask[], Cur_pl, sirpending, astpending;
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#if defined(NO_INLINE_SPLX) || defined(DEFINE_SPLX)
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# define INTR_STATIC
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#else
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# define INTR_STATIC static
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#endif
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#if defined(NO_INLINE_SPLX)
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# define INTR_INLINE
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#else
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# define INTR_INLINE __inline
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#endif
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void intr_init __P((void));
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void check_sir __P((void *));
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int intr_establish __P((int, void (*)(void *), void *, char *,
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int, int, int));
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INTR_STATIC INTR_INLINE int splraise __P((unsigned int));
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INTR_STATIC INTR_INLINE int splx __P((unsigned int));
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/*
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* Disable/Enable CPU-Interrupts
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*/
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#define di() /* Removing the nop will give you *BIG* trouble */ \
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__asm __volatile("bicpsrw 0x800 ; nop" : : : "cc")
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#define ei() __asm __volatile("bispsrw 0x800" : : : "cc")
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/*
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* Add a mask to Cur_pl, and return the old value of Cur_pl.
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*/
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#if !defined(NO_INLINE_SPLX) || defined(DEFINE_SPLX)
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INTR_STATIC INTR_INLINE int
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splraise(ncpl)
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register unsigned int ncpl;
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{
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register unsigned int ocpl;
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di();
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ocpl = Cur_pl;
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ncpl |= ocpl;
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ICUW(IMSK) = ncpl;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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}
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/*
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* Restore a value to Cur_pl (cpu interrupts will get unmasked).
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*
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* NOTE: We go to the trouble of returning the old value of cpl for
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* the benefit of some splsoftclock() callers. This extra work is
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* usually optimized away by the compiler.
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*/
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INTR_STATIC INTR_INLINE int
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splx(ncpl)
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register unsigned int ncpl;
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{
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register unsigned int ocpl;
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di();
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ocpl = Cur_pl;
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ICUW(IMSK) = ncpl;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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}
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#endif
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/*
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* Hardware interrupt masks
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*/
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splvm() splraise(imask[IPL_IMP])
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#define splrtty() splraise(imask[IPL_RTTY])
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#define splstatclock() splclock()
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/*
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* Software interrupt masks
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*
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* NOTE: splsoftclock() is used by hardclock() to lower the priority from
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* clock to softclock before it calls softclock().
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*/
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#define spllowersoftclock() splx(imask[IPL_SOFTCLOCK])
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#define splsoftclock() splraise(imask[IPL_SOFTCLOCK])
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#define splsoftnet() splraise(imask[IPL_SOFTNET])
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/*
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* Miscellaneous
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*/
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#define splhigh() splraise(imask[IPL_HIGH])
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#define splsched() splhigh()
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#define spllock() splhigh()
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#define spl0() splx(imask[IPL_ZERO])
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#define splnone() spl0()
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/*
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* Software interrupt registration
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*/
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#define softintr(n) ((sirpending |= (1 << (n))), setsofticu(IR_SOFT))
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#define setsoftast() (astpending = 1)
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#define setsoftclock() softintr(SIR_CLOCK)
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#define setsoftnet() softintr(SIR_NET)
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#undef INTR_INLINE
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#undef INTR_STATIC
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#endif /* !_LOCORE */
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#endif /* _KERNEL */
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#endif /* _NS532_INTR_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: psl.h,v 1.26 2001/04/13 23:30:03 thorpej Exp $ */
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/* $NetBSD: psl.h,v 1.27 2002/05/25 04:27:22 simonb Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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@ -64,160 +64,4 @@
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/* The PSR versions ... */
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#define PSR_USR PSL_USER
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#ifdef _KERNEL
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#include <machine/icu.h>
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/*
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* Interrupt levels
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*/
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#define IPL_ZERO 0 /* level 0 */
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#define IPL_HIGH 1 /* block all interrupts */
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#define IPL_BIO 2 /* block I/O */
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#define IPL_NET 3 /* network */
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#define IPL_TTY 4 /* terminal */
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#define IPL_CLOCK 5 /* clock */
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#define IPL_IMP 6 /* memory allocation */
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#define IPL_SOFTCLOCK 7 /* softlock */
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#define IPL_SOFTNET 8 /* softnet */
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#define NIPL 9 /* number of interrupt priority levels */
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#define IPL_NAMES {"zero", "", "bio", "net", "tty", "clock", "imp", \
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"softclock", "softnet" }
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/* IPL_RTTY (for the scn driver) is the same as IPL_HIGH. */
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#define IPL_RTTY IPL_HIGH
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/*
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* Preassigned software interrupts
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*/
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#define SOFTINT 16
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#define SIR_CLOCK (SOFTINT+0)
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#define SIR_CLOCKMASK ((1 << SIR_CLOCK) | (1 << IR_SOFT))
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#define SIR_NET (SOFTINT+1)
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_ALLMASK 0xffff0000
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#ifndef _LOCORE
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/*
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* Structure of the software interrupt table
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*/
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struct iv {
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void (*iv_vec) __P((void *));
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void *iv_arg;
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long iv_level;
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long iv_mask;
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long iv_cnt;
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char *iv_use;
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};
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extern struct iv ivt[];
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extern unsigned int imask[], Cur_pl, sirpending, astpending;
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#if defined(NO_INLINE_SPLX) || defined(DEFINE_SPLX)
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# define PSL_STATIC
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#else
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# define PSL_STATIC static
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#endif
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#if defined(NO_INLINE_SPLX)
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# define PSL_INLINE
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#else
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# define PSL_INLINE __inline
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#endif
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void intr_init __P((void));
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void check_sir __P((void *));
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int intr_establish __P((int, void (*)(void *), void *, char *,
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int, int, int));
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PSL_STATIC PSL_INLINE int splraise __P((unsigned int));
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PSL_STATIC PSL_INLINE int splx __P((unsigned int));
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/*
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* Disable/Enable CPU-Interrupts
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*/
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#define di() /* Removing the nop will give you *BIG* trouble */ \
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__asm __volatile("bicpsrw 0x800 ; nop" : : : "cc")
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#define ei() __asm __volatile("bispsrw 0x800" : : : "cc")
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/*
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* Add a mask to Cur_pl, and return the old value of Cur_pl.
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*/
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#if !defined(NO_INLINE_SPLX) || defined(DEFINE_SPLX)
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PSL_STATIC PSL_INLINE int
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splraise(ncpl)
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register unsigned int ncpl;
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{
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register unsigned int ocpl;
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di();
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ocpl = Cur_pl;
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ncpl |= ocpl;
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ICUW(IMSK) = ncpl;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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}
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/*
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* Restore a value to Cur_pl (cpu interrupts will get unmasked).
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*
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* NOTE: We go to the trouble of returning the old value of cpl for
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* the benefit of some splsoftclock() callers. This extra work is
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* usually optimized away by the compiler.
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*/
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PSL_STATIC PSL_INLINE int
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splx(ncpl)
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register unsigned int ncpl;
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{
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register unsigned int ocpl;
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di();
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ocpl = Cur_pl;
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ICUW(IMSK) = ncpl;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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}
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#endif
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/*
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* Hardware interrupt masks
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*/
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splvm() splraise(imask[IPL_IMP])
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#define splrtty() splraise(imask[IPL_RTTY])
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#define splstatclock() splclock()
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/*
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* Software interrupt masks
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*
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* NOTE: splsoftclock() is used by hardclock() to lower the priority from
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* clock to softclock before it calls softclock().
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*/
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#define spllowersoftclock() splx(imask[IPL_SOFTCLOCK])
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#define splsoftclock() splraise(imask[IPL_SOFTCLOCK])
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#define splsoftnet() splraise(imask[IPL_SOFTNET])
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/*
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* Miscellaneous
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*/
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#define splhigh() splraise(imask[IPL_HIGH])
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#define splsched() splhigh()
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#define spllock() splhigh()
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#define spl0() splx(imask[IPL_ZERO])
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#define splnone() spl0()
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/*
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* Software interrupt registration
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*/
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#define softintr(n) ((sirpending |= (1 << (n))), setsofticu(IR_SOFT))
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#define setsoftast() (astpending = 1)
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#define setsoftclock() softintr(SIR_CLOCK)
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#define setsoftnet() softintr(SIR_NET)
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#undef PSL_INLINE
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#undef PSL_STATIC
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#endif /* !_LOCORE */
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#endif /* _KERNEL */
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#endif /* _NS532_PSL_H_ */
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