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Port viadrm to NetBSD and fix a bunch of compile issues:

Browse Source 
viadrm0 at vga1: VIA P4M900 / VN896
 viadrm0: AGP at 0xf0000000 128MB
 viadrm0: Initialized via 2.11.1 20070202

xf86-video-openchrome seems happy with it, although 3d acceleration isn't
supported on the P4M900 so I can't test that part.
This commit is contained in:
jmcneill 2009-09-27 12:39:04 +00:00
parent 0719ca07be
commit ef43763f40
9 changed files with 174 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

95
sys/external/bsd/drm/dist/bsd-core/via_drv.c vendored
View File

@ -63,12 +63,13 @@ static void via_configure(struct drm_device *dev)
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
dev->driver->date = VIA_DRM_DRIVER_DATE;
dev->driver->major = VIA_DRM_DRIVER_MAJOR;
dev->driver->minor = VIA_DRM_DRIVER_MINOR;
dev->driver->patchlevel = VIA_DRM_DRIVER_PATCHLEVEL;
}
#if defined(__FreeBSD__)
static int
via_probe(device_t kdev)
{
@ -119,3 +120,89 @@ static driver_t via_driver = {
extern devclass_t drm_devclass;
DRIVER_MODULE(via, pci, via_driver, drm_devclass, 0, 0);
MODULE_DEPEND(via, drm, 1, 1, 1);
#elif defined(__NetBSD__)
static int
viadrm_probe(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, via_pciidlist);
}
static void
viadrm_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct drm_device *dev = device_private(self);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
via_configure(dev);
drm_attach(self, pa, via_pciidlist);
}
CFATTACH_DECL_NEW(viadrm, sizeof(struct drm_device),
viadrm_probe, viadrm_attach, drm_detach, drm_activate);
#ifdef _MODULE
MODULE(MODULE_CLASS_DRIVER, viadrm, NULL);
CFDRIVER_DECL(viadrm, DV_DULL, NULL);
extern struct cfattach viadrm_ca;
static int drmloc[] = { -1 };
static struct cfparent drmparent = {
"drm", "vga", DVUNIT_ANY
};
static struct cfdata viadrm_cfdata[] = {
{
.cf_name = "viadrm",
.cf_atname = "viadrm",
.cf_unit = 0,
.cf_fstate = FSTATE_STAR,
.cf_loc = drmloc,
.cf_flags = 0,
.cf_pspec = &drmparent,
},
{ NULL }
};
static int
viadrm_modcmd(modcmd_t cmd, void *arg)
{
int err;
switch (cmd) {
case MODULE_CMD_INIT:
err = config_cfdriver_attach(&viadrm_cd);
if (err)
return err;
err = config_cfattach_attach("viadrm", &viadrm_ca);
if (err) {
config_cfdriver_detach(&viadrm_cd);
return err;
}
err = config_cfdata_attach(viadrm_cfdata, 1);
if (err) {
config_cfattach_detach("viadrm", &viadrm_ca);
config_cfdriver_detach(&viadrm_cd);
return err;
}
return 0;
case MODULE_CMD_FINI:
err = config_cfdata_detach(viadrm_cfdata);
if (err)
return err;
config_cfattach_detach("viadrm", &viadrm_ca);
config_cfdriver_detach(&viadrm_cd);
return 0;
default:
return ENOTTY;
}
}
#endif /* _MODULE */
#endif

2
sys/external/bsd/drm/dist/shared-core/via_dma.c vendored
View File

@ -114,7 +114,7 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
return -1;
}
if ((cur_addr < hw_addr) && (next_addr >= hw_addr))
msleep(1);
delay(1000);
} while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
return 0;
}

4
sys/external/bsd/drm/dist/shared-core/via_drv.c vendored
View File

@ -60,8 +60,8 @@ static uint32_t via_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_PRIV0, DRM_BO_MEM_
static struct drm_bo_driver via_bo_driver = {
.mem_type_prio = via_mem_prios,
.mem_busy_prio = via_busy_prios,
.num_mem_type_prio = ARRAY_SIZE(via_mem_prios),
.num_mem_busy_prio = ARRAY_SIZE(via_busy_prios),
.num_mem_type_prio = DRM_ARRAY_SIZE(via_mem_prios),
.num_mem_busy_prio = DRM_ARRAY_SIZE(via_busy_prios),
.create_ttm_backend_entry = via_create_ttm_backend_entry,
.fence_type = via_fence_types,
.invalidate_caches = via_invalidate_caches,

58
sys/external/bsd/drm/dist/shared-core/via_drv.h vendored
View File

@ -24,7 +24,9 @@
#ifndef _VIA_DRV_H_
#define _VIA_DRV_H_
#ifdef VIA_HAVE_CORE_MM
#include "drm_sman.h"
#endif
#define DRIVER_AUTHOR "Various"
#define DRIVER_NAME "via"
@ -51,7 +53,63 @@
#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */
#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */
#if defined(__NetBSD__)
/*
* PCI DMA Registers
* Channels 2 & 3 don't seem to be implemented in hardware.
*/
#define VIA_PCI_DMA_MAR0 0xE40 /* Memory Address Register of Channel 0 */
#define VIA_PCI_DMA_DAR0 0xE44 /* Device Address Register of Channel 0 */
#define VIA_PCI_DMA_BCR0 0xE48 /* Byte Count Register of Channel 0 */
#define VIA_PCI_DMA_DPR0 0xE4C /* Descriptor Pointer Register of Channel 0 */
#define VIA_PCI_DMA_MAR1 0xE50 /* Memory Address Register of Channel 1 */
#define VIA_PCI_DMA_DAR1 0xE54 /* Device Address Register of Channel 1 */
#define VIA_PCI_DMA_BCR1 0xE58 /* Byte Count Register of Channel 1 */
#define VIA_PCI_DMA_DPR1 0xE5C /* Descriptor Pointer Register of Channel 1 */
#define VIA_PCI_DMA_MAR2 0xE60 /* Memory Address Register of Channel 2 */
#define VIA_PCI_DMA_DAR2 0xE64 /* Device Address Register of Channel 2 */
#define VIA_PCI_DMA_BCR2 0xE68 /* Byte Count Register of Channel 2 */
#define VIA_PCI_DMA_DPR2 0xE6C /* Descriptor Pointer Register of Channel 2 */
#define VIA_PCI_DMA_MAR3 0xE70 /* Memory Address Register of Channel 3 */
#define VIA_PCI_DMA_DAR3 0xE74 /* Device Address Register of Channel 3 */
#define VIA_PCI_DMA_BCR3 0xE78 /* Byte Count Register of Channel 3 */
#define VIA_PCI_DMA_DPR3 0xE7C /* Descriptor Pointer Register of Channel 3 */
#define VIA_PCI_DMA_MR0 0xE80 /* Mode Register of Channel 0 */
#define VIA_PCI_DMA_MR1 0xE84 /* Mode Register of Channel 1 */
#define VIA_PCI_DMA_MR2 0xE88 /* Mode Register of Channel 2 */
#define VIA_PCI_DMA_MR3 0xE8C /* Mode Register of Channel 3 */
#define VIA_PCI_DMA_CSR0 0xE90 /* Command/Status Register of Channel 0 */
#define VIA_PCI_DMA_CSR1 0xE94 /* Command/Status Register of Channel 1 */
#define VIA_PCI_DMA_CSR2 0xE98 /* Command/Status Register of Channel 2 */
#define VIA_PCI_DMA_CSR3 0xE9C /* Command/Status Register of Channel 3 */
#define VIA_PCI_DMA_PTR 0xEA0 /* Priority Type Register */
/* Define for DMA engine */
/* DPR */
#define VIA_DMA_DPR_EC (1<<1) /* end of chain */
#define VIA_DMA_DPR_DDIE (1<<2) /* descriptor done interrupt enable */
#define VIA_DMA_DPR_DT (1<<3) /* direction of transfer (RO) */
/* MR */
#define VIA_DMA_MR_CM (1<<0) /* chaining mode */
#define VIA_DMA_MR_TDIE (1<<1) /* transfer done interrupt enable */
#define VIA_DMA_MR_HENDMACMD (1<<7) /* ? */
/* CSR */
#define VIA_DMA_CSR_DE (1<<0) /* DMA enable */
#define VIA_DMA_CSR_TS (1<<1) /* transfer start */
#define VIA_DMA_CSR_TA (1<<2) /* transfer abort */
#define VIA_DMA_CSR_TD (1<<3) /* transfer done */
#define VIA_DMA_CSR_DD (1<<4) /* descriptor done */
#define VIA_DMA_DPR_EC (1<<1) /* end of chain */
#endif
#if defined(__linux__)
#include "via_dmablit.h"

14
sys/external/bsd/drm/dist/shared-core/via_ds.c vendored
View File

@ -46,16 +46,16 @@ set_t *via_setInit(void)
int via_setAdd(set_t * set, ITEM_TYPE item)
{
int free = set->free;
if (free != -1) {
set->list[free].val = item;
set->free = set->list[free].free_next;
int sfree = set->free;
if (sfree != -1) {
set->list[sfree].val = item;
set->free = set->list[sfree].free_next;
} else {
return 0;
}
set->list[free].alloc_next = set->alloc;
set->alloc = free;
set->list[free].free_next = -1;
set->list[sfree].alloc_next = set->alloc;
set->alloc = sfree;
set->list[sfree].free_next = -1;
return 1;
}

4
sys/external/bsd/drm/dist/shared-core/via_irq.c vendored
View File

@ -76,7 +76,7 @@ static maskarray_t via_pro_group_a_irqs[] = {
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008},
};
static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs);
static int via_num_pro_group_a = DRM_ARRAY_SIZE(via_pro_group_a_irqs);
static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3};
static maskarray_t via_unichrome_irqs[] = {
@ -85,7 +85,7 @@ static maskarray_t via_unichrome_irqs[] = {
{VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}
};
static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs);
static int via_num_unichrome = DRM_ARRAY_SIZE(via_unichrome_irqs);
static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1};

2
sys/external/bsd/drm/dist/shared-core/via_map.c vendored
View File

@ -127,7 +127,9 @@ int via_driver_load(struct drm_device *dev, unsigned long chipset)
ret = drm_vblank_init(dev, 1);
if (ret) {
#ifdef VIA_HAVE_CORE_MM
drm_sman_takedown(&dev_priv->sman);
#endif
drm_free(dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
return ret;
}

10
sys/external/bsd/drm/dist/shared-core/via_mm.c vendored
View File

@ -91,10 +91,10 @@ int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_via_fb_t *fb = data;
FBHeap = via_mmInit(fb.offset, fb.size);
FBHeap = via_mmInit(fb->offset, fb->size);
DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb.offset,
(unsigned long)fb.size);
DRM_DEBUG("offset = %lu, size = %lu", (unsigned long)fb->offset,
(unsigned long)fb->size);
return 0;
}
@ -190,7 +190,7 @@ int via_mem_alloc(struct drm_device *dev, void *data, struct drm_file *file_priv
{
drm_via_mem_t *mem = data;
switch (mem.type) {
switch (mem->type) {
case VIA_MEM_VIDEO:
if (via_fb_alloc(mem) < 0)
return -EFAULT;
@ -341,7 +341,7 @@ static int via_agp_free(drm_via_mem_t * mem)
retval = -1;
}
DRM_DEBUG("free agp, free = %ld\n", agp.nfree);
DRM_DEBUG("free agp, free = %ld\n", agp.free);
return retval;
}

12
sys/external/bsd/drm/dist/shared-core/via_verifier.c vendored
View File

@ -349,17 +349,17 @@ static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq)
}
static __inline__ int
investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq)
investigate_hazard(uint32_t cmd, hazard_t haz, drm_via_state_t * cur_seq)
{
register uint32_t tmp, *tmp_addr;
if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) {
if (cur_seq->unfinished && (cur_seq->unfinished != seqs[haz])) {
int ret;
if ((ret = finish_current_sequence(cur_seq)))
return ret;
}
switch (hz) {
switch (haz) {
case check_for_header2:
if (cmd == HALCYON_HEADER2)
return 1;
@ -631,7 +631,7 @@ via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
{
uint32_t cmd;
int hz_mode;
hazard_t hz;
hazard_t haz;
const uint32_t *buf = *buffer;
const hazard_t *hz_table;
@ -698,8 +698,8 @@ via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
while (buf < buf_end) {
cmd = *buf++;
if ((hz = hz_table[cmd >> 24])) {
if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
if ((haz = hz_table[cmd >> 24])) {
if ((hz_mode = investigate_hazard(cmd, haz, hc_state))) {
if (hz_mode == 1) {
buf--;
break;