- get rid of private bus space in ingenic_com.c
- move com to apbus - attach the other UARTs
This commit is contained in:
macallan
parent
1e82b93929
commit
ede3c3ba87
@ -1,4 +1,4 @@
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# $NetBSD: CI20,v 1.13 2015/04/06 14:12:28 martin Exp $
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# $NetBSD: CI20,v 1.14 2015/07/11 19:00:04 macallan Exp $
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#
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# MIPS Creator CI20
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#
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@ -7,7 +7,7 @@ include "arch/evbmips/conf/std.ingenic"
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#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "CI20-$Revision: 1.13 $"
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#ident "CI20-$Revision: 1.14 $"
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maxusers 32
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@ -43,7 +43,7 @@ options NTP # network time protocol
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# Debugging options
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options DIAGNOSTIC # extra kernel sanity checking
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options DEBUG # extra kernel debugging support
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#options DEBUG # extra kernel debugging support
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#options KMEMSTATS # kernel memory statistics (vmstat -m)
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#options USERCONF # userconf(4) support
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#options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
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@ -134,15 +134,19 @@ options NFS_BOOT_DHCP
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config netbsd root on sd0a type ffs
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#config netbsd root on axe0 type nfs
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#config netbsd root on dme0 type nfs
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mainbus0 at root
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#options MULTIPROCESSOR
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cpu0 at mainbus?
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#wdog0 at mainbus?
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com* at mainbus?
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apbus0 at mainbus?
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# On-board USB
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# On-chip UARTs
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com* at apbus?
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# On-chip USB
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dwctwo* at apbus?
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#options DWC2_DEBUG
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usb* at dwctwo?
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@ -150,17 +154,18 @@ usb* at dwctwo?
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ohci* at apbus?
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usb* at ohci?
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# this one doesn't work yet
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# this one doesn't work right just yet
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#ehci* at apbus?
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#options INGENIC_EHCI_DEBUG
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#options EHCI_DEBUG
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#options USBVERBOSE
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#options USBHIST
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#usb* at ehci?
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# onboard ethernet
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dme* at apbus?
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# I2C/SMBus
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# Work in progress - can't do transfers over 15 bytes per direction,
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# no interrupts etc.
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# Good enough for talking to an RTC though, so it's enabled.
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jziic* at apbus?
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#options JZIIC_DEBUG # spammy
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iic* at jziic?
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@ -182,6 +187,12 @@ pcf8563rtc0 at iic4 addr 0x51
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#jzgpio* at apbus? addr ?
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#gpio* at jzgpio?
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# MSC / SDMMC - unfinished
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#jzmmc* at apbus?
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#options JZMMC_DEBUG
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#sdmmc* at jzmmc?
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#ld* at sdmmc?
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# USB stuff
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uhub* at usb?
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uhub* at uhub? port ?
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.8 2015/06/30 02:39:03 matt Exp $ */
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/* $NetBSD: machdep.c,v 1.9 2015/07/11 19:00:04 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.8 2015/06/30 02:39:03 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.9 2015/07/11 19:00:04 macallan Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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@ -242,6 +242,7 @@ consinit(void)
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* Everything related to console initialization is done
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* in mach_init().
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*/
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apbus_init();
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ingenic_com_cnattach();
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}
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@ -1,18 +1,19 @@
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# $NetBSD: files.ingenic,v 1.5 2015/04/04 12:28:52 macallan Exp $
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# $NetBSD: files.ingenic,v 1.6 2015/07/11 19:00:04 macallan Exp $
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include "dev/scsipi/files.scsipi" # SCSI devices
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include "dev/ata/files.ata" # ATA devices
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include "dev/usb/files.usb" # USB devices
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# On-chip UART device
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attach com at mainbus with com_mainbus
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file arch/mips/ingenic/ingenic_com.c com_mainbus
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# Ingenic system bus
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device apbus { [addr=-1] }
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attach apbus at mainbus
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file arch/mips/ingenic/apbus.c apbus
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# On-chip UART device
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attach com at apbus with ingenic_com
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file arch/mips/ingenic/ingenic_com.c ingenic_com
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options COM_REGMAP
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# USB
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attach dwctwo at apbus with ingenic_dwctwo
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file arch/mips/ingenic/ingenic_dwctwo.c ingenic_dwctwo needs-flag
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@ -22,6 +23,7 @@ file arch/mips/ingenic/ingenic_ohci.c ingenic_ohci needs-flag
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attach ehci at apbus with ingenic_ehci
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file arch/mips/ingenic/ingenic_ehci.c ingenic_ehci needs-flag
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defflag opt_ingenic.h INGENIC_EHCI_DEBUG
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# Ethernet
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attach dme at apbus with ingenic_dme
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@ -32,3 +34,9 @@ device jziic : i2cbus
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attach jziic at apbus
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file arch/mips/ingenic/jziic.c jziic
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defflag opt_ingenic.h JZIIC_DEBUG
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# SDMMC
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device jzmmc : sdmmcbus
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attach jzmmc at apbus
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file arch/mips/ingenic/jzmmc.c jzmmc
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defflag opt_ingenic.h JZMMC_DEBUG
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@ -1,4 +1,4 @@
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/* $NetBSD: apbus.c,v 1.15 2015/05/18 15:07:52 macallan Exp $ */
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/* $NetBSD: apbus.c,v 1.16 2015/07/11 19:00:04 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -29,7 +29,7 @@
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/* catch-all for on-chip peripherals */
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.15 2015/05/18 15:07:52 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.16 2015/07/11 19:00:04 macallan Exp $");
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#include "locators.h"
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#define _MIPS_BUS_DMA_PRIVATE
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@ -72,6 +72,11 @@ typedef struct apbus_dev {
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} apbus_dev_t;
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static const apbus_dev_t apbus_devs[] = {
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{ "com", JZ_UART0, 51, CLK_UART0, 0, 0},
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{ "com", JZ_UART1, 50, CLK_UART1, 0, 0},
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{ "com", JZ_UART2, 49, CLK_UART2, 0, 0},
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{ "com", JZ_UART3, 48, CLK_UART3, 0, 0},
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{ "com", JZ_UART4, 34, 0, CLK_UART4, 0},
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{ "dwctwo", JZ_DWC2_BASE, 21, CLK_OTG0 | CLK_UHC, CLK_OTG1, 0},
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{ "ohci", JZ_OHCI_BASE, 5, CLK_UHC, 0, 0},
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{ "ehci", JZ_EHCI_BASE, 20, CLK_UHC, 0, 0},
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@ -181,7 +186,7 @@ apbus_attach(device_t parent, device_t self, void *aux)
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gpio_as_dev1(4, 12);
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gpio_as_dev1(4, 13);
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/* these can be DDC2 or SMB4 */
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#if 1
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#if 0
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/* DDC2 devices show up at SMB4 */
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gpio_as_dev1(5, 24);
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gpio_as_dev1(5, 25);
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@ -219,7 +224,7 @@ apbus_attach(device_t parent, device_t self, void *aux)
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gpio_as_dev0(1, 30);
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gpio_as_dev0(1, 31);
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#ifdef INGENIC_DEBUG
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#ifndef INGENIC_DEBUG
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printf("JZ_CLKGR0 %08x\n", readreg(JZ_CLKGR0));
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printf("JZ_CLKGR1 %08x\n", readreg(JZ_CLKGR1));
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printf("JZ_SPCR0 %08x\n", readreg(JZ_SPCR0));
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@ -1,4 +1,4 @@
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/* $NetBSD: ingenic_com.c,v 1.4 2015/03/07 15:35:33 macallan Exp $ */
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/* $NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $ */
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/*-
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* Copyright (c) 2014 Michael Lorenz
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.4 2015/03/07 15:35:33 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -45,10 +45,15 @@ __KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.4 2015/03/07 15:35:33 macallan Exp
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#include <mips/cpuregs.h>
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#include <mips/ingenic/ingenic_var.h>
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#include <mips/ingenic/ingenic_regs.h>
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#include "opt_com.h"
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#ifndef COM_REGMAP
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#error We need COM_REGMAP
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#endif
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volatile int32_t *com0addr = (int32_t *)MIPS_PHYS_TO_KSEG1(JZ_UART0);
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void ingenic_putchar_init(void);
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@ -60,9 +65,6 @@ void ingenic_putchar(char);
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#endif
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static struct mips_bus_space ingenic_com_mbst;
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static int mbst_valid = 0;
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static void ingenic_com_bus_mem_init(bus_space_tag_t, void *);
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void ingenic_com_cnattach(void);
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static int ingenic_com_match(device_t, cfdata_t , void *);
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@ -70,12 +72,17 @@ static void ingenic_com_attach(device_t, device_t, void *);
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struct ingenic_com_softc {
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struct com_softc sc_com;
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bus_space_tag_t sc_tag;
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bus_space_handle_t sc_regh;
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};
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CFATTACH_DECL_NEW(com_mainbus, sizeof(struct ingenic_com_softc),
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CFATTACH_DECL_NEW(ingenic_com, sizeof(struct ingenic_com_softc),
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ingenic_com_match, ingenic_com_attach, NULL, NULL);
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bus_space_handle_t regh = 0;
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static bus_space_handle_t regh = 0;
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static bus_addr_t cons_com = 0;
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static struct com_regs regs;
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extern bus_space_tag_t apbus_memt;
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void
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ingenic_putchar_init(void)
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@ -138,31 +145,20 @@ ingenic_puts(const char *restrict s)
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ingenic_putchar(c);
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}
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static void
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ingenic_com_bus_init(void)
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{
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if (mbst_valid) return;
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ingenic_com_bus_mem_init(&ingenic_com_mbst, NULL);
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mbst_valid = 1;
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}
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void
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ingenic_com_cnattach(void)
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{
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struct com_regs regs;
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int i;
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ingenic_com_bus_init();
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bus_space_map(&ingenic_com_mbst, 0, 0x1000, 0, ®h);
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bus_space_map(apbus_memt, JZ_UART0, 0x100, 0, ®h);
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cons_com = JZ_UART0;
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memset(®s, 0, sizeof(regs));
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COM_INIT_REGS(regs, &ingenic_com_mbst, regh, 0);
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COM_INIT_REGS(regs, apbus_memt, regh, JZ_UART0);
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for (i = 0; i < 16; i++) {
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regs.cr_map[i] = regs.cr_map[i] << 2;
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}
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regs.cr_nports = 32;
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/*
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* XXX
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* UART clock is either 6MHz or 12MHz, the manual is rather unclear
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* so we just leave alone whatever u-boot set up
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* my uplcom is too tolerant to show any difference
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*/
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comcnattach1(®s, 115200, 48000000, COM_TYPE_INGENIC, CONMODE);
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}
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@ -182,24 +178,25 @@ ingenic_com_attach(device_t parent, device_t self, void *args)
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{
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struct ingenic_com_softc *isc = device_private(self);
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struct com_softc *sc = &isc->sc_com;
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struct apbus_attach_args *aa = args;
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int i;
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sc->sc_dev = self;
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sc->sc_frequency = 48000000;
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sc->sc_type = COM_TYPE_INGENIC;
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isc->sc_tag = aa->aa_bst;
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if (cons_com == aa->aa_addr) {
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isc->sc_regh = regh;
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} else {
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bus_space_map(apbus_memt, aa->aa_addr, 0x1000, 0, &isc->sc_regh);
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}
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memset(&sc->sc_regs, 0, sizeof(sc->sc_regs));
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COM_INIT_REGS(sc->sc_regs, &ingenic_com_mbst, regh, 0);
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COM_INIT_REGS(sc->sc_regs, aa->aa_bst, isc->sc_regh, aa->aa_addr);
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for (i = 0; i < 16; i++)
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sc->sc_regs.cr_map[i] = sc->sc_regs.cr_map[i] << 2;
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sc->sc_regs.cr_nports = 32;
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com_attach_subr(sc);
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printf("\n");
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evbmips_intr_establish(51, comintr, sc);
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evbmips_intr_establish(aa->aa_irq, comintr, sc);
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}
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#define CHIP ingenic_com
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#define CHIP_MEM /* defined */
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#define CHIP_W1_BUS_START(v) 0x00000000UL
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#define CHIP_W1_BUS_END(v) 0x00010000UL
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#define CHIP_W1_SYS_START(v) 0x10030000UL
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#define CHIP_W1_SYS_END(v) 0x10035000UL
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#define CHIP_ACCESS_SIZE 1
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#define CHIP_ALIGN_STRIDE 2
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#include <mips/mips/bus_space_alignstride_chipdep.c>
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