Get the EXYNOS kernel building again with recent FDT changes. Untested.

This commit is contained in:
jmcneill 2017-06-10 15:13:18 +00:00
parent cd7b32deaa
commit edda5141bb
14 changed files with 345 additions and 1132 deletions

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@ -1,77 +0,0 @@
/* $NetBSD: exynos5422_dma.c,v 1.1 2015/12/11 04:05:54 marty Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Nick Hudson
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "opt_exynos.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: exynos5422_dma.c,v 1.1 2015/12/11 04:05:54 marty Exp $");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
#include <sys/bus.h>
#include <arm/samsung/exynos_reg.h>
#include <arm/samsung/exynos_var.h>
struct arm32_bus_dma_tag exynos_bus_dma_tag = {
_BUS_DMAMAP_FUNCS,
_BUS_DMAMEM_FUNCS,
_BUS_DMATAG_FUNCS,
};
struct arm32_dma_range exynos_coherent_dma_ranges[1] = {
[0] = {
.dr_sysbase = 0, /* filled in */
.dr_busbase = 0, /* filled in */
.dr_flags = _BUS_DMAMAP_COHERENT,
},
};
struct arm32_bus_dma_tag exynos_coherent_bus_dma_tag = {
._ranges = exynos_coherent_dma_ranges,
._nranges = __arraycount(exynos_coherent_dma_ranges),
_BUS_DMAMAP_FUNCS,
_BUS_DMAMEM_FUNCS,
_BUS_DMATAG_FUNCS,
};
void
exynos_dma_bootstrap(psize_t memsize)
{
bus_addr_t dram_base = EXYNOS5_SDRAM_PBASE;
KASSERT(dram_base);
exynos_coherent_dma_ranges[0].dr_sysbase = dram_base;
exynos_coherent_dma_ranges[0].dr_busbase = dram_base;
exynos_coherent_dma_ranges[0].dr_len = memsize;
}

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@ -1,80 +0,0 @@
/* $NetBSD: exynos_fdt.c,v 1.4 2017/04/16 15:52:16 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "opt_exynos.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: exynos_fdt.c,v 1.4 2017/04/16 15:52:16 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/cpu.h>
#include <sys/bus.h>
#include <arm/mainbus/mainbus.h>
#include <arm/samsung/exynos_reg.h>
#include <arm/samsung/exynos_var.h>
#include <dev/fdt/fdtvar.h>
#include <dev/ofw/openfirm.h>
static int exynosfdt_match(device_t, cfdata_t, void *);
static void exynosfdt_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(exynos_fdt, 0,
exynosfdt_match, exynosfdt_attach, NULL, NULL);
static bool exynosfdt_found = false;
int
exynosfdt_match(device_t parent, cfdata_t cf, void *aux)
{
if (exynosfdt_found)
return 0;
return 1;
}
void
exynosfdt_attach(device_t parent, device_t self, void *aux)
{
exynosfdt_found = true;
aprint_naive("\n");
aprint_normal("\n");
struct fdt_attach_args faa = {
.faa_name = "",
.faa_bst = &armv7_generic_bs_tag,
.faa_a4x_bst = &armv7_generic_a4x_bs_tag,
.faa_dmat = &exynos_bus_dma_tag,
.faa_phandle = OF_peer(0),
};
config_found(self, &faa, NULL);
}

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@ -1,4 +1,4 @@
/* $NetBSD: exynos_intr.h,v 1.2 2014/09/05 08:01:05 skrll Exp $ */
/* $NetBSD: exynos_intr.h,v 1.3 2017/06/10 15:13:18 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -32,18 +32,6 @@
#ifndef _ARM_SAMSUNG_EXYNOS_INTR_H_
#define _ARM_SAMSUNG_EXYNOS_INTR_H_
#define PIC_MAXSOURCES GIC_MAXSOURCES(224)
#define PIC_MAXMAXSOURCES (PIC_MAXSOURCES + 32) /* XXX */
/*
* The Exynos uses a generic interrupt controller
*/
#include <arm/cortex/gic_intr.h>
#ifdef _KERNEL_OPT
#include "opt_exynos.h"
#endif
/*
* The GIC supports
* - 16 Software Generated Interrupts (SGIs)
@ -61,9 +49,5 @@
#define IRQ_MCT_LTIMER IRQ_PPI(12)
#ifdef EXYNOS5
#include <arm/cortex/gtmr_intr.h>
#endif
#endif /* _ARM_SAMSUNG_EXYNOS_INTR_H_ */

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@ -0,0 +1,143 @@
/* $NetBSD: exynos_platform.c,v 1.1 2017/06/10 15:13:18 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "opt_exynos.h"
#include "opt_multiprocessor.h"
#include "opt_fdt_arm.h"
#include "ukbd.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.1 2017/06/10 15:13:18 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <sys/device.h>
#include <sys/termios.h>
#include <dev/fdt/fdtvar.h>
#include <uvm/uvm_extern.h>
#include <machine/bootconfig.h>
#include <arm/cpufunc.h>
#include <arm/samsung/exynos_reg.h>
#include <arm/samsung/exynos_var.h>
#include <arm/cortex/gtmr_var.h>
#include <arm/fdt/arm_fdtvar.h>
#define EXYNOS_CORE_VBASE 0xf0000000
#define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET)
#define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE)
#define DEVMAP_ENTRY(va, pa, sz) \
{ \
.pd_va = DEVMAP_ALIGN(va), \
.pd_pa = DEVMAP_ALIGN(pa), \
.pd_size = DEVMAP_SIZE(sz), \
.pd_prot = VM_PROT_READ|VM_PROT_WRITE, \
.pd_cache = PTE_NOCACHE \
}
#define DEVMAP_ENTRY_END { 0 }
static const struct pmap_devmap *
exynos_platform_devmap(void)
{
static const struct pmap_devmap devmap[] = {
DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
EXYNOS_CORE_PBASE,
EXYNOS_CORE_SIZE),
DEVMAP_ENTRY_END
};
return devmap;
}
static void
exynos_platform_bootstrap(void)
{
exynos_bootstrap(EXYNOS_CORE_PBASE, 0 /* XXX */);
}
static void
exynos_platform_init_attach_args(struct fdt_attach_args *faa)
{
extern struct bus_space armv7_generic_bs_tag;
extern struct bus_space armv7_generic_a4x_bs_tag;
extern struct arm32_bus_dma_tag armv7_generic_dma_tag;
faa->faa_bst = &armv7_generic_bs_tag;
faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
faa->faa_dmat = &armv7_generic_dma_tag;
}
static void
exynos_platform_early_putchar(char c)
{
}
static void
exynos_platform_device_register(device_t self, void *aux)
{
exynos_device_register(self, aux);
}
static void
exynos_platform_reset(void)
{
printf("%s: not implemented\n", __func__);
}
static void
exynos_platform_delay(u_int us)
{
gtmr_delay(us);
}
static u_int
exynos_platform_uart_freq(void)
{
return EXYNOS_UART_FREQ;
}
static const struct arm_platform exynos5_platform = {
.devmap = exynos_platform_devmap,
.bootstrap = exynos_platform_bootstrap,
.init_attach_args = exynos_platform_init_attach_args,
.early_putchar = exynos_platform_early_putchar,
.device_register = exynos_platform_device_register,
.reset = exynos_platform_reset,
.delay = exynos_platform_delay,
.uart_freq = exynos_platform_uart_freq,
};
ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);

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@ -1,4 +1,4 @@
/* $NetBSD: exynos_reg.h,v 1.13 2014/09/30 14:20:55 reinoud Exp $ */
/* $NetBSD: exynos_reg.h,v 1.14 2017/06/10 15:13:18 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -97,10 +97,10 @@
#define EXYNOS_BLOCK_SIZE 0x00010000
#if defined(EXYNOS5)
#if defined(SOC_EXYNOS5)
#include <arm/samsung/exynos5_reg.h>
#endif
#if defined(EXYNOS4)
#if defined(SOC_EXYNOS4)
#include <arm/samsung/exynos4_reg.h>
#endif

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@ -1,4 +1,4 @@
/* $NetBSD: exynos_soc.c,v 1.31 2015/12/21 04:58:50 marty Exp $ */
/* $NetBSD: exynos_soc.c,v 1.32 2017/06/10 15:13:18 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -31,10 +31,8 @@
#include "opt_exynos.h"
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/cdefs.h>
__KERNEL_RCSID(1, "$NetBSD: exynos_soc.c,v 1.31 2015/12/21 04:58:50 marty Exp $");
__KERNEL_RCSID(1, "$NetBSD: exynos_soc.c,v 1.32 2017/06/10 15:13:18 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -76,7 +74,7 @@ struct cpu_freq {
};
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
const struct cpu_freq cpu_freq_settings_exynos4[] = {
{ 200, 3, 100, 2},
{ 300, 4, 200, 2},
@ -100,7 +98,7 @@ const struct cpu_freq cpu_freq_settings_exynos4[] = {
#endif
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
#define EXYNOS5_DEFAULT_ENTRY 7
const struct cpu_freq cpu_freq_settings_exynos5[] = {
{ 200, 3, 100, 2},
@ -207,7 +205,7 @@ exynos_cpu_boot(int cpu)
}
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
/*
* The latency values used below are `magic' and probably chosen empirically.
* For the 4210 variant the data latency is lower, a 0x110. This is currently
@ -456,13 +454,13 @@ exynos_dump_clocks(void)
uint32_t freq;
printf("Initial PLL settings\n");
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
DUMP_PLL(4, APLL);
DUMP_PLL(4, MPLL);
DUMP_PLL(4, EPLL);
DUMP_PLL(4, VPLL);
#endif
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
DUMP_PLL(5, APLL);
DUMP_PLL(5, MPLL);
DUMP_PLL(5, KPLL);
@ -479,6 +477,15 @@ exynos_dump_clocks(void)
/* XXX clock stuff needs major work XXX */
void
exynos_init_clkout_for_usb(void)
{
/* Select XUSBXTI as source for CLKOUT */
bus_space_write_4(&armv7_generic_bs_tag, exynos_pmu_bsh,
EXYNOS_PMU_DEBUG_CLKOUT, 0x1000);
}
void
exynos_clocks_bootstrap(void)
{
@ -493,7 +500,7 @@ exynos_clocks_bootstrap(void)
/* set (max) cpufreq */
fsel = ncpu_freq_settings-1;
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
/* XXX BUGFIX selecting freq on E5 goes wrong for now XXX */
fsel = EXYNOS5_DEFAULT_ENTRY;
#endif
@ -524,7 +531,7 @@ exynos_bootstrap(vaddr_t iobase, vaddr_t uartbase)
printf("Exynos early console operational\n\n");
#endif
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
core_size = EXYNOS4_CORE_SIZE;
audiocore_size = EXYNOS4_AUDIOCORE_SIZE;
audiocore_pbase = EXYNOS4_AUDIOCORE_PBASE;
@ -538,7 +545,7 @@ exynos_bootstrap(vaddr_t iobase, vaddr_t uartbase)
ncpu_freq_settings = __arraycount(cpu_freq_settings_exynos4);
#endif
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
core_size = EXYNOS5_CORE_SIZE;
audiocore_size = EXYNOS5_AUDIOCORE_SIZE;
audiocore_pbase = EXYNOS5_AUDIOCORE_PBASE;
@ -594,9 +601,6 @@ exynos_bootstrap(vaddr_t iobase, vaddr_t uartbase)
panic("%s: failed to subregion cmu apll registers: %d",
__func__, error);
/* init bus dma tags */
exynos_dma_bootstrap(physmem * PAGE_SIZE);
/* gpio bootstrapping delayed */
}
@ -625,7 +629,7 @@ exynos_device_register(device_t self, void *aux)
extern uint32_t exynos_soc_id;
switch (EXYNOS_PRODUCT_ID(exynos_soc_id)) {
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
case 0xe5410:
/* offsets not changed on matt's request */
#if 0
@ -643,7 +647,7 @@ exynos_device_register(device_t self, void *aux)
break;
}
#endif
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
case 0xe4410:
case 0xe4412: {
struct mpcore_attach_args * const mpcaa = aux;
@ -661,7 +665,7 @@ exynos_device_register(device_t self, void *aux)
return;
}
if (device_is_a(self, "armgtmr") || device_is_a(self, "mct")) {
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
/*
* The global timer is dependent on the MCT running.
*/
@ -733,7 +737,7 @@ exynos_usb2_set_isolation(bool on)
}
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
static void
exynos4_usb2phy_enable(bus_space_handle_t usb2phy_bsh)
{
@ -794,7 +798,7 @@ exynos4_usb2phy_enable(bus_space_handle_t usb2phy_bsh)
#endif
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
static void
exynos5410_usb2phy_enable(bus_space_handle_t usb2phy_bsh)
{
@ -909,10 +913,10 @@ exynos_usb_phy_init(bus_space_handle_t usb2phy_bsh)
/* disable phy isolation */
exynos_usb2_set_isolation(false);
#ifdef EXYNOS4
#ifdef SOC_EXYNOS4
exynos4_usb2phy_enable(usb2phy_bsh);
#endif
#ifdef EXYNOS5
#ifdef SOC_EXYNOS5
if (IS_EXYNOS5410_P()) {
exynos5410_usb2phy_enable(usb2phy_bsh);
/* TBD: USB3 phy init */

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@ -1,4 +1,4 @@
/* $NetBSD: exynos_sscom.c,v 1.7 2015/12/21 00:54:35 marty Exp $ */
/* $NetBSD: exynos_sscom.c,v 1.8 2017/06/10 15:13:18 jmcneill Exp $ */
/*
* Copyright (c) 2014 Reinoud Zandijk
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: exynos_sscom.c,v 1.7 2015/12/21 00:54:35 marty Exp $");
__KERNEL_RCSID(0, "$NetBSD: exynos_sscom.c,v 1.8 2017/06/10 15:13:18 jmcneill Exp $");
#include "opt_sscom.h"
#include "opt_ddb.h"
@ -79,10 +79,14 @@ static void sscom_attach(device_t, device_t, void *);
CFATTACH_DECL_NEW(exynos_sscom, sizeof(struct sscom_softc), sscom_match,
sscom_attach, NULL, NULL);
static const char * const compatible[] = {
"samsung,exynos4210-uart",
NULL
};
static int
sscom_match(device_t parent, cfdata_t cf, void *aux)
{
const char * const compatible[] = { "samsung,exynos4210-uart", NULL };
struct fdt_attach_args * const faa = aux;
return of_match_compatible(faa->faa_phandle, compatible);
@ -147,32 +151,39 @@ sscom_attach(device_t parent, device_t self, void *aux)
{
struct sscom_softc *sc = device_private(self);
struct fdt_attach_args *faa = aux;
int unit = -1;
const int phandle = faa->faa_phandle;
bus_space_tag_t bst = faa->faa_bst;
bus_space_handle_t bsh;
bus_space_tag_t bst;
struct clk *clk_uart, *clk_uart_baud0;
bus_addr_t addr;
bus_size_t size;
int error;
int i;
if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
return;
}
/* unit is required for the sscom driver, which desperately
* needs to be rewritten. For now, this hack gets the answer.
* MJF: FIX ME
*/
for (i = 1; i < num_exynos_uarts_entries; i += 2)
if (EXYNOS_CORE_PBASE + exynos_uarts[i] == addr)
break;
unit = exynos_uarts[i-1];
if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
aprint_error(": couldn't map registers\n");
return;
}
clk_uart = fdtbus_clock_get(phandle, "uart");
clk_uart_baud0 = fdtbus_clock_get(phandle, "clk_uart_baud0");
if (clk_uart == NULL || clk_uart_baud0 == NULL) {
aprint_error(": couldn't get clocks\n");
return;
}
if (clk_enable(clk_uart) != 0 || clk_enable(clk_uart_baud0) != 0) {
aprint_error(": couldn't enable clocks\n");
return;
}
sc->sc_dev = self;
sc->sc_iot = bst = faa->faa_bst;
sc->sc_ioh = exynos_uarts[i] + EXYNOS_CORE_VBASE;
sc->sc_unit = unit;
sc->sc_frequency = EXYNOS_UART_FREQ;
sc->sc_ioh = bsh;
sc->sc_unit = phandle;
sc->sc_frequency = clk_get_rate(clk_uart);
sc->sc_change_txrx_interrupts = exynos_change_txrx_interrupts;
sc->sc_clear_interrupts = exynos_clear_interrupts;
@ -181,26 +192,15 @@ sscom_attach(device_t parent, device_t self, void *aux)
sc->sc_rx_irqno = 0;
sc->sc_tx_irqno = 0;
if (!sscom_is_console(sc->sc_iot, unit, &sc->sc_ioh)) {
error = bus_space_map(bst, addr, size, 0, &bsh);
if (error) {
aprint_error(": couldn't map %#llx: %d\n",
(uint64_t)addr, error);
return;
}
sc->sc_ioh = bsh;
} else {
aprint_normal(" (console) ");
}
if (sscom_is_console(sc->sc_iot, phandle, &sc->sc_ioh))
aprint_normal(" (console)");
aprint_normal("\n");
#if 0
void *ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SERIAL,
void *ih = fdtbus_intr_establish(phandle, 0, IPL_SERIAL,
FDT_INTR_MPSAFE, sscomintr, sc);
if (ih == NULL)
aprint_error_dev(self, "failed to establish interrupt\n");
#endif
sscom_attach_subr(sc);
@ -226,3 +226,49 @@ exynos_sscom_kgdb_attach(bus_space_tag_t iot, int unit, int rate,
}
#endif /* KGDB */
#endif
/*
* Console support
*/
static int
exynos_sscom_console_match(int phandle)
{
return of_match_compatible(phandle, compatible);
}
static void
exynos_sscom_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
{
const struct sscom_uart_info info = {
.iobase = 0, /* Offset from bsh */
.unit = faa->faa_phandle
};
const int phandle = faa->faa_phandle;
bus_space_tag_t bst = faa->faa_bst;
bus_space_handle_t bsh;
bus_addr_t addr;
bus_size_t size;
tcflag_t flags;
int speed;
fdtbus_get_reg(phandle, 0, &addr, &size);
speed = fdtbus_get_stdout_speed();
if (speed < 0)
speed = 115200; /* default */
flags = fdtbus_get_stdout_flags();
if (bus_space_map(bst, addr, size, 0, &bsh) != 0)
panic("cannot map console UART");
if (sscom_cnattach(bst, bsh, &info, speed, uart_freq, flags) != 0)
panic("cannot attach console UART");
}
static const struct fdt_console exynos_sscom_console = {
.match = exynos_sscom_console_match,
.consinit = exynos_sscom_console_consinit,
};
FDT_CONSOLE(exynos_sscom, &exynos_sscom_console);

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@ -1,4 +1,4 @@
# $NetBSD: files.exynos,v 1.21 2016/01/03 04:10:58 marty Exp $
# $NetBSD: files.exynos,v 1.22 2017/06/10 15:13:18 jmcneill Exp $
#
# Configuration info for Samsung Exynos SoC ARM Peripherals
#
@ -13,10 +13,10 @@ file arch/arm/arm32/arm32_kvminit.c
file arch/arm/arm32/arm32_reboot.c
file arch/arm/arm32/irq_dispatch.S
file arch/arm/arm32/armv7_generic_space.c
file arch/arm/arm32/armv7_generic_dma.c
file arch/arm/arm/bus_space_a4x.S
file arch/arm/samsung/exynos_soc.c
#file arch/arm/samsung/exynos_space.c
file arch/arm/samsung/exynos_smc.S arm_trustzone_firmware
# Console parameters
@ -30,23 +30,20 @@ defparam opt_exynos.h EXYNOS_WDT_DEFAULT_PERIOD
defflag opt_exynos.h EXYNOS_CONSOLE_EARLY
#
defflag opt_exynos.h EXYNOS4: CPU_CORTEXA9
defflag opt_exynos.h EXYNOS4120: EXYNOS4
defflag opt_exynos.h EXYNOS4212: EXYNOS4
defflag opt_exynos.h EXYNOS4412: EXYNOS4
defflag opt_exynos.h EXYNOS4412P: EXYNOS4
defflag opt_exynos.h EXYNOS5: CPU_CORTEXA15
defflag opt_exynos.h EXYNOS5250: EXYNOS5
defflag opt_exynos.h EXYNOS5260: EXYNOS5
defflag opt_exynos.h EXYNOS5410: EXYNOS5
defflag opt_exynos.h EXYNOS5420: EXYNOS5
defflag opt_exynos.h EXYNOS5440: EXYNOS5
defflag opt_exynos.h EXYNOS5422: EXYNOS5
defflag opt_exynos.h SOC_EXYNOS4: CPU_CORTEXA9
defflag opt_exynos.h SOC_EXYNOS4120: SOC_EXYNOS4
defflag opt_exynos.h SOC_EXYNOS4212: SOC_EXYNOS4
defflag opt_exynos.h SOC_EXYNOS4412: SOC_EXYNOS4
defflag opt_exynos.h SOC_EXYNOS4412P: SOC_EXYNOS4
defflag opt_exynos.h SOC_EXYNOS5: CPU_CORTEXA15
defflag opt_exynos.h SOC_EXYNOS5250: SOC_EXYNOS5
defflag opt_exynos.h SOC_EXYNOS5260: SOC_EXYNOS5
defflag opt_exynos.h SOC_EXYNOS5410: SOC_EXYNOS5
defflag opt_exynos.h SOC_EXYNOS5420: SOC_EXYNOS5
defflag opt_exynos.h SOC_EXYNOS5440: SOC_EXYNOS5
defflag opt_exynos.h SOC_EXYNOS5422: SOC_EXYNOS5
# On-board I/O
device exynosfdt : bus_space_generic, fdtbus
attach exynosfdt at mainbus with exynos_fdt
file arch/arm/samsung/exynos_fdt.c exynos_fdt
file arch/arm/samsung/exynos_platform.c soc_exynos5
# Interrupt combiner
device exyointr
@ -120,8 +117,6 @@ device exyoi2c: i2cbus, i2c_bitbang
attach exyoi2c at fdt with exynos_i2c
file arch/arm/samsung/exynos_i2c.c exynos_i2c needs-flag
file arch/arm/samsung/exynos5422_dma.c
device exy5422clk: clk
attach exy5422clk at fdt with exynos5422_clock
file arch/arm/samsung/exynos5422_clock.c exynos5422_clock

View File

@ -1,4 +1,4 @@
/* $NetBSD: sscom.c,v 1.8 2015/04/13 21:18:41 riastradh Exp $ */
/* $NetBSD: sscom.c,v 1.9 2017/06/10 15:13:18 jmcneill Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@ -98,7 +98,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: sscom.c,v 1.8 2015/04/13 21:18:41 riastradh Exp $");
__KERNEL_RCSID(0, "$NetBSD: sscom.c,v 1.9 2017/06/10 15:13:18 jmcneill Exp $");
#include "opt_sscom.h"
#include "opt_ddb.h"
@ -179,13 +179,9 @@ static int sscom_to_tiocm(struct sscom_softc *);
static void sscom_iflush(struct sscom_softc *);
static int sscomhwiflow(struct tty *tp, int block);
#if defined(KGDB) || \
defined(SSCOM0CONSOLE) || defined(SSCOM1CONSOLE) || \
defined(SSCOM2CONSOLE) || defined(SSCOM3CONSOLE)
static int sscom_init(bus_space_tag_t, bus_space_handle_t,
const struct sscom_uart_info *,
int, int, tcflag_t, bus_space_handle_t *);
#endif
extern struct cfdriver sscom_cd;
@ -1836,9 +1832,6 @@ sscomintr(void *v)
}
#if defined(KGDB) || \
defined(SSCOM0CONSOLE) || defined(SSCOM1CONSOLE) || \
defined(SSCOM2CONSOLE) || defined(SSCOM3CONSOLE)
/*
* Initialize UART for use as console or KGDB line.
*/
@ -1882,11 +1875,6 @@ sscom_init(bus_space_tag_t iot, bus_space_handle_t base_ioh,
return 0;
}
#endif
#if \
defined(SSCOM0CONSOLE) || defined(SSCOM1CONSOLE) || \
defined(SSCOM2CONSOLE) || defined(SSCOM3CONSOLE)
/*
* Following are all routines needed for SSCOM to act as console
*/
@ -2024,8 +2012,6 @@ sscomcnpollc(dev_t dev, int on)
sscom_readaheadcount = 0;
}
#endif /* SSCOM0CONSOLE||SSCOM1CONSOLE */
#ifdef KGDB
int
sscom_kgdb_attach(bus_space_tag_t iot, bus_space_handle_t ioh,

View File

@ -1,301 +1,94 @@
#
# $NetBSD: EXYNOS,v 1.14 2017/04/16 15:49:26 jmcneill Exp $
# $NetBSD: EXYNOS,v 1.15 2017/06/10 15:13:19 jmcneill Exp $
#
# ODROID-XU -- ODROID-XU4 Exynos5422 based kernel
# Samsung Exynos SoC kernel
#
include "arch/evbarm/conf/std.exynos"
include "arch/evbarm/conf/GENERIC.common"
no makeoptions CPUFLAGS
makeoptions CPUFLAGS="-mcpu=cortex-a7 -mfpu=neon"
no makeoptions BOARDTYPE
makeoptions BOARDTYPE="hardkernel_odroid_xu4"
no makeoptions KERNEL_BASE_PHYS
no makeoptions KERNEL_BASE_VIRT
makeoptions KERNEL_BASE_PHYS="0x80000000"
makeoptions KERNEL_BASE_VIRT="0x80000000"
options PMAP_NEED_ALLOC_POOLPAGE
options MEMSIZE=2048
# estimated number of users
maxusers 8
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
#options NTP # NTP phase/frequency locked loop
# CPU options
options CPU_CORTEX
options CPU_CORTEXA7
options CPU_CORTEXA15
options EXYNOS5422
#options MULTIPROCESSOR
options SOC_EXYNOS5422
options MULTIPROCESSOR
options FDT # not really but soon
pseudo-device openfirm # jmcneill: oops, fdtbus should depend on
# openfirm. don't let me forget.
pseudo-device openfirm # /dev/openfirm
options PMAPCOUNTERS
options BUSDMA_COUNTERS
options EXYNOS_CONSOLE_EARLY
#options UVMHIST
options USBHIST
options USBHIST_SIZE=100000
#options UVMHIST_PRINT,KERNHIST_DELAY=0
options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
#options PMAP_NEED_ALLOC_POOLPAGE
# Specify the memory size in megabytes (optional).
#options MEMSIZE=2048
# File systems
file-system FFS # UFS
#file-system LFS # log-structured file system
file-system MFS # memory file system
file-system NFS # Network file system
#file-system ADOSFS # AmigaDOS-compatible file system
#file-system EXT2FS # second extended file system (linux)
#file-system CD9660 # ISO 9660 + Rock Ridge file system
file-system MSDOSFS # MS-DOS file system
#file-system FDESC # /dev/fd
file-system KERNFS # /kern
#file-system NULLFS # loopback file system
file-system PROCFS # /proc
#file-system PUFFS # Userspace file systems (e.g. ntfs-3g & sshfs)
#file-system UMAPFS # NULLFS + uid and gid remapping
#file-system UNION # union file system
file-system TMPFS # memory file system
file-system PTYFS # /dev/pts/N support
# File system options
#options QUOTA # legacy UFS quotas
#options QUOTA2 # new, in-filesystem UFS quotas
#options DISKLABEL_EI # disklabel Endian Independent support
#options FFS_EI # FFS Endian Independent support
options NFSSERVER
options WAPBL # File system journaling support
#options FFS_NO_SNAPSHOT # No FFS snapshot support
# Networking options
#options GATEWAY # packet forwarding
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
#options IPSEC # IP security
#options IPSEC_DEBUG # debug for IP security
#options MROUTING # IP multicast routing
#options PIM # Protocol Independent Multicast
#options NETATALK # AppleTalk networking
#options PPP_BSDCOMP # BSD-Compress compression support for PPP
#options PPP_DEFLATE # Deflate compression support for PPP
#options PPP_FILTER # Active filter support for PPP (requires bpf)
#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
#options NFS_BOOT_BOOTP
#options NFS_BOOT_DHCP
#options NFS_BOOT_BOOTSTATIC
#options NFS_BOOTSTATIC_MYIP="\"192.168.0.22\""
#options NFS_BOOTSTATIC_GWIP="\"192.168.0.1\""
#options NFS_BOOTSTATIC_MASK="\"255.255.255.0\""
#options NFS_BOOTSTATIC_SERVADDR="\"192.168.0.5\""
#options NFS_BOOTSTATIC_SERVER="\"192.168.0.5:/stuff/nfs/odroid\""
#options NFS_BOOT_RWSIZE=1024
# Compatibility options
options COMPAT_NETBSD32 # allow running arm (e.g. non-earm) binaries
#options COMPAT_43 # 4.3BSD compatibility.
#options COMPAT_09 # NetBSD 0.9,
#options COMPAT_10 # NetBSD 1.0,
#options COMPAT_11 # NetBSD 1.1,
#options COMPAT_12 # NetBSD 1.2,
#options COMPAT_13 # NetBSD 1.3,
#options COMPAT_14 # NetBSD 1.4,
#options COMPAT_15 # NetBSD 1.5,
#options COMPAT_16 # NetBSD 1.6,
#options COMPAT_20 # NetBSD 2.0,
#options COMPAT_30 # NetBSD 3.0,
#options COMPAT_40 # NetBSD 4.0,
#options COMPAT_50 # NetBSD 5.0,
options COMPAT_60 # NetBSD 6.0, and
options COMPAT_70 # NetBSD 7.0 binary compatibility.
#options TCP_COMPAT_42 # 4.2BSD TCP/IP bug compat. Not recommended.
#options COMPAT_BSDPTY # /dev/[pt]ty?? ptys.
# Shared memory options
options SYSVMSG # System V-like message queues
options SYSVSEM # System V-like semaphores
options SYSVSHM # System V-like memory sharing
# Device options
#options MEMORY_DISK_HOOKS # boottime setup of ramdisk
#options MEMORY_DISK_ROOT_SIZE=8192 # Size in blocks
#options MEMORY_DISK_DYNAMIC
#options MINIROOTSIZE=1000 # Size in blocks
#options MEMORY_DISK_IS_ROOT # use memory disk as root
# Wedge support
options DKWEDGE_AUTODISCOVER # Automatically add dk(4) instances
options DKWEDGE_METHOD_GPT # Supports GPT partitions as wedges
# Miscellaneous kernel options
options KTRACE # system call tracing, a la ktrace(1)
#options SCSIVERBOSE # Verbose SCSI errors
#options MIIVERBOSE # Verbose MII autoconfuration messages
options DDB_KEYCODE=0x40
#options USERCONF # userconf(4) support
#options PIPE_SOCKETPAIR # smaller, but slower pipe(2)
# Development and Debugging options
#options PERFCTRS # performance counters
options DIAGNOSTIC # internal consistency checks
options DEBUG
options LOCKDEBUG
options PMAP_DEBUG # Enable pmap_debug_level code
#options DIAGNOSTIC # internal consistency checks
#options DEBUG
#options LOCKDEBUG
#options PMAP_DEBUG # Enable pmap_debug_level code
#options IPKDB # remote kernel debugging
options VERBOSE_INIT_ARM # verbose bootstraping messages
options DDB # in-kernel debugger
options DDB_ONPANIC=1
options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
options DDB_VERBOSE_HELP
#options KGDB
#options VERBOSE_INIT_ARM # verbose bootstrapping messages
# CONSADDR is required for early init messages from VERBOSE_INIT_ARM.
#options CONSADDR=0x70006300
makeoptions DEBUG="-g" # compile full symbol table
makeoptions COPY_SYMTAB=1
## USB Debugging options
options USB_DEBUG
options EHCI_DEBUG
options OHCI_DEBUG
options UHUB_DEBUG
options USBVERBOSE
# Valid options for BOOT_ARGS:
# single Boot to single user only
# kdb Give control to kernel debugger
# ask Ask for file name to reboot from
# memorydisk=<n> Set memorydisk size to <n> KB
# quiet Show aprint_naive output
# verbose Show aprint_normal and aprint_verbose output
#options BOOT_ARGS="\"\""
options BOOT_ARGS="\"verbose\""
config netbsd root on ? type ?
# The main bus device
mainbus0 at root
# The boot cpu and secondary CPUs
cpu0 at mainbus?
cpu* at mainbus? # Multiprocessor
# core devices
armperiph0 at mainbus?
armgic0 at armperiph? # Interrupt Controller
armgtmr0 at armperiph? # Generic Timer
# On-board I/O
exynosfdt0 at mainbus?
# Device tree support
armfdt0 at root
fdt* at fdtbus?
fregulator* at fdt?
# CPUs
cpus* at fdt? pass 0
cpu* at cpus?
#interrupt controller
exyointr0 at fdt?
gic* at fdt?
fclock* at fdt? pass 4
fregulator* at fdt? pass 4
gpiokeys* at fdt?
# Timer
gtmr* at fdt? pass 1 # ARM Generic Timer
armgtmr0 at gtmr?
mct* at fdt? # Exynos Multi Core Timer (MCT)
# Interrupt controller
exyointr* at fdt? pass 1
gic* at fdt? pass 1 # GIC
armgic0 at gic?
# Clock controller
exy5422clk* at fdt? # Exynos5422 clock controller
exy5422clk* at fdt? pass 3 # Exynos5422 clock controller
# Integrated Samsung UARTs
sscom* at fdt? # UART ?
# Exynos Watchdog Timer
exyowdt* at fdt? # watchdog
# Exynos chip id
chipid* at fdt?
# Exynos system MMUs
sysmmu* at fdt?
# Exynos RTC
exyortc* at fdt?
# Exynos Multi Core timer (MCT)
mct* at fdt?
# GPIO
exyopctl* at fdt?
# GPIO controller
exyopctl* at fdt? pass 2 # GPIO
gpio* at gpiobus?
# On-board USB 2.0
exyousbphy* at fdt?
ohci* at fdt?
ehci* at fdt?
usb* at ohci?
usb* at ehci?
# Exynos SoC support
chipid* at fdt?
sysmmu* at fdt?
# On-board USB 3.0
exyousb* at fdt?
#xhci* at fdt?
#usb* at xhci?
# UART
sscom* at fdt? # UART
# I2C devices
exyoi2c* at fdt?
#i2c* at exyoi2c?
# I2C
exyoi2c* at fdt? # I2C
iic* at exyoi2c?
# SD/MMC
dwcmmc* at fdt?
# RTC
exyortc* at fdt? # RTC
# SDMMC
dwcmmc* at fdt? # SDMMC
sdmmc* at dwcmmc?
ld0 at sdmmc0
ld1 at sdmmc1
ld2 at sdmmc2
ld3 at sdmmc3
ld* at sdmmc?
# MISSING SUPPORT
# eMMC
# uSD
# SPI
# ADC
# PMIC (via I2C #4)
# PWM for Cooling fan
# HDMI
# I2S
# GPU
# USB
exyousbphy* at fdt?
exyousb* at fdt?
ohci* at fdt? # OUSB
ehci* at fdt? # EUSB
usb* at ohci?
usb* at ehci?
# serial console connectivity
options SSCOM2CONSOLE, CONSPEED=115200
# include all USB devices
include "dev/usb/usbdevices.config"
midi* at midibus?
# Pseudo-Devices
# disk/mass storage pseudo-devices
#pseudo-device md # memory disk device (ramdisk)
#pseudo-device vnd # disk-like interface to files
#pseudo-device fss # file system snapshot device
#pseudo-device putter # for puffs and pud
pseudo-device drvctl # driver control
# network pseudo-devices
pseudo-device bpfilter # Berkeley packet filter
pseudo-device loop # network loopback
#pseudo-device kttcp # network loopback
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
#options RND_COM
#pseudo-device clockctl # user control of clock subsystem
pseudo-device ksyms # /dev/ksyms
#pseudo-device lockstat # lock profiling
cinclude "arch/evbarm/conf/TEGRA.local"

View File

@ -1,18 +1,8 @@
# $NetBSD: files.exynos,v 1.2 2015/12/14 22:06:57 marty Exp $
# $NetBSD: files.exynos,v 1.3 2017/06/10 15:13:19 jmcneill Exp $
#
# EXYNOS 5422 board configuration info
# EXYNOS board configuration info
#
file arch/evbarm/exynos/exynos_machdep.c
include "arch/evbarm/conf/files.fdt"
# Kernel boot arguments
defparam opt_machdep.h BOOT_ARGS
# FDT
include "dev/ofw/files.ofw"
include "dev/fdt/files.fdt"
include "arch/arm/fdt/files.fdt"
# Pull in Exynos SoC default
include "arch/arm/samsung/files.exynos"
include "arch/arm/samsung/files.exynos"

View File

@ -1,35 +1,35 @@
# $NetBSD: std.exynos,v 1.1 2015/12/06 00:31:24 marty Exp $
# $NetBSD: std.exynos,v 1.2 2017/06/10 15:13:19 jmcneill Exp $
#
# standard NetBSD/evbarm for EXYNOS options
machine evbarm arm
include "arch/evbarm/conf/std.evbarm"
# Pull in EXYNOS config definitions
include "arch/evbarm/conf/files.exynos"
include "arch/evbarm/conf/files.exynos"
makeoptions CPUFLAGS="-march=armv7-a -mfpu=neon"
makeoptions CPUFLAGS="-march=armv7-a -mfpu=neon"
# To support easy transit to ../arch/arm/arm32
options ARM_TRUSTZONE_FIRMWARE
options __NO_FIQ
options FDT # Flattened Device Tree support
options MODULAR
options MODULAR_DEFAULT_AUTOLOAD
options ARM_HAS_VBAR
options CORTEX_PMC
options __HAVE_CPU_COUNTER
options __HAVE_FAST_SOFTINTS # should be in types.h
options ARM_HAS_VBAR
#options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
#options PMAP_NEED_ALLOC_POOLPAGE
options TPIDRPRW_IS_CURCPU
options KERNEL_BASE_EXT=0x80000000
options FPU_VFP
# All shipped Samsung SoC's that are not Samsung products have this
options ARM_TRUSTZONE_FIRMWARE
options __NO_FIQ
options PCI_NETBSD_CONFIGURE
options __HAVE_PCI_CONF_HOOK
options __BUS_SPACE_HAS_STREAM_METHODS
makeoptions KERNEL_BASE_PHYS="0x80000000"
makeoptions KERNEL_BASE_VIRT="0x80000000"
makeoptions BOARDTYPE="exynos"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.exynos"
options ARM_INTR_IMPL="<arch/arm/samsung/exynos_intr.h>"
options ARM_INTR_IMPL="<arch/arm/fdt/fdt_intr.h>"
options ARM_GENERIC_TODR

View File

@ -1,567 +0,0 @@
/* $NetBSD: exynos_machdep.c,v 1.7 2015/12/21 04:58:50 marty Exp $ */
/*
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Reinoud Zandijk.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: exynos_machdep.c,v 1.7 2015/12/21 04:58:50 marty Exp $");
#include "opt_evbarm_boardtype.h"
#include "opt_exynos.h"
#include "opt_machdep.h"
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_ipkdb.h"
#include "opt_md.h"
#include "opt_sscom.h"
#include "opt_arm_debug.h"
#include "ukbd.h"
#include "arml2cc.h" // RPZ why is it not called opt_l2cc.h?
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <sys/device.h>
#include <sys/exec.h>
#include <sys/kernel.h>
#include <sys/ksyms.h>
#include <sys/msgbuf.h>
#include <sys/proc.h>
#include <sys/reboot.h>
#include <sys/termios.h>
#include <sys/gpio.h>
#include <uvm/uvm_extern.h>
#include <sys/conf.h>
#include <dev/cons.h>
#include <dev/md.h>
#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>
#ifdef KGDB
#include <sys/kgdb.h>
#endif
#include <machine/bootconfig.h>
#include <arm/armreg.h>
#include <arm/undefined.h>
#include <arm/cortex/pl310_var.h>
#include <arm/arm32/machdep.h>
#include <arm/mainbus/mainbus.h>
#include <arm/samsung/exynos5_reg.h>
#include <arm/samsung/exynos_var.h>
#include <evbarm/include/autoconf.h>
#include <evbarm/exynos/platform.h>
#include <dev/i2c/i2cvar.h>
#include <dev/i2c/ddcreg.h>
#include <dev/usb/ukbdvar.h>
#include <net/if_ether.h>
/* serial console stuff */
#include "sscom.h"
#include "opt_sscom.h"
#include <arm/samsung/sscom_var.h>
#include <arm/samsung/sscom_reg.h>
/* so we can load the device tree. NOTE: This requires the kernel to be
* made into a linux (not netbsd) uboot image.
*/
#include <libfdt.h>
#include <dev/fdt/fdtvar.h>
#define FDT_BUF_SIZE (128*1024)
static uint8_t fdt_data[FDT_BUF_SIZE];
extern const int num_exynos_uarts_entries;
extern const struct sscom_uart_info exynos_uarts[];
#ifndef CONSPEED
#define CONSPEED 115200
#endif /* CONSPEED */
#ifndef CONMODE
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB | HUPCL)) | CS8) /* 8N1 */
#endif /* CONMODE */
static const int conspeed = CONSPEED;
static const int conmode = CONMODE;
/*
* uboot passes 4 arguments to us.
*
* arg0 arg1 arg2 arg3 : the `bootargs' environment variable from the uboot
* context (in PA!)
*
* Note that the storage has to be in .data and not in .bss. On kernel start
* the .bss is cleared and this information would get lost.
*/
uintptr_t uboot_args[4] = { 0 };
/*
* argument and boot configure storage
*/
BootConfig bootconfig; /* for pmap's sake */
char bootargs[MAX_BOOT_STRING] = ""; /* copied string from uboot */
char *boot_args = NULL; /* MI bootargs */
char *boot_file = NULL; /* MI bootfile */
uint8_t uboot_enaddr[ETHER_ADDR_LEN] = {};
void
odroid_device_register(device_t self, void *aux);
/*
* kernel start and end from the linker
*/
extern char KERNEL_BASE_phys[]; /* physical start of kernel */
extern char _end[]; /* physical end of kernel */
#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
#define EXYNOS_IOPHYSTOVIRT(a) \
((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
static void exynos_reset(void);
static void exynos_powerdown(void);
/* XXX we have no framebuffer implementation yet so com is console XXX */
int use_fb_console = false;
/* prototypes */
void consinit(void);
#ifdef KGDB
static void kgdb_port_init(void);
#endif
static void exynos_extract_mac_adress(void);
void exynos_device_register(device_t self, void *aux);
void exynos_device_register_post_config(device_t self, void *aux);
/*
* Our static device mappings at fixed virtual addresses so we can use them
* while booting the kernel.
*
* Map the extents segment-aligned and segment-rounded in size to avoid L2
* page tables
*/
#define _A(a) ((a) & ~L1_S_OFFSET)
#define _S(s) (((s) + L1_S_SIZE - 1) & (~(L1_S_SIZE-1)))
static const struct pmap_devmap e5_devmap[] = {
{
/* map in core IO space */
.pd_va = _A(EXYNOS_CORE_VBASE),
.pd_pa = _A(EXYNOS_CORE_PBASE),
.pd_size = _S(EXYNOS5_CORE_SIZE),
.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
.pd_cache = PTE_NOCACHE
},
{
/* map in audiocore IO space */
.pd_va = _A(EXYNOS5_AUDIOCORE_VBASE),
.pd_pa = _A(EXYNOS5_AUDIOCORE_PBASE),
.pd_size = _S(EXYNOS5_AUDIOCORE_SIZE),
.pd_prot = VM_PROT_READ | VM_PROT_WRITE,
.pd_cache = PTE_NOCACHE
},
{0}
};
#undef _A
#undef _S
#ifdef PMAP_NEED_ALLOC_POOLPAGE
static struct boot_physmem bp_highgig = {
.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
.bp_freelist = VM_FREELIST_ISADMA,
.bp_flags = 0,
};
#endif
static struct gpio_pin_entry {
const char *pin_name;
const char *pin_user;
} gpio_pin_entries[] = {
/* mux@13400000 (muxa) */
{ "gpx3-7", "hdmi-hpd-irq"},
{ "gpx3-6", "hdmi_cec" },
{ "gpx0-7", "dp_hpd_gpio" },
{ "gpx0-4", "pmic-irq" },
{ "gpx3-2", "audio-irq" },
{ "gpx3-4", "b-sess1-irq" },
{ "gpx3-5", "b-sess0-irq" },
{ "gpx1-1", "id2-irq" },
/* mux@134100000 (muxb) */
{ "gpc0-0", "sd0-clk" },
{ "gpc0-1", "sd0-cmd" },
{ "gpc0-7", "sd0-rdqs" },
{ "gpd1-3", "sd0-qrdy" },
{ "gpc0-3", "sd0-bus-width1" },
{ "gpc0-3", "sd0-bus-width4-bit1" },
{ "gpc0-4", "sd0-bus-width4-bit2" },
{ "gpc0-5", "sd0-bus-width4-bit3" },
{ "gpc0-6", "sd0-bus-width4-bit4" },
{ "gpc1-0", "sd1-clk" },
{ "gpc1-1", "sd1-cmd" },
{ "gpc1-3", "sd1-bus-width1" },
{ "gpc1-3", "sd1-bus-width4-bit1" },
{ "gpc1-4", "sd1-bus-width4-bit2" },
{ "gpc1-5", "sd1-bus-width4-bit3" },
{ "gpc1-6", "sd1-bus-width4-bit4" },
/* TODO: muxc and muxd as needed */
{ 0, 0}
};
#ifdef VERBOSE_INIT_ARM
extern void exynos_putchar(int);
static void
exynos_putstr(const char *s)
{
for (const char *p = s; *p; p++) {
exynos_putchar(*p);
}
}
static void
exynos_printn(u_int n, int base)
{
char *p, buf[(sizeof(u_int) * NBBY / 3) + 1 + 2 /* ALT + SIGN */];
p = buf;
do {
*p++ = hexdigits[n % base];
} while (n /= base);
do {
exynos_putchar(*--p);
} while (p > buf);
}
#define DPRINTF(...) printf(__VA_ARGS__)
#define DPRINT(x) exynos_putstr(x)
#define DPRINTN(x,b) exynos_printn((x), (b))
#else
#define DPRINTF(...)
#define DPRINT(x)
#define DPRINTN(x,b)
#endif
extern void cortex_mpstart(void);
/*
* void init_gpio_dictionary(...)
*
* Setup the dictionary of gpio pin names for the drivers to use
*/
static void init_gpio_dictionary(struct gpio_pin_entry *pins,
prop_dictionary_t dict)
{
while (pins->pin_name) {
prop_dictionary_set_cstring(dict, pins->pin_user,
pins->pin_name);
pins++;
}
}
/*
* u_int initarm(...)
*
* Our entry point from the assembly before main() is called.
* - take a copy of the config we got from uboot
* - init the physical console
* - setting up page tables for the kernel
*/
u_int
initarm(void *arg)
{
const struct pmap_devmap const *devmap;
bus_addr_t rambase;
psize_t ram_size;
DPRINT("initarm:");
DPRINT(" mpstart<0x");
DPRINTN((uint32_t)cortex_mpstart, 16);
DPRINT(">");
/* allocate/map our basic memory mapping */
switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
#if defined(EXYNOS5)
case EXYNOS5_PRODUCT_FAMILY:
devmap = e5_devmap;
rambase = EXYNOS5_SDRAM_PBASE;
break;
#endif
default:
/* Won't work, but... */
panic("Unknown product family %llx",
EXYNOS_PRODUCT_FAMILY(exynos_soc_id));
}
pmap_devmap_register(devmap);
/* bootstrap soc. uart_address is determined in exynos_start */
paddr_t uart_address = armreg_tpidruro_read();
exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
/* set up CPU / MMU / TLB functions */
if (set_cpufuncs())
panic("cpu not recognized!");
/* get normal console working */
consinit();
#ifdef KGDB
kgdb_port_init();
#endif
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
printf("Exynos SoC ID %08x\n", exynos_soc_id);
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
/* determine cpu0 clock rate */
exynos_clocks_bootstrap();
#ifdef VERBOSE_INIT_ARM
printf("CPU0 now running on %"PRIu64" Mhz\n", exynos_get_cpufreq()/(1000*1000));
#endif
cpu_reset_address = exynos_reset;
cpu_powerdown_address = exynos_powerdown;
#ifdef VERBOSE_INIT_ARM
printf("\nNetBSD/evbarm (Exynnos 5422) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
boot_args = bootargs;
parse_mi_bootargs(boot_args);
exynos_extract_mac_adress();
/* Don't map the DMA reserved region */
// ram_size = (psize_t) 0xC0000000 - 0x40000000;
ram_size = (psize_t) 0xb0000000 - 0x40000000;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
#ifndef PMAP_NEED_ALLOC_POOLPAGE
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
#endif
#else
const bool mapallmem_p = false;
#endif
/* Load the dtb */
const uint8_t *fdt_addr_r = (const uint8_t *)uboot_args[2];
printf("fdt addr 0x%08x\n", (uint)fdt_addr_r);
int error = fdt_check_header(fdt_addr_r);
printf("fdt check header returns %d\n", error);
if (error == 0) {
error = fdt_move(fdt_addr_r, fdt_data, sizeof(fdt_data));
printf("fdt move returns %d\n", error);
if (error != 0) {
panic("fdt_move failed: %s", fdt_strerror(error));
}
fdtbus_set_data(fdt_data);
} else {
panic("fdt_check_header failed: %s", fdt_strerror(error));
}
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = rambase;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
KERNEL_BASE_PHYS);
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
mapallmem_p);
/* we've a specific device_register routine */
evbarm_device_register = odroid_device_register;
// evbarm_device_register_post_config = exynos_device_register_post_config;
/*
* If we couldn't map all of memory via TTBR1, limit the memory the
* kernel can allocate from to be from the highest available 1GB.
*/
#ifdef PMAP_NEED_ALLOC_POOLPAGE
if (atop(ram_size) > bp_highgig.bp_pages) {
arm_poolpage_vmfreelist = bp_highgig.bp_freelist;
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
&bp_highgig, 1);
}
#endif
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
void
consinit(void)
{
static bool consinit_called;
if (consinit_called)
return;
consinit_called = true;
#if NSSCOM > 0
bus_space_tag_t bst = &armv7_generic_bs_tag;
bus_addr_t iobase = armreg_tpidruro_read();
bus_space_handle_t bsh = EXYNOS_IOPHYSTOVIRT(iobase);
u_int i;
/*
* No need to guess at the UART frequency since we can calculate it.
*/
uint32_t freq = conspeed
* (16 * (bus_space_read_4(bst, bsh, SSCOM_UBRDIV) + 1)
+ bus_space_read_4(bst, bsh, SSCOM_UFRACVAL));
freq = (freq + conspeed / 2) / 1000;
freq *= 1000;
/* go through all entries */
for (i = 0; i < num_exynos_uarts_entries; i++) {
/* attach console */
if (exynos_uarts[i].iobase + EXYNOS_CORE_PBASE == iobase)
break;
}
KASSERT(i < num_exynos_uarts_entries);
printf("%s: attaching console @ %#"PRIxPTR" (%u HZ, %u bps)\n",
__func__, iobase, freq, conspeed);
if (sscom_cnattach(bst, exynos_core_bsh, &exynos_uarts[i],
conspeed, freq, conmode))
panic("Serial console can not be initialized");
#ifdef VERBOSE_INIT_ARM
printf("Console initialized\n");
#endif
#else
#error only serial console is supported
#if NUKBD > 0
/* allow USB keyboards to become console */
ukbd_cnattach();
#endif /* NUKBD */
#endif
}
/* extract ethernet mac address from bootargs */
static void
exynos_extract_mac_adress(void)
{
char *str, *ptr;
int i, v1, v2, val;
#define EXPECT_COLON() {\
v1 = *ptr++; \
if (v1 != ':') break; \
}
#define EXPECT_HEX(v) {\
(v) = (v) >= '0' && (v) <= '9'? (v) - '0' : \
(v) >= 'a' && (v) <= 'f'? (v) - 'a' + 10 : \
(v) >= 'A' && (v) <= 'F'? (v) - 'A' + 10 : -1; \
if ((v) < 0) break; \
}
#define EXPECT_2HEX(val) {\
v1 = *ptr++; EXPECT_HEX(v1); \
v2 = *ptr++; EXPECT_HEX(v2); \
val = (v1 << 4) | v2; \
}
if (get_bootconf_option(boot_args, "ethaddr",
BOOTOPT_TYPE_STRING, &str)) {
for (i = 0, ptr = str; i < sizeof(uboot_enaddr); i++) {
if (i)
EXPECT_COLON();
EXPECT_2HEX(val);
uboot_enaddr[i] = val;
}
if (i != sizeof(uboot_enaddr)) {
printf( "Ignoring invalid MAC address '%s' passed "
"as boot paramter `ethaddr'\n", str);
memset((char *) uboot_enaddr, 0, sizeof(uboot_enaddr));
}
}
#undef EXPECT_2HEX
#undef EXPECT_HEX
#undef EXPECT_COLON
}
void
odroid_device_register(device_t self, void *aux)
{
prop_dictionary_t dict = device_properties(self);
exynos_device_register(self, aux);
if (device_is_a(self, "exyogpio")) {
init_gpio_dictionary(gpio_pin_entries, dict);
} else if (device_is_a(self, "exyowdt")) {
prop_dictionary_set_uint32(dict, "frequency",
EXYNOS_F_IN_FREQ);
}
}
/*
* Exynos specific tweaks
*/
/*
* The external USB devices are clocked trough the DEBUG clkout
* XXX is this Odroid specific? XXX
*/
void
exynos_init_clkout_for_usb(void)
{
/* Select XUSBXTI as source for CLKOUT */
bus_space_write_4(&armv7_generic_bs_tag, exynos_pmu_bsh,
EXYNOS_PMU_DEBUG_CLKOUT, 0x1000);
}
static void
exynos_reset(void)
{
}
static void
exynos_powerdown(void)
{
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: platform.h,v 1.1 2015/12/06 00:33:44 marty Exp $ */
/* $NetBSD: platform.h,v 1.2 2017/06/10 15:13:19 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -32,11 +32,7 @@
#ifndef _ARM_EXYNOS_PLATFORM_H
#define _ARM_EXYNOS_PLATFORM_H
/*
* Kernel VM space 16Mb behind KERNEL_BASE upto 0xeff00000
*/
#define KERNEL_VM_BASE 0xc0000000
#define KERNEL_VM_SIZE (EXYNOS_CORE_VBASE - KERNEL_VM_BASE)
#include <arch/evbarm/fdt/platform.h>
/*
* IO space