-corrected "MSI" capability
-added some new subclasses and capabilities -move capability list printing into a separate function and call it for each header type (not type 0 only)
This commit is contained in:
drochner
parent
80eaffef1b
commit
ec517fd6a5
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_subr.c,v 1.50 2002/05/19 00:01:09 sommerfeld Exp $ */
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/* $NetBSD: pci_subr.c,v 1.51 2002/09/21 16:19:34 drochner Exp $ */
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/*
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* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.50 2002/05/19 00:01:09 sommerfeld Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.51 2002/09/21 16:19:34 drochner Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_pci.h"
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@ -89,6 +89,7 @@ const struct pci_class pci_subclass_mass_storage[] = {
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{ "IPI", PCI_SUBCLASS_MASS_STORAGE_IPI, },
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{ "RAID", PCI_SUBCLASS_MASS_STORAGE_RAID, },
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{ "ATA", PCI_SUBCLASS_MASS_STORAGE_ATA, },
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{ "SATA", PCI_SUBCLASS_MASS_STORAGE_SATA, },
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{ "miscellaneous", PCI_SUBCLASS_MASS_STORAGE_MISC, },
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{ 0 },
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};
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@ -213,6 +214,8 @@ const struct pci_class pci_subclass_wireless[] = {
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{ "RF", PCI_SUBCLASS_WIRELESS_RF, },
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{ "bluetooth", PCI_SUBCLASS_WIRELESS_BLUETOOTH, },
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{ "broadband", PCI_SUBCLASS_WIRELESS_BROADBAND, },
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{ "802.11a (5 GHz)", PCI_SUBCLASS_WIRELESS_802_11A, },
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{ "802.11b (2.4 GHz)", PCI_SUBCLASS_WIRELESS_802_11B, },
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{ "miscellaneous", PCI_SUBCLASS_WIRELESS_MISC, },
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{ 0 },
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};
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@ -776,63 +779,84 @@ pci_conf_print_type0(
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}
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printf("\n");
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printf(" Interrupt line: 0x%02x\n", PCI_INTERRUPT_LINE(rval));
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}
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if (regs[o2i(PCI_COMMAND_STATUS_REG)] & PCI_STATUS_CAPLIST_SUPPORT) {
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for (off = PCI_CAPLIST_PTR(regs[o2i(PCI_CAPLISTPTR_REG)]);
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off != 0;
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off = PCI_CAPLIST_NEXT(regs[o2i(off)])) {
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rval = regs[o2i(off)];
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printf(" Capability register at 0x%02x\n", off);
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static void
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pci_conf_print_caplist(
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#ifdef _KERNEL
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pci_chipset_tag_t pc, pcitag_t tag,
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#endif
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const pcireg_t *regs)
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{
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int off;
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pcireg_t rval;
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printf(" type: 0x%02x (", PCI_CAPLIST_CAP(rval));
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switch (PCI_CAPLIST_CAP(rval)) {
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case PCI_CAP_RESERVED0:
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printf("reserved");
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break;
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case PCI_CAP_PWRMGMT:
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printf("Power Management, rev. %d.0",
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(rval >> 0) & 0x07); /* XXX not clear */
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break;
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case PCI_CAP_AGP:
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printf("AGP, rev. %d.%d",
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(rval >> 24) & 0x0f,
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(rval >> 20) & 0x0f);
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break;
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case PCI_CAP_VPD:
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printf("VPD");
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break;
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case PCI_CAP_SLOTID:
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printf("SlotID");
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break;
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case PCI_CAP_MBI:
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printf("MBI");
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break;
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case PCI_CAP_CPCI_HOTSWAP:
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printf("CompactPCI Hot-swapping");
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break;
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case PCI_CAP_PCIX:
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printf("PCI-X");
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break;
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case PCI_CAP_LDT:
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printf("LDT");
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break;
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case PCI_CAP_VENDSPEC:
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printf("Vendor-specific");
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break;
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case PCI_CAP_DEBUGPORT:
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printf("Debug Port");
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break;
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case PCI_CAP_CPCI_RSRCCTL:
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printf("CompactPCI Resource Control");
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break;
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case PCI_CAP_HOTPLUG:
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printf("Hot-Plug");
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break;
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default:
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printf("unknown");
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}
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printf(")\n");
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for (off = PCI_CAPLIST_PTR(regs[o2i(PCI_CAPLISTPTR_REG)]);
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off != 0;
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off = PCI_CAPLIST_NEXT(regs[o2i(off)])) {
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rval = regs[o2i(off)];
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printf(" Capability register at 0x%02x\n", off);
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printf(" type: 0x%02x (", PCI_CAPLIST_CAP(rval));
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switch (PCI_CAPLIST_CAP(rval)) {
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case PCI_CAP_RESERVED0:
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printf("reserved");
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break;
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case PCI_CAP_PWRMGMT:
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printf("Power Management, rev. %d.0",
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(rval >> 0) & 0x07); /* XXX not clear */
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break;
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case PCI_CAP_AGP:
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printf("AGP, rev. %d.%d",
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(rval >> 24) & 0x0f,
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(rval >> 20) & 0x0f);
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break;
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case PCI_CAP_VPD:
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printf("VPD");
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break;
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case PCI_CAP_SLOTID:
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printf("SlotID");
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break;
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case PCI_CAP_MSI:
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printf("MSI");
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break;
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case PCI_CAP_CPCI_HOTSWAP:
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printf("CompactPCI Hot-swapping");
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break;
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case PCI_CAP_PCIX:
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printf("PCI-X");
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break;
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case PCI_CAP_LDT:
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printf("LDT");
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break;
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case PCI_CAP_VENDSPEC:
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printf("Vendor-specific");
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break;
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case PCI_CAP_DEBUGPORT:
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printf("Debug Port");
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break;
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case PCI_CAP_CPCI_RSRCCTL:
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printf("CompactPCI Resource Control");
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break;
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case PCI_CAP_HOTPLUG:
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printf("Hot-Plug");
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break;
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case PCI_CAP_AGP8:
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printf("AGP 8x");
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break;
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case PCI_CAP_SECURE:
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printf("Secure Device");
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break;
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case PCI_CAP_PCIEXPRESS:
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printf("PCI Express");
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break;
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case PCI_CAP_MSIX:
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printf("MSI-X");
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break;
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default:
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printf("unknown");
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}
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printf(")\n");
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}
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}
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@ -1202,6 +1226,16 @@ pci_conf_print(
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hdrtype);
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printf("\n");
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/* papability list, if present */
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if (regs[o2i(PCI_COMMAND_STATUS_REG)] & PCI_STATUS_CAPLIST_SUPPORT) {
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#ifdef _KERNEL
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pci_conf_print_caplist(pc, tag, regs);
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#else
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pci_conf_print_caplist(regs);
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#endif
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printf("\n");
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}
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/* device-dependent header */
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printf(" Device-dependent header:\n");
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pci_conf_print_regs(regs, endoff, 256);
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