From ec02ebc8a0d42a50422b7565b81de5e8fc1cd8e8 Mon Sep 17 00:00:00 2001 From: thorpej Date: Wed, 9 Feb 2000 00:33:03 +0000 Subject: [PATCH] Adjust for IOASIC register changes. --- sys/arch/alpha/tc/scc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/sys/arch/alpha/tc/scc.c b/sys/arch/alpha/tc/scc.c index 7d916ee82a85..2b7dfdd7d20d 100644 --- a/sys/arch/alpha/tc/scc.c +++ b/sys/arch/alpha/tc/scc.c @@ -1,4 +1,4 @@ -/* $NetBSD: scc.c,v 1.48 2000/02/03 08:13:45 nisimura Exp $ */ +/* $NetBSD: scc.c,v 1.49 2000/02/09 00:33:03 thorpej Exp $ */ /* * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University @@ -64,7 +64,7 @@ */ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: scc.c,v 1.48 2000/02/03 08:13:45 nisimura Exp $"); +__KERNEL_RCSID(0, "$NetBSD: scc.c,v 1.49 2000/02/09 00:33:03 thorpej Exp $"); #include "opt_ddb.h" #ifdef alpha @@ -385,18 +385,18 @@ scc_alphaintr(onoff) int onoff; { if (onoff) { - *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) |= + *(volatile u_int *)(ioasic_base + IOASIC_IMSK) |= IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0; #if !defined(DEC_3000_300) && defined(SCC_DMA) - *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) |= + *(volatile u_int *)(ioasic_base + IOASIC_CSR) |= IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 | IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2; #endif } else { - *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) &= + *(volatile u_int *)(ioasic_base + IOASIC_IMSK) &= ~(IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0); #if !defined(DEC_3000_300) && defined(SCC_DMA) - *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) &= + *(volatile u_int *)(ioasic_base + IOASIC_CSR) &= ~(IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 | IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2); #endif