Add some more CPUID feature bits.

This commit is contained in:
thorpej 2001-08-01 18:47:38 +00:00
parent 5cfec63f0d
commit ebbd9cd428

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@ -1,4 +1,4 @@
/* $NetBSD: specialreg.h,v 1.18 2001/07/22 13:34:05 wiz Exp $ */ /* $NetBSD: specialreg.h,v 1.19 2001/08/01 18:47:38 thorpej Exp $ */
/*- /*-
* Copyright (c) 1991 The Regents of the University of California. * Copyright (c) 1991 The Regents of the University of California.
@ -110,21 +110,26 @@
#define CPUID_FGPAT 0x00010000 /* Page Attribute Table */ #define CPUID_FGPAT 0x00010000 /* Page Attribute Table */
#define CPUID_PSE36 0x00020000 /* 36-bit PSE */ #define CPUID_PSE36 0x00020000 /* 36-bit PSE */
#define CPUID_PN 0x00040000 /* processor serial number */ #define CPUID_PN 0x00040000 /* processor serial number */
#define CPUID_B19 0x00080000 /* reserved */ #define CPUID_CFLUSH 0x00080000 /* CFLUSH insn supported */
#define CPUID_B20 0x00100000 /* reserved */ #define CPUID_B20 0x00100000 /* reserved */
#define CPUID_B21 0x00200000 /* reserved */ #define CPUID_DS 0x00200000 /* Debug Store */
#define CPUID_B22 0x00400000 /* reserved */ #define CPUID_ACPI 0x00400000 /* ACPI performance modulation regs */
#define CPUID_MMX 0x00800000 /* MMX supported */ #define CPUID_MMX 0x00800000 /* MMX supported */
#define CPUID_FXSR 0x01000000 /* fast FP/MMX save/restore */ #define CPUID_FXSR 0x01000000 /* fast FP/MMX save/restore */
#define CPUID_XMM 0x02000000 /* streaming SIMD extensions */ #define CPUID_SSE 0x02000000 /* streaming SIMD extensions */
/* bits 26->31 also reserved. */ #define CPUID_SSE2 0x04000000 /* streaming SIMD extensions #2 */
#define CPUID_SS 0x08000000 /* self-snoop */
#define CPUID_B28 0x10000000 /* reserved */
#define CPUID_TM 0x20000000 /* thermal monitor (TCC) */
#define CPUID_B30 0x40000000 /* reserved */
#define CPUID_B31 0x80000000 /* reserved */
#define CPUID_FLAGS1 "\20\1FPU\2VME\3DE\4PSE\5TSC\6MSR\7PAE" \ #define CPUID_FLAGS1 "\20\1FPU\2VME\3DE\4PSE\5TSC\6MSR\7PAE" \
"\10MCE\11CX8\12APIC\13B10\14SEP\15MTRR" "\10MCE\11CX8\12APIC\13B10\14SEP\15MTRR"
#define CPUID_MASK1 0x00001fff #define CPUID_MASK1 0x00001fff
#define CPUID_FLAGS2 "\20\16PGE\17MCA\20CMOV\21FGPAT\22PSE36\23PN\24B19" \ #define CPUID_FLAGS2 "\20\16PGE\17MCA\20CMOV\21FGPAT\22PSE36\23PN\24CFLUSH" \
"\25B20\26B21\27B22\30MMX\31FXSR\32XMM\33B26" \ "\25B20\26DS\27ACPI\30MMX\31FXSR\32SSE\33SSE2" \
"\34B27\35B28\36B29\37B30\40B31" "\34SS\35B28\36TM\37B30\40B31"
#define CPUID_MASK2 0xffffe000 #define CPUID_MASK2 0xffffe000
/* /*