Long awaited MI/MD separation completed.
This commit is contained in:
parent
151926da32
commit
ebb856e274
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@ -1,4 +1,4 @@
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/* $NetBSD: mc68851.h,v 1.4 1997/03/13 17:40:33 gwr Exp $ */
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/* $NetBSD: mc68851.h,v 1.5 1997/05/14 01:37:23 jeremy Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -37,10 +37,10 @@
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*/
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/*
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* This file should contain the machine-independent definitions
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* related to the Motorola MC68881 Memory Management Unit (MMU).
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* This file contains the machine-independent definitions
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* related to the Motorola MC68851 Memory Management Unit (MMU).
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* Things that depend on the contents of the Translation Control
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* (TC) register should be in <machine/pte.h>, not here.
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* (TC) register are in <machine/pte.h>.
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*/
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#ifndef _SUN3X_MC68851_H
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/**************************** MMU STRUCTURES ****************************
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* MMU structures define the format of data used by the MC68851. *
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************************************************************************
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* A virtual address is translated into a physical address by dividing its
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* bits into four fields. The first three fields are used as indexes into
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* descriptor tables and the last field (the 13 lowest significant
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* bits) is an offset to be added to the base address found at the final
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* table. The first three fields are named TIA, TIB and TIC respectively.
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* 31 12 0
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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* | TIA | TIB | TIC | OFFSET |
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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*/
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#define MMU_TIA_SHIFT (13+6+6)
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#define MMU_TIA_MASK (0xfe000000)
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#define MMU_TIA_RANGE (0x02000000)
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#define MMU_TIB_SHIFT (13+6)
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#define MMU_TIB_MASK (0x01f80000)
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#define MMU_TIB_RANGE (0x00080000)
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#define MMU_TIC_SHIFT (13)
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#define MMU_TIC_MASK (0x0007e000)
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#define MMU_TIC_RANGE (0x00002000)
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#define MMU_PAGE_SHIFT (13)
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#define MMU_PAGE_MASK (0xffffe000)
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#define MMU_PAGE_SIZE (0x00002000)
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/* Macros which extract each of these fields out of a given
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* VA.
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*/
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#define MMU_TIA(va) \
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((unsigned long) ((va) & MMU_TIA_MASK) >> MMU_TIA_SHIFT)
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#define MMU_TIB(va) \
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((unsigned long) ((va) & MMU_TIB_MASK) >> MMU_TIB_SHIFT)
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#define MMU_TIC(va) \
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((unsigned long) ((va) & MMU_TIC_MASK) >> MMU_TIC_SHIFT)
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/* The widths of the TIA, TIB, and TIC fields determine the size (in
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* elements) of the tables they index.
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*/
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#define MMU_A_TBL_SIZE (128)
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#define MMU_B_TBL_SIZE (64)
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#define MMU_C_TBL_SIZE (64)
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/* Rounding macros.
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* The MMU_ROUND macros are named misleadingly. MMU_ROUND_A actually
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* rounds an address to the nearest B table boundary, and so on.
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* MMU_ROUND_C() is synonmous with _round_page().
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*/
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#define MMU_ROUND_A(pa)\
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((unsigned long) (pa) & MMU_TIA_MASK)
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#define MMU_ROUND_UP_A(pa)\
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((unsigned long) (pa + MMU_TIA_RANGE - 1) & MMU_TIA_MASK)
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#define MMU_ROUND_B(pa)\
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((unsigned long) (pa) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_UP_B(pa)\
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((unsigned long) (pa + MMU_TIB_RANGE - 1) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_C(pa)\
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((unsigned long) (pa) & MMU_PAGE_MASK)
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#define MMU_ROUND_UP_C(pa)\
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((unsigned long) (pa + MMU_PAGE_SIZE - 1) & MMU_PAGE_MASK)
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/** MC68851 Root Pointer
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** MC68851 Root Pointer
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* All address translations begin with the examination of the value
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* in the MC68851 Root Pointer register. It describes the base address
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* (in physical memory) of the root table to be used as well as any limits
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@ -1,4 +1,4 @@
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/* $NetBSD: pte3x.h,v 1.4 1997/03/13 17:40:34 gwr Exp $ */
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/* $NetBSD: pte3x.h,v 1.5 1997/05/14 01:37:24 jeremy Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -48,6 +48,75 @@
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#include <machine/mc68851.h>
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/*************************************************************************
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* Translation Control Register Settings *
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*************************************************************************
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* The following settings are set by the ROM monitor and used by the
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* kernel. If they are changed, appropriate code must be written into
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* the kernel startup to set them.
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*
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* A virtual address is translated into a physical address by dividing its
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* bits into four fields. The first three fields are used as indexes into
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* descriptor tables and the last field (the 13 lowest significant
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* bits) is an offset to be added to the base address found at the final
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* table. The first three fields are named TIA, TIB and TIC respectively.
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* 31 12 0
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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* | TIA | TIB | TIC | OFFSET |
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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*/
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#define MMU_TIA_SHIFT (13+6+6)
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#define MMU_TIA_MASK (0xfe000000)
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#define MMU_TIA_RANGE (0x02000000)
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#define MMU_TIB_SHIFT (13+6)
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#define MMU_TIB_MASK (0x01f80000)
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#define MMU_TIB_RANGE (0x00080000)
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#define MMU_TIC_SHIFT (13)
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#define MMU_TIC_MASK (0x0007e000)
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#define MMU_TIC_RANGE (0x00002000)
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#define MMU_PAGE_SHIFT (13)
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#define MMU_PAGE_MASK (0xffffe000)
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#define MMU_PAGE_SIZE (0x00002000)
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/*
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* Macros which extract each of these fields out of a given
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* VA.
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*/
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#define MMU_TIA(va) \
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((unsigned long) ((va) & MMU_TIA_MASK) >> MMU_TIA_SHIFT)
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#define MMU_TIB(va) \
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((unsigned long) ((va) & MMU_TIB_MASK) >> MMU_TIB_SHIFT)
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#define MMU_TIC(va) \
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((unsigned long) ((va) & MMU_TIC_MASK) >> MMU_TIC_SHIFT)
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/*
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* The widths of the TIA, TIB, and TIC fields determine the size (in
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* elements) of the tables they index.
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*/
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#define MMU_A_TBL_SIZE (128)
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#define MMU_B_TBL_SIZE (64)
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#define MMU_C_TBL_SIZE (64)
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/*
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* Rounding macros.
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* The MMU_ROUND macros are named misleadingly. MMU_ROUND_A actually
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* rounds an address to the nearest B table boundary, and so on.
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* MMU_ROUND_C() is synonmous with _round_page().
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*/
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#define MMU_ROUND_A(pa)\
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((unsigned long) (pa) & MMU_TIA_MASK)
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#define MMU_ROUND_UP_A(pa)\
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((unsigned long) (pa + MMU_TIA_RANGE - 1) & MMU_TIA_MASK)
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#define MMU_ROUND_B(pa)\
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((unsigned long) (pa) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_UP_B(pa)\
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((unsigned long) (pa + MMU_TIB_RANGE - 1) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_C(pa)\
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((unsigned long) (pa) & MMU_PAGE_MASK)
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#define MMU_ROUND_UP_C(pa)\
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((unsigned long) (pa + MMU_PAGE_SIZE - 1) & MMU_PAGE_MASK)
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/* Bus space tags */
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#define OBMEM 0
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#define OBIO 1
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#define VME_D16 2
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/* $NetBSD: mc68851.h,v 1.4 1997/03/13 17:40:33 gwr Exp $ */
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/* $NetBSD: mc68851.h,v 1.5 1997/05/14 01:37:23 jeremy Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -37,10 +37,10 @@
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*/
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/*
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* This file should contain the machine-independent definitions
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* related to the Motorola MC68881 Memory Management Unit (MMU).
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* This file contains the machine-independent definitions
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* related to the Motorola MC68851 Memory Management Unit (MMU).
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* Things that depend on the contents of the Translation Control
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* (TC) register should be in <machine/pte.h>, not here.
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* (TC) register are in <machine/pte.h>.
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*/
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#ifndef _SUN3X_MC68851_H
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/**************************** MMU STRUCTURES ****************************
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* MMU structures define the format of data used by the MC68851. *
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************************************************************************
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* A virtual address is translated into a physical address by dividing its
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* bits into four fields. The first three fields are used as indexes into
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* descriptor tables and the last field (the 13 lowest significant
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* bits) is an offset to be added to the base address found at the final
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* table. The first three fields are named TIA, TIB and TIC respectively.
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* 31 12 0
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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* | TIA | TIB | TIC | OFFSET |
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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*/
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#define MMU_TIA_SHIFT (13+6+6)
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#define MMU_TIA_MASK (0xfe000000)
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#define MMU_TIA_RANGE (0x02000000)
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#define MMU_TIB_SHIFT (13+6)
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#define MMU_TIB_MASK (0x01f80000)
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#define MMU_TIB_RANGE (0x00080000)
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#define MMU_TIC_SHIFT (13)
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#define MMU_TIC_MASK (0x0007e000)
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#define MMU_TIC_RANGE (0x00002000)
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#define MMU_PAGE_SHIFT (13)
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#define MMU_PAGE_MASK (0xffffe000)
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#define MMU_PAGE_SIZE (0x00002000)
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/* Macros which extract each of these fields out of a given
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* VA.
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*/
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#define MMU_TIA(va) \
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((unsigned long) ((va) & MMU_TIA_MASK) >> MMU_TIA_SHIFT)
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#define MMU_TIB(va) \
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((unsigned long) ((va) & MMU_TIB_MASK) >> MMU_TIB_SHIFT)
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#define MMU_TIC(va) \
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((unsigned long) ((va) & MMU_TIC_MASK) >> MMU_TIC_SHIFT)
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/* The widths of the TIA, TIB, and TIC fields determine the size (in
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* elements) of the tables they index.
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*/
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#define MMU_A_TBL_SIZE (128)
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#define MMU_B_TBL_SIZE (64)
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#define MMU_C_TBL_SIZE (64)
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/* Rounding macros.
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* The MMU_ROUND macros are named misleadingly. MMU_ROUND_A actually
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* rounds an address to the nearest B table boundary, and so on.
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* MMU_ROUND_C() is synonmous with _round_page().
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*/
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#define MMU_ROUND_A(pa)\
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((unsigned long) (pa) & MMU_TIA_MASK)
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#define MMU_ROUND_UP_A(pa)\
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((unsigned long) (pa + MMU_TIA_RANGE - 1) & MMU_TIA_MASK)
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#define MMU_ROUND_B(pa)\
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((unsigned long) (pa) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_UP_B(pa)\
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((unsigned long) (pa + MMU_TIB_RANGE - 1) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_C(pa)\
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((unsigned long) (pa) & MMU_PAGE_MASK)
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#define MMU_ROUND_UP_C(pa)\
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((unsigned long) (pa + MMU_PAGE_SIZE - 1) & MMU_PAGE_MASK)
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/** MC68851 Root Pointer
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** MC68851 Root Pointer
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* All address translations begin with the examination of the value
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* in the MC68851 Root Pointer register. It describes the base address
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* (in physical memory) of the root table to be used as well as any limits
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@ -1,4 +1,4 @@
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/* $NetBSD: pte.h,v 1.4 1997/03/13 17:40:34 gwr Exp $ */
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/* $NetBSD: pte.h,v 1.5 1997/05/14 01:37:24 jeremy Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -48,6 +48,75 @@
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#include <machine/mc68851.h>
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/*************************************************************************
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* Translation Control Register Settings *
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*************************************************************************
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* The following settings are set by the ROM monitor and used by the
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* kernel. If they are changed, appropriate code must be written into
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* the kernel startup to set them.
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*
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* A virtual address is translated into a physical address by dividing its
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* bits into four fields. The first three fields are used as indexes into
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* descriptor tables and the last field (the 13 lowest significant
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* bits) is an offset to be added to the base address found at the final
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* table. The first three fields are named TIA, TIB and TIC respectively.
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* 31 12 0
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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* | TIA | TIB | TIC | OFFSET |
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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*/
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#define MMU_TIA_SHIFT (13+6+6)
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#define MMU_TIA_MASK (0xfe000000)
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#define MMU_TIA_RANGE (0x02000000)
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#define MMU_TIB_SHIFT (13+6)
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#define MMU_TIB_MASK (0x01f80000)
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#define MMU_TIB_RANGE (0x00080000)
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#define MMU_TIC_SHIFT (13)
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#define MMU_TIC_MASK (0x0007e000)
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#define MMU_TIC_RANGE (0x00002000)
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#define MMU_PAGE_SHIFT (13)
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#define MMU_PAGE_MASK (0xffffe000)
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#define MMU_PAGE_SIZE (0x00002000)
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/*
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* Macros which extract each of these fields out of a given
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* VA.
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*/
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#define MMU_TIA(va) \
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((unsigned long) ((va) & MMU_TIA_MASK) >> MMU_TIA_SHIFT)
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#define MMU_TIB(va) \
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((unsigned long) ((va) & MMU_TIB_MASK) >> MMU_TIB_SHIFT)
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#define MMU_TIC(va) \
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((unsigned long) ((va) & MMU_TIC_MASK) >> MMU_TIC_SHIFT)
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/*
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* The widths of the TIA, TIB, and TIC fields determine the size (in
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* elements) of the tables they index.
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*/
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#define MMU_A_TBL_SIZE (128)
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#define MMU_B_TBL_SIZE (64)
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#define MMU_C_TBL_SIZE (64)
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/*
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* Rounding macros.
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* The MMU_ROUND macros are named misleadingly. MMU_ROUND_A actually
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* rounds an address to the nearest B table boundary, and so on.
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* MMU_ROUND_C() is synonmous with _round_page().
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*/
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#define MMU_ROUND_A(pa)\
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((unsigned long) (pa) & MMU_TIA_MASK)
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#define MMU_ROUND_UP_A(pa)\
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((unsigned long) (pa + MMU_TIA_RANGE - 1) & MMU_TIA_MASK)
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#define MMU_ROUND_B(pa)\
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((unsigned long) (pa) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_UP_B(pa)\
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((unsigned long) (pa + MMU_TIB_RANGE - 1) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_C(pa)\
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((unsigned long) (pa) & MMU_PAGE_MASK)
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#define MMU_ROUND_UP_C(pa)\
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((unsigned long) (pa + MMU_PAGE_SIZE - 1) & MMU_PAGE_MASK)
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/* Bus space tags */
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#define OBMEM 0
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#define OBIO 1
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#define VME_D16 2
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