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Sprinkle volatiles to avoid register allocation, esp. in cross-call

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synchronisation functions used in SMP kernels.
This commit is contained in:
pk 2002-12-19 10:30:39 +00:00
parent ec2b1c3c64
commit eaf530d598
2 changed files with 14 additions and 14 deletions
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15
sys/arch/sparc/sparc/cpuvar.h
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@ -1,4 +1,4 @@
/* $NetBSD: cpuvar.h,v 1.41 2002/12/16 16:59:11 pk Exp $ */ /* $NetBSD: cpuvar.h,v 1.42 2002/12/19 10:30:39 pk Exp $ */
/* /*
* Copyright (c) 1996 The NetBSD Foundation, Inc. * Copyright (c) 1996 The NetBSD Foundation, Inc.
@ -221,13 +221,13 @@ struct cpu_info {
char fpu_namebuf[32];/* Buffer for FPU name, if necessary */ char fpu_namebuf[32];/* Buffer for FPU name, if necessary */
/* various flags to workaround anomalies in chips */ /* various flags to workaround anomalies in chips */
int flags; /* see CPUFLG_xxx, below */ volatile int flags; /* see CPUFLG_xxx, below */
/* Per processor counter register (sun4m only) */ /* Per processor counter register (sun4m only) */
struct counter_4m *counterreg_4m; volatile struct counter_4m *counterreg_4m;
/* Per processor interrupt mask register (sun4m only) */ /* Per processor interrupt mask register (sun4m only) */
struct icr_pi *intreg_4m; volatile struct icr_pi *intreg_4m;
#define raise_ipi(cpi) do { \ #define raise_ipi(cpi) do { \
(cpi)->intreg_4m->pi_set = PINTR_SINTRLEV(15); \ (cpi)->intreg_4m->pi_set = PINTR_SINTRLEV(15); \
} while (0) } while (0)
@ -241,7 +241,7 @@ struct cpu_info {
struct proc *ci_curproc; /* CPU owner */ struct proc *ci_curproc; /* CPU owner */
struct proc *fpproc; /* FPU owner */ struct proc *fpproc; /* FPU owner */
/* XXX */ /* XXX */
void *ci_ddb_regs; /* DDB regs */ volatile void *ci_ddb_regs; /* DDB regs */
/* /*
* Idle PCB and Interrupt stack; * Idle PCB and Interrupt stack;
@ -319,7 +319,7 @@ struct cpu_info {
void (*memerr)(unsigned, u_int, u_int, struct trapframe *); void (*memerr)(unsigned, u_int, u_int, struct trapframe *);
/* Inter-processor message area */ /* Inter-processor message area */
struct xpmsg msg; volatile struct xpmsg msg;
#if defined(DIAGNOSTIC) || defined(LOCKDEBUG) #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
u_long ci_spin_locks; /* # of spin locks held */ u_long ci_spin_locks; /* # of spin locks held */
@ -422,7 +422,8 @@ void pmap_alloc_cpu (struct cpu_info *);
void pmap_globalize_boot_cpu (struct cpu_info *); void pmap_globalize_boot_cpu (struct cpu_info *);
#if defined(MULTIPROCESSOR) #if defined(MULTIPROCESSOR)
void raise_ipi_wait_and_unlock (struct cpu_info *); void raise_ipi_wait_and_unlock (struct cpu_info *);
void cross_call (int (*)(int, int, int, int), int, int, int, int, int); typedef int (*xcall_func_t)(int, int, int, int);
void xcall (xcall_func_t, int, int, int, int, int);
#endif #endif
extern struct cpu_info **cpus; extern struct cpu_info **cpus;

13
sys/arch/sparc/sparc/db_interface.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: db_interface.c,v 1.45 2002/12/16 16:59:11 pk Exp $ */ /* $NetBSD: db_interface.c,v 1.46 2002/12/19 10:30:39 pk Exp $ */
/* /*
* Mach Operating System * Mach Operating System
@ -264,17 +264,16 @@ db_resume_others(void)
static void static void
ddb_suspend(struct trapframe *tf) ddb_suspend(struct trapframe *tf)
{ {
db_regs_t regs; volatile db_regs_t regs;
regs.db_tf = *tf; regs.db_tf = *tf;
regs.db_fr = *(struct frame *)tf->tf_out[6]; regs.db_fr = *(struct frame *)tf->tf_out[6];
cpuinfo.ci_ddb_regs = &regs; cpuinfo.ci_ddb_regs = &regs;
while (cpuinfo.flags & CPUFLG_PAUSED) while (cpuinfo.flags & CPUFLG_PAUSED) /*void*/;
cache_flush((caddr_t)&cpuinfo.flags, sizeof(cpuinfo.flags)); cpuinfo.ci_ddb_regs = NULL;
cpuinfo.ci_ddb_regs = 0;
} }
#endif #endif /* MULTIPROCESSOR */
/* /*
* kdb_trap - field a TRACE or BPT trap * kdb_trap - field a TRACE or BPT trap
@ -528,7 +527,7 @@ db_cpu_cmd(addr, have_addr, count, modif)
return; return;
} }
db_printf("using cpu %ld", addr); db_printf("using cpu %ld", addr);
ddb_regp = ci->ci_ddb_regs; ddb_regp = (void *)ci->ci_ddb_regs;
} }
#endif /* MULTIPROCESSOR */ #endif /* MULTIPROCESSOR */