From ea56bcee8490e4cc1e66369a909c2e02a9fd9df1 Mon Sep 17 00:00:00 2001 From: he Date: Wed, 26 Nov 2003 08:36:49 +0000 Subject: [PATCH] Hide the register number constants behind an _R_ prefix, and also rename FPBASE to _FPBASE, so that we avoid polluting the user's name space when e.g. is included. Previously, the PC symbol in mips/regnum.h would conflict with the declaration of the external variable by the same name in termcap.h, as discovered by the ``okheaders'' regression test. --- lib/libc/arch/mips/gen/__setjmp14.S | 32 ++--- lib/libc/arch/mips/gen/_setjmp.S | 44 +++--- lib/libc/arch/mips/gen/setjmp.S | 32 ++--- lib/libpthread/arch/mips/pthread_md.h | 30 ++--- sys/arch/mips/include/db_machdep.h | 12 +- sys/arch/mips/include/pcb.h | 4 +- sys/arch/mips/include/regnum.h | 180 ++++++++++++------------- sys/arch/mips/mips/compat_13_machdep.c | 12 +- sys/arch/mips/mips/compat_16_machdep.c | 40 +++--- sys/arch/mips/mips/cpu_exec.c | 6 +- sys/arch/mips/mips/db_interface.c | 136 +++++++++---------- sys/arch/mips/mips/db_trace.c | 122 ++++++++--------- sys/arch/mips/mips/genassym.cf | 86 ++++++------ sys/arch/mips/mips/kgdb_machdep.c | 76 +++++------ sys/arch/mips/mips/mips_emul.c | 49 +++---- sys/arch/mips/mips/mips_machdep.c | 63 ++++----- sys/arch/mips/mips/process_machdep.c | 10 +- sys/arch/mips/mips/sig_machdep.c | 20 +-- sys/arch/mips/mips/syscall.c | 124 ++++++++--------- sys/arch/mips/mips/trap.c | 26 ++-- sys/arch/mips/mips/vm_machdep.c | 6 +- sys/compat/irix/irix_exec.c | 6 +- sys/compat/irix/irix_prctl.c | 26 ++-- sys/compat/irix/irix_signal.c | 69 +++++----- 24 files changed, 608 insertions(+), 603 deletions(-) diff --git a/lib/libc/arch/mips/gen/__setjmp14.S b/lib/libc/arch/mips/gen/__setjmp14.S index 09b42d76d9ee..9f4a0816c221 100644 --- a/lib/libc/arch/mips/gen/__setjmp14.S +++ b/lib/libc/arch/mips/gen/__setjmp14.S @@ -1,4 +1,4 @@ -/* $NetBSD: __setjmp14.S,v 1.8 2003/08/07 16:42:15 agc Exp $ */ +/* $NetBSD: __setjmp14.S,v 1.9 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -41,7 +41,7 @@ #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: __setjmp14.S,v 1.8 2003/08/07 16:42:15 agc Exp $") + ASMSTR("$NetBSD: __setjmp14.S,v 1.9 2003/11/26 08:36:49 he Exp $") #endif /* LIBC_SCCS and not lint */ #ifdef __ABICALLS__ @@ -99,18 +99,18 @@ NON_LEAF(__setjmp14, SETJMP_FRAME_SIZE, ra) REG_PROLOGUE REG_S ra, (2 * 4)(a0) # sc_pc = return address REG_LI v0, 0xACEDBADE # sigcontext magic number - REG_S v0, (_OFFSETOF_SC_REGS + ZERO * SZREG)(a0) # saved in sc_regs[0] - REG_S s0, (_OFFSETOF_SC_REGS + S0 * SZREG)(a0) - REG_S s1, (_OFFSETOF_SC_REGS + S1 * SZREG)(a0) - REG_S s2, (_OFFSETOF_SC_REGS + S2 * SZREG)(a0) - REG_S s3, (_OFFSETOF_SC_REGS + S3 * SZREG)(a0) - REG_S s4, (_OFFSETOF_SC_REGS + S4 * SZREG)(a0) - REG_S s5, (_OFFSETOF_SC_REGS + S5 * SZREG)(a0) - REG_S s6, (_OFFSETOF_SC_REGS + S6 * SZREG)(a0) - REG_S s7, (_OFFSETOF_SC_REGS + S7 * SZREG)(a0) - REG_S gp, (_OFFSETOF_SC_REGS + GP * SZREG)(a0) - REG_S sp, (_OFFSETOF_SC_REGS + SP * SZREG)(a0) - REG_S s8, (_OFFSETOF_SC_REGS + S8 * SZREG)(a0) + REG_S v0, (_OFFSETOF_SC_REGS + _R_ZERO * SZREG)(a0) # saved in sc_regs[0] + REG_S s0, (_OFFSETOF_SC_REGS + _R_S0 * SZREG)(a0) + REG_S s1, (_OFFSETOF_SC_REGS + _R_S1 * SZREG)(a0) + REG_S s2, (_OFFSETOF_SC_REGS + _R_S2 * SZREG)(a0) + REG_S s3, (_OFFSETOF_SC_REGS + _R_S3 * SZREG)(a0) + REG_S s4, (_OFFSETOF_SC_REGS + _R_S4 * SZREG)(a0) + REG_S s5, (_OFFSETOF_SC_REGS + _R_S5 * SZREG)(a0) + REG_S s6, (_OFFSETOF_SC_REGS + _R_S6 * SZREG)(a0) + REG_S s7, (_OFFSETOF_SC_REGS + _R_S7 * SZREG)(a0) + REG_S gp, (_OFFSETOF_SC_REGS + _R_GP * SZREG)(a0) + REG_S sp, (_OFFSETOF_SC_REGS + _R_SP * SZREG)(a0) + REG_S s8, (_OFFSETOF_SC_REGS + _R_S8 * SZREG)(a0) li v0, 1 # be nice if we could tell sw v0, (_OFFSETOF_SC_REGS + 34 * SZREG)(a0) # sc_fpused = 1 cfc1 v0, $31 @@ -141,8 +141,8 @@ LEAF(__longjmp14) .cprestore 16 #endif REG_PROLOGUE - /* save return value in sc_regs[V0] */ - REG_S a1,(_OFFSETOF_SC_REGS + V0 * SZREG)(a0) + /* save return value in sc_regs[_R_V0] */ + REG_S a1,(_OFFSETOF_SC_REGS + _R_V0 * SZREG)(a0) REG_EPILOGUE li v0, SYS___sigreturn14 syscall diff --git a/lib/libc/arch/mips/gen/_setjmp.S b/lib/libc/arch/mips/gen/_setjmp.S index c86a2b1defcd..dfa71f862f53 100644 --- a/lib/libc/arch/mips/gen/_setjmp.S +++ b/lib/libc/arch/mips/gen/_setjmp.S @@ -1,4 +1,4 @@ -/* $NetBSD: _setjmp.S,v 1.17 2003/08/07 16:42:15 agc Exp $ */ +/* $NetBSD: _setjmp.S,v 1.18 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -40,7 +40,7 @@ #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: _setjmp.S,v 1.17 2003/08/07 16:42:15 agc Exp $") + ASMSTR("$NetBSD: _setjmp.S,v 1.18 2003/11/26 08:36:49 he Exp $") #endif /* LIBC_SCCS and not lint */ #ifdef __ABICALLS__ @@ -71,16 +71,16 @@ LEAF(_setjmp) REG_LI v0, 0xACEDBADE # sigcontext magic number REG_S ra, (2 * 4)(a0) # sc_pc = return address REG_S v0, (_OFFSETOF_SC_REGS)(a0) # saved in sc_regs[0] - REG_S s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) cfc1 v0, $31 # too bad cant check if FP used swc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) swc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0) @@ -115,17 +115,17 @@ LEAF(_longjmp) REG_LI t0, 0xACEDBADE bne v0, t0, botch # jump if error addu sp, sp, 32 # does not matter, sanity - REG_L s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) lw v0, (32 * 4 + _OFFSETOF_SC_FPREGS)(a0) # get fpu status - REG_L sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) ctc1 v0, $31 lwc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) lwc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0) diff --git a/lib/libc/arch/mips/gen/setjmp.S b/lib/libc/arch/mips/gen/setjmp.S index 0b7461456fe1..52eb125a2477 100644 --- a/lib/libc/arch/mips/gen/setjmp.S +++ b/lib/libc/arch/mips/gen/setjmp.S @@ -1,4 +1,4 @@ -/* $NetBSD: setjmp.S,v 1.15 2003/08/07 16:42:15 agc Exp $ */ +/* $NetBSD: setjmp.S,v 1.16 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -41,7 +41,7 @@ #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: setjmp.S,v 1.15 2003/08/07 16:42:15 agc Exp $") + ASMSTR("$NetBSD: setjmp.S,v 1.16 2003/11/26 08:36:49 he Exp $") #endif /* LIBC_SCCS and not lint */ #ifdef __ABICALLS__ @@ -91,18 +91,18 @@ NON_LEAF(setjmp, SETJMP_FRAME_SIZE, ra) REG_PROLOGUE REG_S ra, (2 * 4)(a0) # sc_pc = return address REG_LI v0, 0xACEDBADE # sigcontext magic number - REG_S v0, (_OFFSETOF_SC_REGS + SZREG * ZERO)(a0) # saved in sc_regs[0] - REG_S s0, (_OFFSETOF_SC_REGS + SZREG * S0)(a0) - REG_S s1, (_OFFSETOF_SC_REGS + SZREG * S1)(a0) - REG_S s2, (_OFFSETOF_SC_REGS + SZREG * S2)(a0) - REG_S s3, (_OFFSETOF_SC_REGS + SZREG * S3)(a0) - REG_S s4, (_OFFSETOF_SC_REGS + SZREG * S4)(a0) - REG_S s5, (_OFFSETOF_SC_REGS + SZREG * S5)(a0) - REG_S s6, (_OFFSETOF_SC_REGS + SZREG * S6)(a0) - REG_S s7, (_OFFSETOF_SC_REGS + SZREG * S7)(a0) - REG_S gp, (_OFFSETOF_SC_REGS + SZREG * GP)(a0) - REG_S sp, (_OFFSETOF_SC_REGS + SZREG * SP)(a0) - REG_S s8, (_OFFSETOF_SC_REGS + SZREG * S8)(a0) + REG_S v0, (_OFFSETOF_SC_REGS + SZREG * _R_ZERO)(a0) # saved in sc_regs[0] + REG_S s0, (_OFFSETOF_SC_REGS + SZREG * _R_S0)(a0) + REG_S s1, (_OFFSETOF_SC_REGS + SZREG * _R_S1)(a0) + REG_S s2, (_OFFSETOF_SC_REGS + SZREG * _R_S2)(a0) + REG_S s3, (_OFFSETOF_SC_REGS + SZREG * _R_S3)(a0) + REG_S s4, (_OFFSETOF_SC_REGS + SZREG * _R_S4)(a0) + REG_S s5, (_OFFSETOF_SC_REGS + SZREG * _R_S5)(a0) + REG_S s6, (_OFFSETOF_SC_REGS + SZREG * _R_S6)(a0) + REG_S s7, (_OFFSETOF_SC_REGS + SZREG * _R_S7)(a0) + REG_S gp, (_OFFSETOF_SC_REGS + SZREG * _R_GP)(a0) + REG_S sp, (_OFFSETOF_SC_REGS + SZREG * _R_SP)(a0) + REG_S s8, (_OFFSETOF_SC_REGS + SZREG * _R_S8)(a0) li v0, 1 # be nice if we could tell sw v0, (_OFFSETOF_SC_REGS + 34 * SZREG)(a0) # sc_fpused = 1 cfc1 v0, $31 @@ -133,8 +133,8 @@ LEAF(longjmp) .cprestore 16 #endif REG_PROLOGUE - /* save return value in sc_regs[V0] */ - REG_S a1, (_OFFSETOF_SC_REGS + V0 * SZREG)(a0) + /* save return value in sc_regs[_R_V0] */ + REG_S a1, (_OFFSETOF_SC_REGS + _R_V0 * SZREG)(a0) REG_EPILOGUE li v0, SYS_compat_13_sigreturn13 syscall diff --git a/lib/libpthread/arch/mips/pthread_md.h b/lib/libpthread/arch/mips/pthread_md.h index 1e0e81458cf5..c7409e838fe8 100644 --- a/lib/libpthread/arch/mips/pthread_md.h +++ b/lib/libpthread/arch/mips/pthread_md.h @@ -1,4 +1,4 @@ -/* $NetBSD: pthread_md.h,v 1.3 2003/06/12 23:01:17 nathanw Exp $ */ +/* $NetBSD: pthread_md.h,v 1.4 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -70,24 +70,24 @@ pthread__sp(void) #define PTHREAD_UCONTEXT_TO_REG(reg, uc) \ do { \ - memcpy(&(reg)->r_regs[AST], &(uc)->uc_mcontext.__gregs[_REG_AT],\ + memcpy(&(reg)->r_regs[_R_AST], &(uc)->uc_mcontext.__gregs[_REG_AT],\ sizeof(__greg_t) * 31); \ - (reg)->r_regs[MULLO] = (uc)->uc_mcontext.__gregs[_REG_MDLO]; \ - (reg)->r_regs[MULHI] = (uc)->uc_mcontext.__gregs[_REG_MDHI]; \ - (reg)->r_regs[CAUSE] = (uc)->uc_mcontext.__gregs[_REG_CAUSE]; \ - (reg)->r_regs[PC] = (uc)->uc_mcontext.__gregs[_REG_EPC]; \ - (reg)->r_regs[SR] = (uc)->uc_mcontext.__gregs[_REG_SR]; \ + (reg)->r_regs[_R_MULLO] = (uc)->uc_mcontext.__gregs[_REG_MDLO]; \ + (reg)->r_regs[_R_MULHI] = (uc)->uc_mcontext.__gregs[_REG_MDHI]; \ + (reg)->r_regs[_R_CAUSE] = (uc)->uc_mcontext.__gregs[_REG_CAUSE];\ + (reg)->r_regs[_R_PC] = (uc)->uc_mcontext.__gregs[_REG_EPC]; \ + (reg)->r_regs[_R_SR] = (uc)->uc_mcontext.__gregs[_REG_SR]; \ } while (/*CONSTCOND*/0) #define PTHREAD_REG_TO_UCONTEXT(uc, reg) \ do { \ - memcpy(&(uc)->uc_mcontext.__gregs[_REG_AT], &(reg)->r_regs[AST],\ + memcpy(&(uc)->uc_mcontext.__gregs[_REG_AT], &(reg)->r_regs[_R_AST],\ sizeof(__greg_t) * 31); \ - (uc)->uc_mcontext.__gregs[_REG_MDLO] = (reg)->r_regs[MULLO]; \ - (uc)->uc_mcontext.__gregs[_REG_MDHI] = (reg)->r_regs[MULHI]; \ - (uc)->uc_mcontext.__gregs[_REG_CAUSE] = (reg)->r_regs[CAUSE]; \ - (uc)->uc_mcontext.__gregs[_REG_EPC] = (reg)->r_regs[PC]; \ - (uc)->uc_mcontext.__gregs[_REG_SR] = (reg)->r_regs[SR]; \ + (uc)->uc_mcontext.__gregs[_REG_MDLO] = (reg)->r_regs[_R_MULLO]; \ + (uc)->uc_mcontext.__gregs[_REG_MDHI] = (reg)->r_regs[_R_MULHI]; \ + (uc)->uc_mcontext.__gregs[_REG_CAUSE] = (reg)->r_regs[_R_CAUSE];\ + (uc)->uc_mcontext.__gregs[_REG_EPC] = (reg)->r_regs[_R_PC]; \ + (uc)->uc_mcontext.__gregs[_REG_SR] = (reg)->r_regs[_R_SR]; \ \ (uc)->uc_flags = ((uc)->uc_flags | _UC_CPU) & ~_UC_USER; \ } while (/*CONSTCOND*/0) @@ -96,7 +96,7 @@ do { \ do { \ memcpy((freg), &(uc)->uc_mcontext.__fpregs.__fp_r.__fp_regs32, \ sizeof((uc)->uc_mcontext.__fpregs.__fp_r.__fp_regs32)); \ - (freg)->r_regs[FSR - FPBASE] = \ + (freg)->r_regs[_R_FSR - _FPBASE] = \ (uc)->uc_mcontext.__fpregs.__fp_csr; \ } while (/*CONSTCOND*/0) @@ -105,7 +105,7 @@ do { \ memcpy(&(uc)->uc_mcontext.__fpregs.__fp_r.__fp_regs32, (freg), \ sizeof((uc)->uc_mcontext.__fpregs.__fp_r.__fp_regs32)); \ (uc)->uc_mcontext.__fpregs.__fp_csr = \ - (freg)->r_regs[FSR - FPBASE]; \ + (freg)->r_regs[_R_FSR - _FPBASE]; \ \ (uc)->uc_flags = ((uc)->uc_flags | _UC_FPU) & ~_UC_USER; \ } while (/*CONSTCOND*/0) diff --git a/sys/arch/mips/include/db_machdep.h b/sys/arch/mips/include/db_machdep.h index 7c36d2959780..b50f80e6e55b 100644 --- a/sys/arch/mips/include/db_machdep.h +++ b/sys/arch/mips/include/db_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: db_machdep.h,v 1.15 2003/04/29 17:06:05 scw Exp $ */ +/* $NetBSD: db_machdep.h,v 1.16 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author) @@ -49,18 +49,18 @@ typedef struct frame db_regs_t; extern db_regs_t ddb_regs; /* register state */ #define DDB_REGS (&ddb_regs) -#define PC_REGS(regs) ((db_addr_t)(regs)->f_regs[PC]) +#define PC_REGS(regs) ((db_addr_t)(regs)->f_regs[_R_PC]) #define PC_ADVANCE(regs) do { \ - if ((db_get_value((regs)->f_regs[PC], sizeof(int), FALSE) & \ + if ((db_get_value((regs)->f_regs[_R_PC], sizeof(int), FALSE) &\ 0xfc00003f) == 0xd) \ - (regs)->f_regs[PC] += BKPT_SIZE; \ + (regs)->f_regs[_R_PC] += BKPT_SIZE; \ } while(0) /* Similar to PC_ADVANCE(), except only advance on cpu_Debugger()'s bpt */ #define PC_BREAK_ADVANCE(regs) do { \ - if (db_get_value((regs)->f_regs[PC], sizeof(int), FALSE) == 0xd) \ - (regs)->f_regs[PC] += BKPT_SIZE; \ + if (db_get_value((regs)->f_regs[_R_PC], sizeof(int), FALSE) == 0xd) \ + (regs)->f_regs[_R_PC] += BKPT_SIZE; \ } while(0) #define BKPT_ADDR(addr) (addr) /* breakpoint address */ diff --git a/sys/arch/mips/include/pcb.h b/sys/arch/mips/include/pcb.h index 7616a349d3a3..1da4550ced0f 100644 --- a/sys/arch/mips/include/pcb.h +++ b/sys/arch/mips/include/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.17 2003/08/07 16:28:28 agc Exp $ */ +/* $NetBSD: pcb.h,v 1.18 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1992, 1993 @@ -102,6 +102,6 @@ struct md_coredump { }; #ifdef _KERNEL -#define PCB_FSR(pcb) ((pcb)->pcb_fpregs.r_regs[FSR - FPBASE]) +#define PCB_FSR(pcb) ((pcb)->pcb_fpregs.r_regs[_R_FSR - _FPBASE]) #endif #endif /*_MIPS_PCB_H_*/ diff --git a/sys/arch/mips/include/regnum.h b/sys/arch/mips/include/regnum.h index f33bea832f26..a3640c87c1aa 100644 --- a/sys/arch/mips/include/regnum.h +++ b/sys/arch/mips/include/regnum.h @@ -1,4 +1,4 @@ -/* $NetBSD: regnum.h,v 1.6 2003/08/07 16:28:28 agc Exp $ */ +/* $NetBSD: regnum.h,v 1.7 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1992, 1993 @@ -81,104 +81,104 @@ * registers relative to ZERO. * Usage is p->p_regs[XX]. */ -#define ZERO 0 -#define AST 1 -#define V0 2 -#define V1 3 -#define A0 4 -#define A1 5 -#define A2 6 -#define A3 7 +#define _R_ZERO 0 +#define _R_AST 1 +#define _R_V0 2 +#define _R_V1 3 +#define _R_A0 4 +#define _R_A1 5 +#define _R_A2 6 +#define _R_A3 7 #if defined(__mips_n32) || defined(__mips_n64) -#define A4 8 -#define A5 9 -#define A6 10 -#define A7 11 -#define T0 12 -#define T1 13 -#define T2 14 -#define T3 15 +#define _R_A4 8 +#define _R_A5 9 +#define _R_A6 10 +#define _R_A7 11 +#define _R_T0 12 +#define _R_T1 13 +#define _R_T2 14 +#define _R_T3 15 #else -#define T0 8 -#define T1 9 -#define T2 10 -#define T3 11 -#define T4 12 -#define T5 13 -#define T6 14 -#define T7 15 +#define _R_T0 8 +#define _R_T1 9 +#define _R_T2 10 +#define _R_T3 11 +#define _R_T4 12 +#define _R_T5 13 +#define _R_T6 14 +#define _R_T7 15 #endif /* __mips_n32 || __mips_n64 */ -#define S0 16 -#define S1 17 -#define S2 18 -#define S3 19 -#define S4 20 -#define S5 21 -#define S6 22 -#define S7 23 -#define T8 24 -#define T9 25 -#define K0 26 -#define K1 27 -#define GP 28 -#define SP 29 -#define S8 30 -#define RA 31 -#define SR 32 +#define _R_S0 16 +#define _R_S1 17 +#define _R_S2 18 +#define _R_S3 19 +#define _R_S4 20 +#define _R_S5 21 +#define _R_S6 22 +#define _R_S7 23 +#define _R_T8 24 +#define _R_T9 25 +#define _R_K0 26 +#define _R_K1 27 +#define _R_GP 28 +#define _R_SP 29 +#define _R_S8 30 +#define _R_RA 31 +#define _R_SR 32 #ifndef _KERNEL /* clashes with netccitt/pk.h */ -#define PS SR /* alias for SR */ +#define _R_PS _R_SR /* alias for SR */ #endif /* See for an explanation. */ #if defined(__mips_n32) || defined(__mips_n64) -#define TA0 8 -#define TA1 9 -#define TA2 10 -#define TA3 11 +#define _R_TA0 8 +#define _R_TA1 9 +#define _R_TA2 10 +#define _R_TA3 11 #else -#define TA0 12 -#define TA1 13 -#define TA2 14 -#define TA3 15 +#define _R_TA0 12 +#define _R_TA1 13 +#define _R_TA2 14 +#define _R_TA3 15 #endif /* __mips_n32 || __mips_n64 */ -#define MULLO 33 -#define MULHI 34 -#define BADVADDR 35 -#define CAUSE 36 -#define PC 37 +#define _R_MULLO 33 +#define _R_MULHI 34 +#define _R_BADVADDR 35 +#define _R_CAUSE 36 +#define _R_PC 37 -#define FPBASE 38 -#define F0 (FPBASE+0) -#define F1 (FPBASE+1) -#define F2 (FPBASE+2) -#define F3 (FPBASE+3) -#define F4 (FPBASE+4) -#define F5 (FPBASE+5) -#define F6 (FPBASE+6) -#define F7 (FPBASE+7) -#define F8 (FPBASE+8) -#define F9 (FPBASE+9) -#define F10 (FPBASE+10) -#define F11 (FPBASE+11) -#define F12 (FPBASE+12) -#define F13 (FPBASE+13) -#define F14 (FPBASE+14) -#define F15 (FPBASE+15) -#define F16 (FPBASE+16) -#define F17 (FPBASE+17) -#define F18 (FPBASE+18) -#define F19 (FPBASE+19) -#define F20 (FPBASE+20) -#define F21 (FPBASE+21) -#define F22 (FPBASE+22) -#define F23 (FPBASE+23) -#define F24 (FPBASE+24) -#define F25 (FPBASE+25) -#define F26 (FPBASE+26) -#define F27 (FPBASE+27) -#define F28 (FPBASE+28) -#define F29 (FPBASE+29) -#define F30 (FPBASE+30) -#define F31 (FPBASE+31) -#define FSR (FPBASE+32) +#define _FPBASE 38 +#define _R_F0 (_FPBASE+0) +#define _R_F1 (_FPBASE+1) +#define _R_F2 (_FPBASE+2) +#define _R_F3 (_FPBASE+3) +#define _R_F4 (_FPBASE+4) +#define _R_F5 (_FPBASE+5) +#define _R_F6 (_FPBASE+6) +#define _R_F7 (_FPBASE+7) +#define _R_F8 (_FPBASE+8) +#define _R_F9 (_FPBASE+9) +#define _R_F10 (_FPBASE+10) +#define _R_F11 (_FPBASE+11) +#define _R_F12 (_FPBASE+12) +#define _R_F13 (_FPBASE+13) +#define _R_F14 (_FPBASE+14) +#define _R_F15 (_FPBASE+15) +#define _R_F16 (_FPBASE+16) +#define _R_F17 (_FPBASE+17) +#define _R_F18 (_FPBASE+18) +#define _R_F19 (_FPBASE+19) +#define _R_F20 (_FPBASE+20) +#define _R_F21 (_FPBASE+21) +#define _R_F22 (_FPBASE+22) +#define _R_F23 (_FPBASE+23) +#define _R_F24 (_FPBASE+24) +#define _R_F25 (_FPBASE+25) +#define _R_F26 (_FPBASE+26) +#define _R_F27 (_FPBASE+27) +#define _R_F28 (_FPBASE+28) +#define _R_F29 (_FPBASE+29) +#define _R_F30 (_FPBASE+30) +#define _R_F31 (_FPBASE+31) +#define _R_FSR (_FPBASE+32) diff --git a/sys/arch/mips/mips/compat_13_machdep.c b/sys/arch/mips/mips/compat_13_machdep.c index 7ad26967cd07..bc88e46a3787 100644 --- a/sys/arch/mips/mips/compat_13_machdep.c +++ b/sys/arch/mips/mips/compat_13_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: compat_13_machdep.c,v 1.10 2003/01/17 23:36:10 thorpej Exp $ */ +/* $NetBSD: compat_13_machdep.c,v 1.11 2003/11/26 08:36:49 he Exp $ */ /* * Copyright 1996 The Board of Trustees of The Leland Stanford @@ -15,7 +15,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.10 2003/01/17 23:36:10 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.11 2003/11/26 08:36:49 he Exp $"); #include #include @@ -65,14 +65,14 @@ compat_13_sys_sigreturn(l, v, retval) if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0) return (error); - if ((u_int)ksc.sc_regs[ZERO] != 0xacedbadeU) /* magic number */ + if ((u_int)ksc.sc_regs[_R_ZERO] != 0xacedbadeU)/* magic number */ return (EINVAL); /* Resture the register context. */ f = (struct frame *)l->l_md.md_regs; - f->f_regs[PC] = ksc.sc_pc; - f->f_regs[MULLO] = ksc.mullo; - f->f_regs[MULHI] = ksc.mulhi; + f->f_regs[_R_PC] = ksc.sc_pc; + f->f_regs[_R_MULLO] = ksc.mullo; + f->f_regs[_R_MULHI] = ksc.mulhi; memcpy(&f->f_regs[1], &scp->sc_regs[1], sizeof(scp->sc_regs) - sizeof(scp->sc_regs[0])); if (scp->sc_fpused) diff --git a/sys/arch/mips/mips/compat_16_machdep.c b/sys/arch/mips/mips/compat_16_machdep.c index 30d82cac7faf..a76acb6b154f 100644 --- a/sys/arch/mips/mips/compat_16_machdep.c +++ b/sys/arch/mips/mips/compat_16_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: compat_16_machdep.c,v 1.1 2003/10/29 23:39:45 christos Exp $ */ +/* $NetBSD: compat_16_machdep.c,v 1.2 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. @@ -52,7 +52,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.1 2003/10/29 23:39:45 christos Exp $"); +__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.2 2003/11/26 08:36:49 he Exp $"); #include "opt_cputype.h" #include "opt_compat_netbsd.h" @@ -110,12 +110,12 @@ sendsig_sigcontext(const ksiginfo_t *ksi, const sigset_t *returnmask) #endif /* Build stack frame for signal trampoline. */ - ksc.sc_pc = f->f_regs[PC]; - ksc.mullo = f->f_regs[MULLO]; - ksc.mulhi = f->f_regs[MULHI]; + ksc.sc_pc = f->f_regs[_R_PC]; + ksc.mullo = f->f_regs[_R_MULLO]; + ksc.mulhi = f->f_regs[_R_MULHI]; /* Save register context. */ - ksc.sc_regs[ZERO] = 0xACEDBADE; /* magic number */ + ksc.sc_regs[_R_ZERO] = 0xACEDBADE; /* magic number */ memcpy(&ksc.sc_regs[1], &f->f_regs[1], sizeof(ksc.sc_regs) - sizeof(ksc.sc_regs[0])); @@ -168,24 +168,24 @@ sendsig_sigcontext(const ksiginfo_t *ksi, const sigset_t *returnmask) * handler. The return address will be set up to point * to the signal trampoline to bounce us back. */ - f->f_regs[A0] = sig; - f->f_regs[A1] = ksi->ksi_trap; - f->f_regs[A2] = (int)scp; - f->f_regs[A3] = (int)catcher; /* XXX ??? */ + f->f_regs[_R_A0] = sig; + f->f_regs[_R_A1] = ksi->ksi_trap; + f->f_regs[_R_A2] = (int)scp; + f->f_regs[_R_A3] = (int)catcher; /* XXX ??? */ - f->f_regs[PC] = (int)catcher; - f->f_regs[T9] = (int)catcher; - f->f_regs[SP] = (int)scp; + f->f_regs[_R_PC] = (int)catcher; + f->f_regs[_R_T9] = (int)catcher; + f->f_regs[_R_SP] = (int)scp; switch (ps->sa_sigdesc[sig].sd_vers) { #if 1 /* COMPAT_16 */ case 0: /* legacy on-stack sigtramp */ - f->f_regs[RA] = (int)p->p_sigctx.ps_sigcode; + f->f_regs[_R_RA] = (int)p->p_sigctx.ps_sigcode; break; #endif /* COMPAT_16 */ case 1: - f->f_regs[RA] = (int)ps->sa_sigdesc[sig].sd_tramp; + f->f_regs[_R_RA] = (int)ps->sa_sigdesc[sig].sd_tramp; break; default: @@ -240,20 +240,20 @@ compat_16_sys___sigreturn14(struct lwp *l, void *v, register_t *retval) if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0) return (error); - if ((u_int) ksc.sc_regs[ZERO] != 0xacedbadeU) /* magic number */ + if ((u_int) ksc.sc_regs[_R_ZERO] != 0xacedbadeU)/* magic number */ return (EINVAL); /* Restore the register context. */ f = (struct frame *)l->l_md.md_regs; - f->f_regs[PC] = ksc.sc_pc; - f->f_regs[MULLO] = ksc.mullo; - f->f_regs[MULHI] = ksc.mulhi; + f->f_regs[_R_PC] = ksc.sc_pc; + f->f_regs[_R_MULLO] = ksc.mullo; + f->f_regs[_R_MULHI] = ksc.mulhi; memcpy(&f->f_regs[1], &scp->sc_regs[1], sizeof(scp->sc_regs) - sizeof(scp->sc_regs[0])); #ifndef SOFTFLOAT if (scp->sc_fpused) { /* Disable the FPU to fault in FP registers. */ - f->f_regs[SR] &= ~MIPS_SR_COP_1_BIT; + f->f_regs[_R_SR] &= ~MIPS_SR_COP_1_BIT; if (l == fpcurlwp) { fpcurlwp = (struct lwp *)0; } diff --git a/sys/arch/mips/mips/cpu_exec.c b/sys/arch/mips/mips/cpu_exec.c index 8dd829c9ee5d..6e5e368b282a 100644 --- a/sys/arch/mips/mips/cpu_exec.c +++ b/sys/arch/mips/mips/cpu_exec.c @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_exec.c,v 1.44 2003/09/29 04:03:55 junyoung Exp $ */ +/* $NetBSD: cpu_exec.c,v 1.45 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1992, 1993 @@ -35,7 +35,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.44 2003/09/29 04:03:55 junyoung Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpu_exec.c,v 1.45 2003/11/26 08:36:49 he Exp $"); #include "opt_compat_netbsd.h" #include "opt_compat_ultrix.h" @@ -132,7 +132,7 @@ cpu_exec_ecoff_setregs(l, epp, stack) struct ecoff_exechdr *execp = (struct ecoff_exechdr *)epp->ep_hdr; struct frame *f = (struct frame *)l->l_md.md_regs; - f->f_regs[GP] = (register_t)execp->a.gp_value; + f->f_regs[_R_GP] = (register_t)execp->a.gp_value; } /* diff --git a/sys/arch/mips/mips/db_interface.c b/sys/arch/mips/mips/db_interface.c index 895f9501f2a9..a3d2bb1133a0 100644 --- a/sys/arch/mips/mips/db_interface.c +++ b/sys/arch/mips/mips/db_interface.c @@ -1,4 +1,4 @@ -/* $NetBSD: db_interface.c,v 1.50 2003/07/15 02:43:38 lukem Exp $ */ +/* $NetBSD: db_interface.c,v 1.51 2003/11/26 08:36:49 he Exp $ */ /* * Mach Operating System @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.50 2003/07/15 02:43:38 lukem Exp $"); +__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.51 2003/11/26 08:36:49 he Exp $"); #include "opt_cputype.h" /* which mips CPUs do we support? */ #include "opt_ddb.h" @@ -178,39 +178,39 @@ kdb_trap(int type, mips_reg_t /* struct trapframe */ *tfp) *(struct frame *)curlwp->l_md.md_regs = *f; else { /* Synthetic full scale register context when trap happens */ - tfp[TF_AST] = f->f_regs[AST]; - tfp[TF_V0] = f->f_regs[V0]; - tfp[TF_V1] = f->f_regs[V1]; - tfp[TF_A0] = f->f_regs[A0]; - tfp[TF_A1] = f->f_regs[A1]; - tfp[TF_A2] = f->f_regs[A2]; - tfp[TF_A3] = f->f_regs[A3]; - tfp[TF_T0] = f->f_regs[T0]; - tfp[TF_T1] = f->f_regs[T1]; - tfp[TF_T2] = f->f_regs[T2]; - tfp[TF_T3] = f->f_regs[T3]; - tfp[TF_TA0] = f->f_regs[TA0]; - tfp[TF_TA1] = f->f_regs[TA1]; - tfp[TF_TA2] = f->f_regs[TA2]; - tfp[TF_TA3] = f->f_regs[TA3]; - tfp[TF_T8] = f->f_regs[T8]; - tfp[TF_T9] = f->f_regs[T9]; - tfp[TF_RA] = f->f_regs[RA]; - tfp[TF_SR] = f->f_regs[SR]; - tfp[TF_MULLO] = f->f_regs[MULLO]; - tfp[TF_MULHI] = f->f_regs[MULHI]; - tfp[TF_EPC] = f->f_regs[PC]; - kdbaux[0] = f->f_regs[S0]; - kdbaux[1] = f->f_regs[S1]; - kdbaux[2] = f->f_regs[S2]; - kdbaux[3] = f->f_regs[S3]; - kdbaux[4] = f->f_regs[S4]; - kdbaux[5] = f->f_regs[S5]; - kdbaux[6] = f->f_regs[S6]; - kdbaux[7] = f->f_regs[S7]; - kdbaux[8] = f->f_regs[SP]; - kdbaux[9] = f->f_regs[S8]; - kdbaux[10] = f->f_regs[GP]; + tfp[TF_AST] = f->f_regs[_R_AST]; + tfp[TF_V0] = f->f_regs[_R_V0]; + tfp[TF_V1] = f->f_regs[_R_V1]; + tfp[TF_A0] = f->f_regs[_R_A0]; + tfp[TF_A1] = f->f_regs[_R_A1]; + tfp[TF_A2] = f->f_regs[_R_A2]; + tfp[TF_A3] = f->f_regs[_R_A3]; + tfp[TF_T0] = f->f_regs[_R_T0]; + tfp[TF_T1] = f->f_regs[_R_T1]; + tfp[TF_T2] = f->f_regs[_R_T2]; + tfp[TF_T3] = f->f_regs[_R_T3]; + tfp[TF_TA0] = f->f_regs[_R_TA0]; + tfp[TF_TA1] = f->f_regs[_R_TA1]; + tfp[TF_TA2] = f->f_regs[_R_TA2]; + tfp[TF_TA3] = f->f_regs[_R_TA3]; + tfp[TF_T8] = f->f_regs[_R_T8]; + tfp[TF_T9] = f->f_regs[_R_T9]; + tfp[TF_RA] = f->f_regs[_R_RA]; + tfp[TF_SR] = f->f_regs[_R_SR]; + tfp[TF_MULLO] = f->f_regs[_R_MULLO]; + tfp[TF_MULHI] = f->f_regs[_R_MULHI]; + tfp[TF_EPC] = f->f_regs[_R_PC]; + kdbaux[0] = f->f_regs[_R_S0]; + kdbaux[1] = f->f_regs[_R_S1]; + kdbaux[2] = f->f_regs[_R_S2]; + kdbaux[3] = f->f_regs[_R_S3]; + kdbaux[4] = f->f_regs[_R_S4]; + kdbaux[5] = f->f_regs[_R_S5]; + kdbaux[6] = f->f_regs[_R_S6]; + kdbaux[7] = f->f_regs[_R_S7]; + kdbaux[8] = f->f_regs[_R_SP]; + kdbaux[9] = f->f_regs[_R_S8]; + kdbaux[10] = f->f_regs[_R_GP]; } return (1); @@ -235,39 +235,39 @@ db_set_ddb_regs(int type, mips_reg_t *tfp) *f = *(struct frame *)curlwp->l_md.md_regs; else { /* Synthetic full scale register context when trap happens */ - f->f_regs[AST] = tfp[TF_AST]; - f->f_regs[V0] = tfp[TF_V0]; - f->f_regs[V1] = tfp[TF_V1]; - f->f_regs[A0] = tfp[TF_A0]; - f->f_regs[A1] = tfp[TF_A1]; - f->f_regs[A2] = tfp[TF_A2]; - f->f_regs[A3] = tfp[TF_A3]; - f->f_regs[T0] = tfp[TF_T0]; - f->f_regs[T1] = tfp[TF_T1]; - f->f_regs[T2] = tfp[TF_T2]; - f->f_regs[T3] = tfp[TF_T3]; - f->f_regs[TA0] = tfp[TF_TA0]; - f->f_regs[TA1] = tfp[TF_TA1]; - f->f_regs[TA2] = tfp[TF_TA2]; - f->f_regs[TA3] = tfp[TF_TA3]; - f->f_regs[T8] = tfp[TF_T8]; - f->f_regs[T9] = tfp[TF_T9]; - f->f_regs[RA] = tfp[TF_RA]; - f->f_regs[SR] = tfp[TF_SR]; - f->f_regs[MULLO] = tfp[TF_MULLO]; - f->f_regs[MULHI] = tfp[TF_MULHI]; - f->f_regs[PC] = tfp[TF_EPC]; - f->f_regs[S0] = kdbaux[0]; - f->f_regs[S1] = kdbaux[1]; - f->f_regs[S2] = kdbaux[2]; - f->f_regs[S3] = kdbaux[3]; - f->f_regs[S4] = kdbaux[4]; - f->f_regs[S5] = kdbaux[5]; - f->f_regs[S6] = kdbaux[6]; - f->f_regs[S7] = kdbaux[7]; - f->f_regs[SP] = kdbaux[8]; - f->f_regs[S8] = kdbaux[9]; - f->f_regs[GP] = kdbaux[10]; + f->f_regs[_R_AST] = tfp[TF_AST]; + f->f_regs[_R_V0] = tfp[TF_V0]; + f->f_regs[_R_V1] = tfp[TF_V1]; + f->f_regs[_R_A0] = tfp[TF_A0]; + f->f_regs[_R_A1] = tfp[TF_A1]; + f->f_regs[_R_A2] = tfp[TF_A2]; + f->f_regs[_R_A3] = tfp[TF_A3]; + f->f_regs[_R_T0] = tfp[TF_T0]; + f->f_regs[_R_T1] = tfp[TF_T1]; + f->f_regs[_R_T2] = tfp[TF_T2]; + f->f_regs[_R_T3] = tfp[TF_T3]; + f->f_regs[_R_TA0] = tfp[TF_TA0]; + f->f_regs[_R_TA1] = tfp[TF_TA1]; + f->f_regs[_R_TA2] = tfp[TF_TA2]; + f->f_regs[_R_TA3] = tfp[TF_TA3]; + f->f_regs[_R_T8] = tfp[TF_T8]; + f->f_regs[_R_T9] = tfp[TF_T9]; + f->f_regs[_R_RA] = tfp[TF_RA]; + f->f_regs[_R_SR] = tfp[TF_SR]; + f->f_regs[_R_MULLO] = tfp[TF_MULLO]; + f->f_regs[_R_MULHI] = tfp[TF_MULHI]; + f->f_regs[_R_PC] = tfp[TF_EPC]; + f->f_regs[_R_S0] = kdbaux[0]; + f->f_regs[_R_S1] = kdbaux[1]; + f->f_regs[_R_S2] = kdbaux[2]; + f->f_regs[_R_S3] = kdbaux[3]; + f->f_regs[_R_S4] = kdbaux[4]; + f->f_regs[_R_S5] = kdbaux[5]; + f->f_regs[_R_S6] = kdbaux[6]; + f->f_regs[_R_S7] = kdbaux[7]; + f->f_regs[_R_SP] = kdbaux[8]; + f->f_regs[_R_S8] = kdbaux[9]; + f->f_regs[_R_GP] = kdbaux[10]; } } diff --git a/sys/arch/mips/mips/db_trace.c b/sys/arch/mips/mips/db_trace.c index 1fbc9b05f582..ccfe5024e84b 100644 --- a/sys/arch/mips/mips/db_trace.c +++ b/sys/arch/mips/mips/db_trace.c @@ -1,4 +1,4 @@ -/* $NetBSD: db_trace.c,v 1.24 2003/07/15 02:43:38 lukem Exp $ */ +/* $NetBSD: db_trace.c,v 1.25 2003/11/26 08:36:49 he Exp $ */ /* * Mach Operating System @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.24 2003/07/15 02:43:38 lukem Exp $"); +__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.25 2003/11/26 08:36:49 he Exp $"); #include #include @@ -81,54 +81,54 @@ int db_mips_variable_func(const struct db_variable *, db_expr_t *, int); #define DBREGS_REG() const struct db_variable db_regs[] = { - { "at", (long *)&ddb_regs.f_regs[AST], DB_SETF_REGS }, - { "v0", (long *)&ddb_regs.f_regs[V0], DB_SETF_REGS }, - { "v1", (long *)&ddb_regs.f_regs[V1], DB_SETF_REGS }, - { "a0", (long *)&ddb_regs.f_regs[A0], DB_SETF_REGS }, - { "a1", (long *)&ddb_regs.f_regs[A1], DB_SETF_REGS }, - { "a2", (long *)&ddb_regs.f_regs[A2], DB_SETF_REGS }, - { "a3", (long *)&ddb_regs.f_regs[A3], DB_SETF_REGS }, + { "at", (long *)&ddb_regs.f_regs[_R_AST], DB_SETF_REGS }, + { "v0", (long *)&ddb_regs.f_regs[_R_V0], DB_SETF_REGS }, + { "v1", (long *)&ddb_regs.f_regs[_R_V1], DB_SETF_REGS }, + { "a0", (long *)&ddb_regs.f_regs[_R_A0], DB_SETF_REGS }, + { "a1", (long *)&ddb_regs.f_regs[_R_A1], DB_SETF_REGS }, + { "a2", (long *)&ddb_regs.f_regs[_R_A2], DB_SETF_REGS }, + { "a3", (long *)&ddb_regs.f_regs[_R_A3], DB_SETF_REGS }, #if defined(__mips_n32) || defined(__mips_n64) - { "a4", (long *)&ddb_regs.f_regs[A4], DB_SETF_REGS }, - { "a5", (long *)&ddb_regs.f_regs[A5], DB_SETF_REGS }, - { "a6", (long *)&ddb_regs.f_regs[A6], DB_SETF_REGS }, - { "a7", (long *)&ddb_regs.f_regs[A7], DB_SETF_REGS }, - { "t0", (long *)&ddb_regs.f_regs[T0], DB_SETF_REGS }, - { "t1", (long *)&ddb_regs.f_regs[T1], DB_SETF_REGS }, - { "t2", (long *)&ddb_regs.f_regs[T2], DB_SETF_REGS }, - { "t3", (long *)&ddb_regs.f_regs[T3], DB_SETF_REGS }, + { "a4", (long *)&ddb_regs.f_regs[_R_A4], DB_SETF_REGS }, + { "a5", (long *)&ddb_regs.f_regs[_R_A5], DB_SETF_REGS }, + { "a6", (long *)&ddb_regs.f_regs[_R_A6], DB_SETF_REGS }, + { "a7", (long *)&ddb_regs.f_regs[_R_A7], DB_SETF_REGS }, + { "t0", (long *)&ddb_regs.f_regs[_R_T0], DB_SETF_REGS }, + { "t1", (long *)&ddb_regs.f_regs[_R_T1], DB_SETF_REGS }, + { "t2", (long *)&ddb_regs.f_regs[_R_T2], DB_SETF_REGS }, + { "t3", (long *)&ddb_regs.f_regs[_R_T3], DB_SETF_REGS }, #else - { "t0", (long *)&ddb_regs.f_regs[T0], DB_SETF_REGS }, - { "t1", (long *)&ddb_regs.f_regs[T1], DB_SETF_REGS }, - { "t2", (long *)&ddb_regs.f_regs[T2], DB_SETF_REGS }, - { "t3", (long *)&ddb_regs.f_regs[T3], DB_SETF_REGS }, - { "t4", (long *)&ddb_regs.f_regs[T4], DB_SETF_REGS }, - { "t5", (long *)&ddb_regs.f_regs[T5], DB_SETF_REGS }, - { "t6", (long *)&ddb_regs.f_regs[T6], DB_SETF_REGS }, - { "t7", (long *)&ddb_regs.f_regs[T7], DB_SETF_REGS }, + { "t0", (long *)&ddb_regs.f_regs[_R_T0], DB_SETF_REGS }, + { "t1", (long *)&ddb_regs.f_regs[_R_T1], DB_SETF_REGS }, + { "t2", (long *)&ddb_regs.f_regs[_R_T2], DB_SETF_REGS }, + { "t3", (long *)&ddb_regs.f_regs[_R_T3], DB_SETF_REGS }, + { "t4", (long *)&ddb_regs.f_regs[_R_T4], DB_SETF_REGS }, + { "t5", (long *)&ddb_regs.f_regs[_R_T5], DB_SETF_REGS }, + { "t6", (long *)&ddb_regs.f_regs[_R_T6], DB_SETF_REGS }, + { "t7", (long *)&ddb_regs.f_regs[_R_T7], DB_SETF_REGS }, #endif /* __mips_n32 || __mips_n64 */ - { "s0", (long *)&ddb_regs.f_regs[S0], DB_SETF_REGS }, - { "s1", (long *)&ddb_regs.f_regs[S1], DB_SETF_REGS }, - { "s2", (long *)&ddb_regs.f_regs[S2], DB_SETF_REGS }, - { "s3", (long *)&ddb_regs.f_regs[S3], DB_SETF_REGS }, - { "s4", (long *)&ddb_regs.f_regs[S4], DB_SETF_REGS }, - { "s5", (long *)&ddb_regs.f_regs[S5], DB_SETF_REGS }, - { "s6", (long *)&ddb_regs.f_regs[S6], DB_SETF_REGS }, - { "s7", (long *)&ddb_regs.f_regs[S7], DB_SETF_REGS }, - { "t8", (long *)&ddb_regs.f_regs[T8], DB_SETF_REGS }, - { "t9", (long *)&ddb_regs.f_regs[T9], DB_SETF_REGS }, - { "k0", (long *)&ddb_regs.f_regs[K0], DB_SETF_REGS }, - { "k1", (long *)&ddb_regs.f_regs[K1], DB_SETF_REGS }, - { "gp", (long *)&ddb_regs.f_regs[GP], DB_SETF_REGS }, - { "sp", (long *)&ddb_regs.f_regs[SP], DB_SETF_REGS }, - { "fp", (long *)&ddb_regs.f_regs[S8], DB_SETF_REGS }, /* frame ptr */ - { "ra", (long *)&ddb_regs.f_regs[RA], DB_SETF_REGS }, - { "sr", (long *)&ddb_regs.f_regs[SR], DB_SETF_REGS }, - { "mdlo",(long *)&ddb_regs.f_regs[MULLO], DB_SETF_REGS }, - { "mdhi",(long *)&ddb_regs.f_regs[MULHI], DB_SETF_REGS }, - { "bad", (long *)&ddb_regs.f_regs[BADVADDR], DB_SETF_REGS }, - { "cs", (long *)&ddb_regs.f_regs[CAUSE], DB_SETF_REGS }, - { "pc", (long *)&ddb_regs.f_regs[PC], DB_SETF_REGS }, + { "s0", (long *)&ddb_regs.f_regs[_R_S0], DB_SETF_REGS }, + { "s1", (long *)&ddb_regs.f_regs[_R_S1], DB_SETF_REGS }, + { "s2", (long *)&ddb_regs.f_regs[_R_S2], DB_SETF_REGS }, + { "s3", (long *)&ddb_regs.f_regs[_R_S3], DB_SETF_REGS }, + { "s4", (long *)&ddb_regs.f_regs[_R_S4], DB_SETF_REGS }, + { "s5", (long *)&ddb_regs.f_regs[_R_S5], DB_SETF_REGS }, + { "s6", (long *)&ddb_regs.f_regs[_R_S6], DB_SETF_REGS }, + { "s7", (long *)&ddb_regs.f_regs[_R_S7], DB_SETF_REGS }, + { "t8", (long *)&ddb_regs.f_regs[_R_T8], DB_SETF_REGS }, + { "t9", (long *)&ddb_regs.f_regs[_R_T9], DB_SETF_REGS }, + { "k0", (long *)&ddb_regs.f_regs[_R_K0], DB_SETF_REGS }, + { "k1", (long *)&ddb_regs.f_regs[_R_K1], DB_SETF_REGS }, + { "gp", (long *)&ddb_regs.f_regs[_R_GP], DB_SETF_REGS }, + { "sp", (long *)&ddb_regs.f_regs[_R_SP], DB_SETF_REGS }, + { "fp", (long *)&ddb_regs.f_regs[_R_S8], DB_SETF_REGS },/* frame ptr */ + { "ra", (long *)&ddb_regs.f_regs[_R_RA], DB_SETF_REGS }, + { "sr", (long *)&ddb_regs.f_regs[_R_SR], DB_SETF_REGS }, + { "mdlo",(long *)&ddb_regs.f_regs[_R_MULLO], DB_SETF_REGS }, + { "mdhi",(long *)&ddb_regs.f_regs[_R_MULHI], DB_SETF_REGS }, + { "bad", (long *)&ddb_regs.f_regs[_R_BADVADDR], DB_SETF_REGS }, + { "cs", (long *)&ddb_regs.f_regs[_R_CAUSE], DB_SETF_REGS }, + { "pc", (long *)&ddb_regs.f_regs[_R_PC], DB_SETF_REGS }, }; const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); @@ -142,13 +142,15 @@ db_stack_trace_print(db_expr_t addr, boolean_t have_addr, db_expr_t count, struct lwp *l; if (!have_addr) { - stacktrace_subr(ddb_regs.f_regs[A0], ddb_regs.f_regs[A1], - ddb_regs.f_regs[A2], ddb_regs.f_regs[A3], - ddb_regs.f_regs[PC], - ddb_regs.f_regs[SP], + stacktrace_subr(ddb_regs.f_regs[_R_A0], + ddb_regs.f_regs[_R_A1], + ddb_regs.f_regs[_R_A2], + ddb_regs.f_regs[_R_A3], + ddb_regs.f_regs[_R_PC], + ddb_regs.f_regs[_R_SP], /* non-virtual frame pointer */ - ddb_regs.f_regs[S8], - ddb_regs.f_regs[RA], + ddb_regs.f_regs[_R_S8], + ddb_regs.f_regs[_R_RA], pr); return; } @@ -190,9 +192,9 @@ db_stack_trace_print(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *name; extern char verylocore[]; - pc = ddb_regs.f_regs[PC]; - sp = ddb_regs.f_regs[SP]; - ra = ddb_regs.f_regs[RA]; + pc = ddb_regs.f_regs[_R_PC]; + sp = ddb_regs.f_regs[_R_SP]; + ra = ddb_regs.f_regs[_R_RA]; do { va = pc; do { @@ -211,12 +213,12 @@ db_stack_trace_print(db_expr_t addr, boolean_t have_addr, db_expr_t count, do { i.word = *(int *)va; if (i.IType.op == OP_SW - && i.IType.rs == SP - && i.IType.rt == RA) + && i.IType.rs == _R_SP + && i.IType.rt == _R_RA) ra = *(int *)(sp + (short)i.IType.imm); if (i.IType.op == OP_ADDIU - && i.IType.rs == SP - && i.IType.rt == SP) + && i.IType.rs == _R_SP + && i.IType.rt == _R_SP) stacksize = -(short)i.IType.imm; va += sizeof(int); } while (va < pc); diff --git a/sys/arch/mips/mips/genassym.cf b/sys/arch/mips/mips/genassym.cf index 0539ae0db8fd..488f2f467b34 100644 --- a/sys/arch/mips/mips/genassym.cf +++ b/sys/arch/mips/mips/genassym.cf @@ -1,4 +1,4 @@ -# $NetBSD: genassym.cf,v 1.36 2003/11/04 10:33:15 dsl Exp $ +# $NetBSD: genassym.cf,v 1.37 2003/11/26 08:36:49 he Exp $ # # Copyright (c) 1997 # Jonathan Stone. All rights reserved. @@ -109,57 +109,57 @@ define MIPS3_PG_ASID MIPS3_PG_ASID define MIPS3_PG_ODDPG MIPS3_PG_ODDPG define FRAME_SIZ sizeof(struct frame) -define FRAME_ZERO offsetof(struct frame, f_regs[ZERO]) -define FRAME_AST offsetof(struct frame, f_regs[AST]) -define FRAME_V0 offsetof(struct frame, f_regs[V0]) -define FRAME_V1 offsetof(struct frame, f_regs[V1]) -define FRAME_A0 offsetof(struct frame, f_regs[A0]) -define FRAME_A1 offsetof(struct frame, f_regs[A1]) -define FRAME_A2 offsetof(struct frame, f_regs[A2]) -define FRAME_A3 offsetof(struct frame, f_regs[A3]) -define FRAME_T0 offsetof(struct frame, f_regs[T0]) -define FRAME_T1 offsetof(struct frame, f_regs[T1]) -define FRAME_T2 offsetof(struct frame, f_regs[T2]) -define FRAME_T3 offsetof(struct frame, f_regs[T3]) +define FRAME_ZERO offsetof(struct frame, f_regs[_R_ZERO]) +define FRAME_AST offsetof(struct frame, f_regs[_R_AST]) +define FRAME_V0 offsetof(struct frame, f_regs[_R_V0]) +define FRAME_V1 offsetof(struct frame, f_regs[_R_V1]) +define FRAME_A0 offsetof(struct frame, f_regs[_R_A0]) +define FRAME_A1 offsetof(struct frame, f_regs[_R_A1]) +define FRAME_A2 offsetof(struct frame, f_regs[_R_A2]) +define FRAME_A3 offsetof(struct frame, f_regs[_R_A3]) +define FRAME_T0 offsetof(struct frame, f_regs[_R_T0]) +define FRAME_T1 offsetof(struct frame, f_regs[_R_T1]) +define FRAME_T2 offsetof(struct frame, f_regs[_R_T2]) +define FRAME_T3 offsetof(struct frame, f_regs[_R_T3]) # For old-ABI, these are T4-T7. For new-ABI, these are A4-A7. # Use these in code shared by 32-bit and 64-bit processors. -define FRAME_TA0 offsetof(struct frame, f_regs[TA0]) -define FRAME_TA1 offsetof(struct frame, f_regs[TA1]) -define FRAME_TA2 offsetof(struct frame, f_regs[TA2]) -define FRAME_TA3 offsetof(struct frame, f_regs[TA3]) +define FRAME_TA0 offsetof(struct frame, f_regs[_R_TA0]) +define FRAME_TA1 offsetof(struct frame, f_regs[_R_TA1]) +define FRAME_TA2 offsetof(struct frame, f_regs[_R_TA2]) +define FRAME_TA3 offsetof(struct frame, f_regs[_R_TA3]) if !defined(__mips_n32) && !defined(__mips_n64) # Use these only in code used by 32-bit processors (which cannot # use new-ABI). -define FRAME_T4 offsetof(struct frame, f_regs[T4]) -define FRAME_T5 offsetof(struct frame, f_regs[T5]) -define FRAME_T6 offsetof(struct frame, f_regs[T6]) -define FRAME_T7 offsetof(struct frame, f_regs[T7]) +define FRAME_T4 offsetof(struct frame, f_regs[_R_T4]) +define FRAME_T5 offsetof(struct frame, f_regs[_R_T5]) +define FRAME_T6 offsetof(struct frame, f_regs[_R_T6]) +define FRAME_T7 offsetof(struct frame, f_regs[_R_T7]) endif -define FRAME_S0 offsetof(struct frame, f_regs[S0]) -define FRAME_S1 offsetof(struct frame, f_regs[S1]) -define FRAME_S2 offsetof(struct frame, f_regs[S2]) -define FRAME_S3 offsetof(struct frame, f_regs[S3]) -define FRAME_S4 offsetof(struct frame, f_regs[S4]) -define FRAME_S5 offsetof(struct frame, f_regs[S5]) -define FRAME_S6 offsetof(struct frame, f_regs[S6]) -define FRAME_S7 offsetof(struct frame, f_regs[S7]) -define FRAME_T8 offsetof(struct frame, f_regs[T8]) -define FRAME_T9 offsetof(struct frame, f_regs[T9]) -define FRAME_K0 offsetof(struct frame, f_regs[K0]) -define FRAME_K1 offsetof(struct frame, f_regs[K1]) -define FRAME_GP offsetof(struct frame, f_regs[GP]) -define FRAME_SP offsetof(struct frame, f_regs[SP]) -define FRAME_S8 offsetof(struct frame, f_regs[S8]) -define FRAME_RA offsetof(struct frame, f_regs[RA]) -define FRAME_SR offsetof(struct frame, f_regs[SR]) -define FRAME_MULLO offsetof(struct frame, f_regs[MULLO]) -define FRAME_MULHI offsetof(struct frame, f_regs[MULHI]) -define FRAME_BADVADDR offsetof(struct frame, f_regs[BADVADDR]) -define FRAME_CAUSE offsetof(struct frame, f_regs[CAUSE]) -define FRAME_EPC offsetof(struct frame, f_regs[PC]) +define FRAME_S0 offsetof(struct frame, f_regs[_R_S0]) +define FRAME_S1 offsetof(struct frame, f_regs[_R_S1]) +define FRAME_S2 offsetof(struct frame, f_regs[_R_S2]) +define FRAME_S3 offsetof(struct frame, f_regs[_R_S3]) +define FRAME_S4 offsetof(struct frame, f_regs[_R_S4]) +define FRAME_S5 offsetof(struct frame, f_regs[_R_S5]) +define FRAME_S6 offsetof(struct frame, f_regs[_R_S6]) +define FRAME_S7 offsetof(struct frame, f_regs[_R_S7]) +define FRAME_T8 offsetof(struct frame, f_regs[_R_T8]) +define FRAME_T9 offsetof(struct frame, f_regs[_R_T9]) +define FRAME_K0 offsetof(struct frame, f_regs[_R_K0]) +define FRAME_K1 offsetof(struct frame, f_regs[_R_K1]) +define FRAME_GP offsetof(struct frame, f_regs[_R_GP]) +define FRAME_SP offsetof(struct frame, f_regs[_R_SP]) +define FRAME_S8 offsetof(struct frame, f_regs[_R_S8]) +define FRAME_RA offsetof(struct frame, f_regs[_R_RA]) +define FRAME_SR offsetof(struct frame, f_regs[_R_SR]) +define FRAME_MULLO offsetof(struct frame, f_regs[_R_MULLO]) +define FRAME_MULHI offsetof(struct frame, f_regs[_R_MULHI]) +define FRAME_BADVADDR offsetof(struct frame, f_regs[_R_BADVADDR]) +define FRAME_CAUSE offsetof(struct frame, f_regs[_R_CAUSE]) +define FRAME_EPC offsetof(struct frame, f_regs[_R_PC]) define FRAME_PPL offsetof(struct frame, f_ppl) define FRAME_FSR sizeof(mips_fpreg_t) * 32 diff --git a/sys/arch/mips/mips/kgdb_machdep.c b/sys/arch/mips/mips/kgdb_machdep.c index 92b4555934e5..71679fa9c0ce 100644 --- a/sys/arch/mips/mips/kgdb_machdep.c +++ b/sys/arch/mips/mips/kgdb_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: kgdb_machdep.c,v 1.7 2003/07/15 02:43:38 lukem Exp $ */ +/* $NetBSD: kgdb_machdep.c,v 1.8 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -68,7 +68,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.7 2003/07/15 02:43:38 lukem Exp $"); +__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.8 2003/11/26 08:36:49 he Exp $"); #include "opt_ddb.h" @@ -208,41 +208,41 @@ kgdb_getregs(regs, gdb_regs) struct frame *f = (struct frame *)regs; memset(gdb_regs, 0, KGDB_NUMREGS * sizeof(kgdb_reg_t)); - gdb_regs[ 1] = f->f_regs[AST]; /* AT */ - gdb_regs[ 2] = f->f_regs[V0]; /* V0 */ - gdb_regs[ 3] = f->f_regs[V1]; /* V1 */ - gdb_regs[ 4] = f->f_regs[A0]; /* A0 */ - gdb_regs[ 5] = f->f_regs[A1]; /* A1 */ - gdb_regs[ 6] = f->f_regs[A2]; /* A2 */ - gdb_regs[ 7] = f->f_regs[A3]; /* A3 */ - gdb_regs[ 8] = f->f_regs[T0]; /* T0 */ - gdb_regs[ 9] = f->f_regs[T1]; /* T1 */ - gdb_regs[10] = f->f_regs[T2]; /* T2 */ - gdb_regs[11] = f->f_regs[T3]; /* T3 */ - gdb_regs[12] = f->f_regs[T4]; /* T4 */ - gdb_regs[13] = f->f_regs[T5]; /* T5 */ - gdb_regs[14] = f->f_regs[T6]; /* T6 */ - gdb_regs[15] = f->f_regs[T7]; /* T7 */ - gdb_regs[16] = f->f_regs[S0]; /* S0 */ - gdb_regs[17] = f->f_regs[S1]; /* S1 */ - gdb_regs[18] = f->f_regs[S2]; /* S2 */ - gdb_regs[19] = f->f_regs[S3]; /* S3 */ - gdb_regs[20] = f->f_regs[S4]; /* S4 */ - gdb_regs[21] = f->f_regs[S5]; /* S5 */ - gdb_regs[22] = f->f_regs[S6]; /* S6 */ - gdb_regs[23] = f->f_regs[S7]; /* S7 */ - gdb_regs[24] = f->f_regs[T8]; /* T8 */ - gdb_regs[25] = f->f_regs[T9]; /* T9 */ - gdb_regs[28] = f->f_regs[GP]; /* GP */ - gdb_regs[29] = f->f_regs[SP]; /* SP */ - gdb_regs[30] = f->f_regs[S8]; /* S8 */ - gdb_regs[31] = f->f_regs[RA]; /* RA */ - gdb_regs[32] = f->f_regs[SR]; /* SR */ - gdb_regs[33] = f->f_regs[MULLO]; /* MULLO */ - gdb_regs[34] = f->f_regs[MULHI]; /* MULHI */ - gdb_regs[35] = kgdb_vaddr; /* BAD VADDR */ - gdb_regs[36] = kgdb_cause; /* CAUSE */ - gdb_regs[37] = f->f_regs[PC]; /* PC */ + gdb_regs[ 1] = f->f_regs[_R_AST]; /* AT */ + gdb_regs[ 2] = f->f_regs[_R_V0]; /* V0 */ + gdb_regs[ 3] = f->f_regs[_R_V1]; /* V1 */ + gdb_regs[ 4] = f->f_regs[_R_A0]; /* A0 */ + gdb_regs[ 5] = f->f_regs[_R_A1]; /* A1 */ + gdb_regs[ 6] = f->f_regs[_R_A2]; /* A2 */ + gdb_regs[ 7] = f->f_regs[_R_A3]; /* A3 */ + gdb_regs[ 8] = f->f_regs[_R_T0]; /* T0 */ + gdb_regs[ 9] = f->f_regs[_R_T1]; /* T1 */ + gdb_regs[10] = f->f_regs[_R_T2]; /* T2 */ + gdb_regs[11] = f->f_regs[_R_T3]; /* T3 */ + gdb_regs[12] = f->f_regs[_R_T4]; /* T4 */ + gdb_regs[13] = f->f_regs[_R_T5]; /* T5 */ + gdb_regs[14] = f->f_regs[_R_T6]; /* T6 */ + gdb_regs[15] = f->f_regs[_R_T7]; /* T7 */ + gdb_regs[16] = f->f_regs[_R_S0]; /* S0 */ + gdb_regs[17] = f->f_regs[_R_S1]; /* S1 */ + gdb_regs[18] = f->f_regs[_R_S2]; /* S2 */ + gdb_regs[19] = f->f_regs[_R_S3]; /* S3 */ + gdb_regs[20] = f->f_regs[_R_S4]; /* S4 */ + gdb_regs[21] = f->f_regs[_R_S5]; /* S5 */ + gdb_regs[22] = f->f_regs[_R_S6]; /* S6 */ + gdb_regs[23] = f->f_regs[_R_S7]; /* S7 */ + gdb_regs[24] = f->f_regs[_R_T8]; /* T8 */ + gdb_regs[25] = f->f_regs[_R_T9]; /* T9 */ + gdb_regs[28] = f->f_regs[_R_GP]; /* GP */ + gdb_regs[29] = f->f_regs[_R_SP]; /* SP */ + gdb_regs[30] = f->f_regs[_R_S8]; /* S8 */ + gdb_regs[31] = f->f_regs[_R_RA]; /* RA */ + gdb_regs[32] = f->f_regs[_R_SR]; /* SR */ + gdb_regs[33] = f->f_regs[_R_MULLO]; /* MULLO */ + gdb_regs[34] = f->f_regs[_R_MULHI]; /* MULHI */ + gdb_regs[35] = kgdb_vaddr; /* BAD VADDR */ + gdb_regs[36] = kgdb_cause; /* CAUSE */ + gdb_regs[37] = f->f_regs[_R_PC]; /* PC */ } /* @@ -255,7 +255,7 @@ kgdb_setregs(regs, gdb_regs) { struct frame *f = (struct frame *)regs; - f->f_regs[PC] = gdb_regs[37]; /* PC */ + f->f_regs[_R_PC] = gdb_regs[37]; /* PC */ } /* diff --git a/sys/arch/mips/mips/mips_emul.c b/sys/arch/mips/mips/mips_emul.c index c699c00cd132..674ec542a1a1 100644 --- a/sys/arch/mips/mips/mips_emul.c +++ b/sys/arch/mips/mips/mips_emul.c @@ -1,4 +1,4 @@ -/* $NetBSD: mips_emul.c,v 1.8 2003/10/29 23:39:45 christos Exp $ */ +/* $NetBSD: mips_emul.c,v 1.9 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1999 Shuichiro URATA. All rights reserved. @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.8 2003/10/29 23:39:45 christos Exp $"); +__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.9 2003/11/26 08:36:49 he Exp $"); #include #include @@ -251,8 +251,8 @@ MachEmulateInst(status, cause, opc, frame) break; #endif default: - frame->f_regs[CAUSE] = cause; - frame->f_regs[BADVADDR] = opc; + frame->f_regs[_R_CAUSE] = cause; + frame->f_regs[_R_BADVADDR] = opc; KSI_INIT_TRAP(&ksi); ksi.ksi_signo = SIGSEGV; ksi.ksi_trap = cause; /* XXX */ @@ -274,8 +274,8 @@ send_sigsegv(u_int32_t vaddr, u_int32_t exccode, struct frame *frame, { ksiginfo_t ksi; cause = (cause & 0xFFFFFF00) | (exccode << MIPS_CR_EXC_CODE_SHIFT); - frame->f_regs[CAUSE] = cause; - frame->f_regs[BADVADDR] = vaddr; + frame->f_regs[_R_CAUSE] = cause; + frame->f_regs[_R_BADVADDR] = vaddr; KSI_INIT_TRAP(&ksi); ksi.ksi_signo = SIGSEGV; ksi.ksi_trap = cause; @@ -293,10 +293,11 @@ update_pc(struct frame *frame, u_int32_t cause) { if (cause & MIPS_CR_BR_DELAY) - frame->f_regs[PC] = MachEmulateBranch(frame, frame->f_regs[PC], - PCB_FSR(curpcb), 0); + frame->f_regs[_R_PC] = + MachEmulateBranch(frame, frame->f_regs[_R_PC], + PCB_FSR(curpcb), 0); else - frame->f_regs[PC] += 4; + frame->f_regs[_R_PC] += 4; } /* @@ -315,8 +316,8 @@ MachEmulateLWC0(u_int32_t inst, struct frame *frame, u_int32_t cause) /* segment and alignment check */ if (vaddr > VM_MAX_ADDRESS || vaddr & 0x3) { ksiginfo_t ksi; - frame->f_regs[CAUSE] = cause; - frame->f_regs[BADVADDR] = vaddr; + frame->f_regs[_R_CAUSE] = cause; + frame->f_regs[_R_BADVADDR] = vaddr; KSI_INIT_TRAP(&ksi); ksi.ksi_signo = SIGBUS; ksi.ksi_trap = cause; @@ -361,8 +362,8 @@ MachEmulateSWC0(u_int32_t inst, struct frame *frame, u_int32_t cause) /* segment and alignment check */ if (vaddr > VM_MAX_ADDRESS || vaddr & 0x3) { ksiginfo_t ksi; - frame->f_regs[CAUSE] = cause; - frame->f_regs[BADVADDR] = vaddr; + frame->f_regs[_R_CAUSE] = cause; + frame->f_regs[_R_BADVADDR] = vaddr; KSI_INIT_TRAP(&ksi); ksi.ksi_signo = SIGBUS; ksi.ksi_trap = cause; @@ -420,13 +421,13 @@ MachEmulateSpecial(u_int32_t inst, struct frame *frame, u_int32_t cause) /* nothing */ break; default: - frame->f_regs[CAUSE] = cause; - frame->f_regs[BADVADDR] = frame->f_regs[PC]; + frame->f_regs[_R_CAUSE] = cause; + frame->f_regs[_R_BADVADDR] = frame->f_regs[_R_PC]; KSI_INIT_TRAP(&ksi); ksi.ksi_signo = SIGSEGV; ksi.ksi_trap = cause; ksi.ksi_code = SEGV_MAPERR; - ksi.ksi_addr = (void *)frame->f_regs[PC]; + ksi.ksi_addr = (void *)frame->f_regs[_R_PC]; #ifdef __HAVE_SIGINFO (*curproc->p_emul->e_trapsignal)(curlwp, &ksi); #else @@ -468,17 +469,17 @@ MachEmulateLWC1(u_int32_t inst, struct frame *frame, u_int32_t cause) return; } - pc = frame->f_regs[PC]; + pc = frame->f_regs[_R_PC]; update_pc(frame, cause); if (cause & MIPS_CR_BR_DELAY) return; for (i = 1; i < LWSWC1_MAXLOOP; i++) { - if (mips_btop(frame->f_regs[PC]) != mips_btop(pc)) + if (mips_btop(frame->f_regs[_R_PC]) != mips_btop(pc)) return; - vaddr = frame->f_regs[PC]; /* XXX truncates to 32 bits */ + vaddr = frame->f_regs[_R_PC]; /* XXX truncates to 32 bits */ inst = fuiword((u_int32_t *)vaddr); if (((InstFmt)inst).FRType.op != OP_LWC1) return; @@ -499,7 +500,7 @@ MachEmulateLWC1(u_int32_t inst, struct frame *frame, u_int32_t cause) return; } - pc = frame->f_regs[PC]; + pc = frame->f_regs[_R_PC]; update_pc(frame, cause); } } @@ -555,17 +556,17 @@ MachEmulateSWC1(u_int32_t inst, struct frame *frame, u_int32_t cause) return; } - pc = frame->f_regs[PC]; + pc = frame->f_regs[_R_PC]; update_pc(frame, cause); if (cause & MIPS_CR_BR_DELAY) return; for (i = 1; i < LWSWC1_MAXLOOP; i++) { - if (mips_btop(frame->f_regs[PC]) != mips_btop(pc)) + if (mips_btop(frame->f_regs[_R_PC]) != mips_btop(pc)) return; - vaddr = frame->f_regs[PC]; /* XXX truncates to 32 bits */ + vaddr = frame->f_regs[_R_PC]; /* XXX truncates to 32 bits */ inst = fuiword((u_int32_t *)vaddr); if (((InstFmt)inst).FRType.op != OP_SWC1) return; @@ -586,7 +587,7 @@ MachEmulateSWC1(u_int32_t inst, struct frame *frame, u_int32_t cause) return; } - pc = frame->f_regs[PC]; + pc = frame->f_regs[_R_PC]; update_pc(frame, cause); } } diff --git a/sys/arch/mips/mips/mips_machdep.c b/sys/arch/mips/mips/mips_machdep.c index 23142c3bcc25..795b084f8d48 100644 --- a/sys/arch/mips/mips/mips_machdep.c +++ b/sys/arch/mips/mips/mips_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: mips_machdep.c,v 1.168 2003/10/30 00:26:54 christos Exp $ */ +/* $NetBSD: mips_machdep.c,v 1.169 2003/11/26 08:36:49 he Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -119,7 +119,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.168 2003/10/30 00:26:54 christos Exp $"); +__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.169 2003/11/26 08:36:49 he Exp $"); #include "opt_cputype.h" @@ -1090,10 +1090,10 @@ setregs(l, pack, stack) struct frame *f = (struct frame *)l->l_md.md_regs; memset(f, 0, sizeof(struct frame)); - f->f_regs[SP] = (int)stack; - f->f_regs[PC] = (int)pack->ep_entry & ~3; - f->f_regs[T9] = (int)pack->ep_entry & ~3; /* abicall requirement */ - f->f_regs[SR] = PSL_USERSET; + f->f_regs[_R_SP] = (int)stack; + f->f_regs[_R_PC] = (int)pack->ep_entry & ~3; + f->f_regs[_R_T9] = (int)pack->ep_entry & ~3; /* abicall requirement */ + f->f_regs[_R_SR] = PSL_USERSET; /* * Set up arguments for _start(): * _start(stack, obj, cleanup, ps_strings); @@ -1103,10 +1103,10 @@ setregs(l, pack, stack) * vectors. They are fixed up by ld.elf_so. * - ps_strings is a NetBSD extension. */ - f->f_regs[A0] = (int)stack; - f->f_regs[A1] = 0; - f->f_regs[A2] = 0; - f->f_regs[A3] = (int)l->l_proc->p_psstr; + f->f_regs[_R_A0] = (int)stack; + f->f_regs[_R_A1] = 0; + f->f_regs[_R_A2] = 0; + f->f_regs[_R_A3] = (int)l->l_proc->p_psstr; if ((l->l_md.md_flags & MDP_FPUSED) && l == fpcurlwp) fpcurlwp = (struct lwp *)0; @@ -1488,7 +1488,7 @@ savefpregs(l) * this process yielded FPA. */ f = (struct frame *)l->l_md.md_regs; - f->f_regs[SR] &= ~MIPS_SR_COP_1_BIT; + f->f_regs[_R_SR] &= ~MIPS_SR_COP_1_BIT; /* * save FPCSR and 32bit FP register values. @@ -1672,15 +1672,15 @@ cpu_upcall(struct lwp *l, int type, int nevents, int ninterrupted, /* NOTREACHED */ } - f->f_regs[PC] = (u_int32_t)upcall; - f->f_regs[SP] = (u_int32_t)sf; - f->f_regs[A0] = type; - f->f_regs[A1] = (u_int32_t)sas; - f->f_regs[A2] = nevents; - f->f_regs[A3] = ninterrupted; - f->f_regs[S8] = 0; - f->f_regs[RA] = 0; - f->f_regs[T9] = (u_int32_t)upcall; /* t9=Upcall function*/ + f->f_regs[_R_PC] = (u_int32_t)upcall; + f->f_regs[_R_SP] = (u_int32_t)sf; + f->f_regs[_R_A0] = type; + f->f_regs[_R_A1] = (u_int32_t)sas; + f->f_regs[_R_A2] = nevents; + f->f_regs[_R_A3] = ninterrupted; + f->f_regs[_R_S8] = 0; + f->f_regs[_R_RA] = 0; + f->f_regs[_R_T9] = (u_int32_t)upcall; /* t9=Upcall function*/ } @@ -1695,13 +1695,13 @@ cpu_getmcontext(l, mcp, flags) __greg_t ras_pc; /* Save register context. Dont copy R0 - it is always 0 */ - memcpy(&gr[_REG_AT], &f->f_regs[AST], sizeof(mips_reg_t) * 31); + memcpy(&gr[_REG_AT], &f->f_regs[_R_AST], sizeof(mips_reg_t) * 31); - gr[_REG_MDLO] = f->f_regs[MULLO]; - gr[_REG_MDHI] = f->f_regs[MULHI]; - gr[_REG_CAUSE] = f->f_regs[CAUSE]; - gr[_REG_EPC] = f->f_regs[PC]; - gr[_REG_SR] = f->f_regs[SR]; + gr[_REG_MDLO] = f->f_regs[_R_MULLO]; + gr[_REG_MDHI] = f->f_regs[_R_MULHI]; + gr[_REG_CAUSE] = f->f_regs[_R_CAUSE]; + gr[_REG_EPC] = f->f_regs[_R_PC]; + gr[_REG_SR] = f->f_regs[_R_SR]; if ((ras_pc = (__greg_t)ras_lookup(l->l_proc, (caddr_t) gr[_REG_EPC])) != -1) @@ -1737,12 +1737,13 @@ cpu_setmcontext(l, mcp, flags) if (flags & _UC_CPU) { /* Save register context. */ /* XXX: Do we validate the addresses?? */ - memcpy(&f->f_regs[AST], &gr[_REG_AT], sizeof(mips_reg_t) * 31); + memcpy(&f->f_regs[_R_AST], &gr[_REG_AT], + sizeof(mips_reg_t) * 31); - f->f_regs[MULLO] = gr[_REG_MDLO]; - f->f_regs[MULHI] = gr[_REG_MDHI]; - f->f_regs[CAUSE] = gr[_REG_CAUSE]; - f->f_regs[PC] = gr[_REG_EPC]; + f->f_regs[_R_MULLO] = gr[_REG_MDLO]; + f->f_regs[_R_MULHI] = gr[_REG_MDHI]; + f->f_regs[_R_CAUSE] = gr[_REG_CAUSE]; + f->f_regs[_R_PC] = gr[_REG_EPC]; /* Do not restore SR. */ } diff --git a/sys/arch/mips/mips/process_machdep.c b/sys/arch/mips/mips/process_machdep.c index cdc78f7db646..31bc95a67bb4 100644 --- a/sys/arch/mips/mips/process_machdep.c +++ b/sys/arch/mips/mips/process_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: process_machdep.c,v 1.23 2003/08/07 16:28:33 agc Exp $ */ +/* $NetBSD: process_machdep.c,v 1.24 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1993 The Regents of the University of California. @@ -76,7 +76,7 @@ */ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.23 2003/08/07 16:28:33 agc Exp $"); +__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.24 2003/11/26 08:36:49 he Exp $"); /* * This file may seem a bit stylized, but that so that it's easier to port. @@ -123,9 +123,9 @@ process_write_regs(struct lwp *l, struct reg *regs) mips_reg_t sr; f = (struct frame *) l->l_md.md_regs; - sr = f->f_regs[SR]; + sr = f->f_regs[_R_SR]; memcpy(l->l_md.md_regs, regs, sizeof(struct reg)); - f->f_regs[SR] = sr; + f->f_regs[_R_SR] = sr; return 0; } @@ -164,6 +164,6 @@ int process_set_pc(struct lwp *l, caddr_t addr) { - ((struct frame *)l->l_md.md_regs)->f_regs[PC] = (int)addr; + ((struct frame *)l->l_md.md_regs)->f_regs[_R_PC] = (int)addr; return 0; } diff --git a/sys/arch/mips/mips/sig_machdep.c b/sys/arch/mips/mips/sig_machdep.c index 6dd0061e9376..7169a9e38e0e 100644 --- a/sys/arch/mips/mips/sig_machdep.c +++ b/sys/arch/mips/mips/sig_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: sig_machdep.c,v 1.8 2003/11/02 08:29:06 simonb Exp $ */ +/* $NetBSD: sig_machdep.c,v 1.9 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 2003 The NetBSD Foundation, Inc. @@ -38,7 +38,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.8 2003/11/02 08:29:06 simonb Exp $"); +__KERNEL_RCSID(0, "$NetBSD: sig_machdep.c,v 1.9 2003/11/26 08:36:49 he Exp $"); #include "opt_cputype.h" #include "opt_compat_netbsd.h" @@ -72,7 +72,7 @@ getframe(struct lwp *l, int sig, int *onstack) if (*onstack) return (char *)ctx->ps_sigstk.ss_sp + ctx->ps_sigstk.ss_size; else - return (void *)fp->f_regs[SP]; + return (void *)fp->f_regs[_R_SP]; } struct sigframe_siginfo { @@ -136,14 +136,14 @@ sendsig_siginfo(const ksiginfo_t *ksi, const sigset_t *mask) * handler. The return address will be set up to point * to the signal trampoline to bounce us back. */ - tf->f_regs[A0] = sig; - tf->f_regs[A1] = (__greg_t)&fp->sf_si; - tf->f_regs[A2] = (__greg_t)&fp->sf_uc; + tf->f_regs[_R_A0] = sig; + tf->f_regs[_R_A1] = (__greg_t)&fp->sf_si; + tf->f_regs[_R_A2] = (__greg_t)&fp->sf_uc; - tf->f_regs[PC] = (__greg_t)catcher; - tf->f_regs[T9] = (__greg_t)catcher; - tf->f_regs[SP] = (__greg_t)fp; - tf->f_regs[RA] = (__greg_t)ps->sa_sigdesc[sig].sd_tramp; + tf->f_regs[_R_PC] = (__greg_t)catcher; + tf->f_regs[_R_T9] = (__greg_t)catcher; + tf->f_regs[_R_SP] = (__greg_t)fp; + tf->f_regs[_R_RA] = (__greg_t)ps->sa_sigdesc[sig].sd_tramp; /* Remember that we're now on the signal stack. */ if (onstack) diff --git a/sys/arch/mips/mips/syscall.c b/sys/arch/mips/mips/syscall.c index a4302d816599..4286225e9863 100644 --- a/sys/arch/mips/mips/syscall.c +++ b/sys/arch/mips/mips/syscall.c @@ -1,4 +1,4 @@ -/* $NetBSD: syscall.c,v 1.20 2003/10/31 03:28:13 simonb Exp $ */ +/* $NetBSD: syscall.c,v 1.21 2003/11/26 08:36:49 he Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -114,7 +114,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.20 2003/10/31 03:28:13 simonb Exp $"); +__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.21 2003/11/26 08:36:49 he Exp $"); #if defined(_KERNEL_OPT) #include "opt_ktrace.h" @@ -208,12 +208,12 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) uvmexp.syscalls++; if (DELAYBRANCH(cause)) - frame->f_regs[PC] = MachEmulateBranch(frame, opc, 0, 0); + frame->f_regs[_R_PC] = MachEmulateBranch(frame, opc, 0, 0); else - frame->f_regs[PC] = opc + sizeof(int); + frame->f_regs[_R_PC] = opc + sizeof(int); callp = p->p_emul->e_sysent; - ov0 = code = frame->f_regs[V0] - SYSCALL_SHIFT; + ov0 = code = frame->f_regs[_R_V0] - SYSCALL_SHIFT; switch (code) { case SYS_syscall: @@ -223,20 +223,20 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) /* * Code is first argument, followed by actual args. */ - code = frame->f_regs[A0] - SYSCALL_SHIFT; - args[0] = frame->f_regs[A1]; - args[1] = frame->f_regs[A2]; - args[2] = frame->f_regs[A3]; + code = frame->f_regs[_R_A0] - SYSCALL_SHIFT; + args[0] = frame->f_regs[_R_A1]; + args[1] = frame->f_regs[_R_A2]; + args[2] = frame->f_regs[_R_A3]; nsaved = 3; } else { /* * Like syscall, but code is a quad, so as to maintain * quad alignment for the rest of the arguments. */ - code = frame->f_regs[A0 + _QUAD_LOWWORD] + code = frame->f_regs[_R_A0 + _QUAD_LOWWORD] - SYSCALL_SHIFT; - args[0] = frame->f_regs[A2]; - args[1] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A2]; + args[1] = frame->f_regs[_R_A3]; nsaved = 2; } @@ -248,7 +248,7 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) if (nargs > nsaved) { error = copyin( - ((register_t *)(vaddr_t)frame->f_regs[SP] + 4), + ((register_t *)(vaddr_t)frame->f_regs[_R_SP] + 4), (args + nsaved), (nargs - nsaved) * sizeof(register_t)); if (error) @@ -265,28 +265,28 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) if (nargs < 5) { #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32 - args = (register_t *)&frame->f_regs[A0]; + args = (register_t *)&frame->f_regs[_R_A0]; #elif _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN args = copyargs; - args[0] = frame->f_regs[A0]; - args[1] = frame->f_regs[A1]; - args[2] = frame->f_regs[A2]; - args[3] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A0]; + args[1] = frame->f_regs[_R_A1]; + args[2] = frame->f_regs[_R_A2]; + args[3] = frame->f_regs[_R_A3]; #else # error syscall not implemented for current MIPS ABI #endif } else { args = copyargs; error = copyin( - ((register_t *)(vaddr_t)frame->f_regs[SP] + 4), + ((register_t *)(vaddr_t)frame->f_regs[_R_SP] + 4), (©args[4]), (nargs - 4) * sizeof(register_t)); if (error) goto bad; - args[0] = frame->f_regs[A0]; - args[1] = frame->f_regs[A1]; - args[2] = frame->f_regs[A2]; - args[3] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A0]; + args[1] = frame->f_regs[_R_A1]; + args[2] = frame->f_regs[_R_A2]; + args[3] = frame->f_regs[_R_A3]; } break; } @@ -296,13 +296,13 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) #endif #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32 - rval = (register_t *)&frame->f_regs[V0]; + rval = (register_t *)&frame->f_regs[_R_V0]; rval[0] = 0; /* rval[1] already has V1 */ #elif _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN rval = copyrval; rval[0] = 0; - rval[1] = frame->f_regs[V1]; + rval[1] = frame->f_regs[_R_V1]; #endif error = (*callp->sy_call)(l, args, rval); @@ -310,14 +310,14 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) switch (error) { case 0: #if _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN - frame->f_regs[V0] = rval[0]; - frame->f_regs[V1] = rval[1]; + frame->f_regs[_R_V0] = rval[0]; + frame->f_regs[_R_V1] = rval[1]; #endif - frame->f_regs[A3] = 0; + frame->f_regs[_R_A3] = 0; break; case ERESTART: - frame->f_regs[V0] = ov0; /* restore syscall code */ - frame->f_regs[PC] = opc; + frame->f_regs[_R_V0] = ov0; /* restore syscall code */ + frame->f_regs[_R_PC] = opc; break; case EJUSTRETURN: break; /* nothing to do */ @@ -325,8 +325,8 @@ EMULNAME(syscall_plain)(struct lwp *l, u_int status, u_int cause, u_int opc) bad: if (p->p_emul->e_errno) error = p->p_emul->e_errno[error]; - frame->f_regs[V0] = error; - frame->f_regs[A3] = 1; + frame->f_regs[_R_V0] = error; + frame->f_regs[_R_A3] = 1; break; } @@ -355,12 +355,12 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) uvmexp.syscalls++; if (DELAYBRANCH(cause)) - frame->f_regs[PC] = MachEmulateBranch(frame, opc, 0, 0); + frame->f_regs[_R_PC] = MachEmulateBranch(frame, opc, 0, 0); else - frame->f_regs[PC] = opc + sizeof(int); + frame->f_regs[_R_PC] = opc + sizeof(int); callp = p->p_emul->e_sysent; - ov0 = code = frame->f_regs[V0] - SYSCALL_SHIFT; + ov0 = code = frame->f_regs[_R_V0] - SYSCALL_SHIFT; switch (code) { case SYS_syscall: @@ -370,20 +370,20 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) /* * Code is first argument, followed by actual args. */ - code = frame->f_regs[A0] - SYSCALL_SHIFT; - args[0] = frame->f_regs[A1]; - args[1] = frame->f_regs[A2]; - args[2] = frame->f_regs[A3]; + code = frame->f_regs[_R_A0] - SYSCALL_SHIFT; + args[0] = frame->f_regs[_R_A1]; + args[1] = frame->f_regs[_R_A2]; + args[2] = frame->f_regs[_R_A3]; nsaved = 3; } else { /* * Like syscall, but code is a quad, so as to maintain * quad alignment for the rest of the arguments. */ - code = frame->f_regs[A0 + _QUAD_LOWWORD] + code = frame->f_regs[_R_A0 + _QUAD_LOWWORD] - SYSCALL_SHIFT; - args[0] = frame->f_regs[A2]; - args[1] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A2]; + args[1] = frame->f_regs[_R_A3]; nsaved = 2; } @@ -395,7 +395,7 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) if (nargs > nsaved) { error = copyin( - ((register_t *)(vaddr_t)frame->f_regs[SP] + 4), + ((register_t *)(vaddr_t)frame->f_regs[_R_SP] + 4), (args + nsaved), (nargs - nsaved) * sizeof(register_t)); if (error) @@ -412,28 +412,28 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) if (nargs < 5) { #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32 - args = (register_t *)&frame->f_regs[A0]; + args = (register_t *)&frame->f_regs[_R_A0]; #elif _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN args = copyargs; - args[0] = frame->f_regs[A0]; - args[1] = frame->f_regs[A1]; - args[2] = frame->f_regs[A2]; - args[3] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A0]; + args[1] = frame->f_regs[_R_A1]; + args[2] = frame->f_regs[_R_A2]; + args[3] = frame->f_regs[_R_A3]; #else # error syscall not implemented for current MIPS ABI #endif } else { args = copyargs; error = copyin( - ((register_t *)(vaddr_t)frame->f_regs[SP] + 4), + ((register_t *)(vaddr_t)frame->f_regs[_R_SP] + 4), (©args[4]), (nargs - 4) * sizeof(register_t)); if (error) goto bad; - args[0] = frame->f_regs[A0]; - args[1] = frame->f_regs[A1]; - args[2] = frame->f_regs[A2]; - args[3] = frame->f_regs[A3]; + args[0] = frame->f_regs[_R_A0]; + args[1] = frame->f_regs[_R_A1]; + args[2] = frame->f_regs[_R_A2]; + args[3] = frame->f_regs[_R_A3]; } break; } @@ -442,13 +442,13 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) goto bad; #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32 - rval = (register_t *)&frame->f_regs[V0]; + rval = (register_t *)&frame->f_regs[_R_V0]; rval[0] = 0; /* rval[1] already has V1 */ #elif _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN rval = copyrval; rval[0] = 0; - rval[1] = frame->f_regs[V1]; + rval[1] = frame->f_regs[_R_V1]; #endif error = (*callp->sy_call)(l, args, rval); @@ -456,14 +456,14 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) switch (error) { case 0: #if _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN - frame->f_regs[V0] = rval[0]; - frame->f_regs[V1] = rval[1]; + frame->f_regs[_R_V0] = rval[0]; + frame->f_regs[_R_V1] = rval[1]; #endif - frame->f_regs[A3] = 0; + frame->f_regs[_R_A3] = 0; break; case ERESTART: - frame->f_regs[V0] = ov0; /* restore syscall code */ - frame->f_regs[PC] = opc; + frame->f_regs[_R_V0] = ov0; /* restore syscall code */ + frame->f_regs[_R_PC] = opc; break; case EJUSTRETURN: break; /* nothing to do */ @@ -471,8 +471,8 @@ EMULNAME(syscall_fancy)(struct lwp *l, u_int status, u_int cause, u_int opc) bad: if (p->p_emul->e_errno) error = p->p_emul->e_errno[error]; - frame->f_regs[V0] = error; - frame->f_regs[A3] = 1; + frame->f_regs[_R_V0] = error; + frame->f_regs[_R_A3] = 1; break; } diff --git a/sys/arch/mips/mips/trap.c b/sys/arch/mips/mips/trap.c index a0137aba933a..f70d3fb94ba4 100644 --- a/sys/arch/mips/mips/trap.c +++ b/sys/arch/mips/mips/trap.c @@ -1,4 +1,4 @@ -/* $NetBSD: trap.c,v 1.188 2003/11/06 04:17:11 simonb Exp $ */ +/* $NetBSD: trap.c,v 1.189 2003/11/26 08:36:49 he Exp $ */ /* * Copyright (c) 1992, 1993 @@ -78,7 +78,7 @@ #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.188 2003/11/06 04:17:11 simonb Exp $"); +__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.189 2003/11/26 08:36:49 he Exp $"); #include "opt_cputype.h" /* which mips CPU levels do we support? */ #include "opt_ktrace.h" @@ -182,9 +182,9 @@ child_return(arg) struct lwp *l = arg; struct frame *frame = (struct frame *)l->l_md.md_regs; - frame->f_regs[V0] = 0; - frame->f_regs[V1] = 1; - frame->f_regs[A3] = 0; + frame->f_regs[_R_V0] = 0; + frame->f_regs[_R_V1] = 1; + frame->f_regs[_R_A3] = 0; userret(l); #ifdef KTRACE if (KTRPOINT(l->l_proc, KTR_SYSRET)) @@ -248,7 +248,7 @@ trap(status, cause, vaddr, opc, frame) if (curlwp != NULL) { fp = (struct frame *)l->l_md.md_regs; printf("pid=%d cmd=%s usp=0x%x ", - p->p_pid, p->p_comm, (int)fp->f_regs[SP]); + p->p_pid, p->p_comm, (int)fp->f_regs[_R_SP]); } else printf("curlwp == NULL "); printf("ksp=0x%x\n", (int)&status); @@ -271,7 +271,7 @@ trap(status, cause, vaddr, opc, frame) db_set_ddb_regs(type, (mips_reg_t *) frame); PC_BREAK_ADVANCE(f); if (kgdb_trap(type, &ddb_regs)) { - ((mips_reg_t *)frame)[21] = f->f_regs[PC]; + ((mips_reg_t *)frame)[21] = f->f_regs[_R_PC]; return; } } @@ -493,7 +493,7 @@ trap(status, cause, vaddr, opc, frame) printf("kgdb: ignored %s\n", trap_type[TRAPTYPE(cause)]); else - ((mips_reg_t *)frame)[21] = f->f_regs[PC]; + ((mips_reg_t *)frame)[21] = f->f_regs[_R_PC]; return; } @@ -558,7 +558,7 @@ trap(status, cause, vaddr, opc, frame) loadfpregs(l); /* load FPA */ fpcurlwp = l; l->l_md.md_flags |= MDP_FPUSED; - f->f_regs[SR] |= MIPS_SR_COP_1_BIT; + f->f_regs[_R_SR] |= MIPS_SR_COP_1_BIT; } else #endif { @@ -579,13 +579,13 @@ trap(status, cause, vaddr, opc, frame) ksi.ksi_trap = type & ~T_USER; ksi.ksi_signo = SIGFPE; fp = (struct frame *)l->l_md.md_regs; - ksi.ksi_addr = (void *)fp->f_regs[PC]; + ksi.ksi_addr = (void *)fp->f_regs[_R_PC]; ksi.ksi_code = FPE_FLTOVF; /* XXX */ break; /* SIGNAL */ } fp = (struct frame *)l->l_md.md_regs; - fp->f_regs[CAUSE] = cause; - fp->f_regs[BADVADDR] = vaddr; + fp->f_regs[_R_CAUSE] = cause; + fp->f_regs[_R_BADVADDR] = vaddr; #ifdef __HAVE_SIGINFO (*p->p_emul->e_trapsignal)(l, &ksi); #else @@ -678,7 +678,7 @@ mips_singlestep(l) p->p_comm, p->p_pid, l->l_md.md_ss_addr); return EFAULT; } - pc = (vaddr_t)f->f_regs[PC]; + pc = (vaddr_t)f->f_regs[_R_PC]; if (fuiword((void *)pc) != 0) /* not a NOP instruction */ va = MachEmulateBranch(f, pc, PCB_FSR(&l->l_addr->u_pcb), 1); else diff --git a/sys/arch/mips/mips/vm_machdep.c b/sys/arch/mips/mips/vm_machdep.c index b40807093da6..86f83de710f4 100644 --- a/sys/arch/mips/mips/vm_machdep.c +++ b/sys/arch/mips/mips/vm_machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: vm_machdep.c,v 1.98 2003/08/07 16:28:34 agc Exp $ */ +/* $NetBSD: vm_machdep.c,v 1.99 2003/11/26 08:36:51 he Exp $ */ /* * Copyright (c) 1992, 1993 @@ -79,7 +79,7 @@ #include "opt_ddb.h" #include /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.98 2003/08/07 16:28:34 agc Exp $"); +__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.99 2003/11/26 08:36:51 he Exp $"); #include #include @@ -170,7 +170,7 @@ cpu_lwp_fork(l1, l2, stack, stacksize, func, arg) * If specified, give the child a different stack. */ if (stack != NULL) - f->f_regs[SP] = (u_int)stack + stacksize; + f->f_regs[_R_SP] = (u_int)stack + stacksize; l2->l_md.md_regs = (void *)f; l2->l_md.md_flags = l1->l_md.md_flags & MDP_FPUSED; diff --git a/sys/compat/irix/irix_exec.c b/sys/compat/irix/irix_exec.c index d178a3ae821d..99613b7656fb 100644 --- a/sys/compat/irix/irix_exec.c +++ b/sys/compat/irix/irix_exec.c @@ -1,4 +1,4 @@ -/* $NetBSD: irix_exec.c,v 1.31 2003/11/08 21:28:45 manu Exp $ */ +/* $NetBSD: irix_exec.c,v 1.32 2003/11/26 08:36:51 he Exp $ */ /*- * Copyright (c) 2001-2002 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: irix_exec.c,v 1.31 2003/11/08 21:28:45 manu Exp $"); +__KERNEL_RCSID(0, "$NetBSD: irix_exec.c,v 1.32 2003/11/26 08:36:51 he Exp $"); #ifdef _KERNEL_OPT #include "opt_syscall_debug.h" @@ -132,7 +132,7 @@ irix_n32_setregs(l, pack, stack) struct frame *f = (struct frame *)l->l_md.md_regs; /* Enable 64 bit instructions (eg: sd) */ - f->f_regs[SR] |= MIPS3_SR_UX; + f->f_regs[_R_SR] |= MIPS3_SR_UX; } /* diff --git a/sys/compat/irix/irix_prctl.c b/sys/compat/irix/irix_prctl.c index cba78d8942e2..ed2db1b33229 100644 --- a/sys/compat/irix/irix_prctl.c +++ b/sys/compat/irix/irix_prctl.c @@ -1,4 +1,4 @@ -/* $NetBSD: irix_prctl.c,v 1.22 2003/11/08 21:33:35 manu Exp $ */ +/* $NetBSD: irix_prctl.c,v 1.23 2003/11/26 08:36:51 he Exp $ */ /*- * Copyright (c) 2001-2002 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: irix_prctl.c,v 1.22 2003/11/08 21:33:35 manu Exp $"); +__KERNEL_RCSID(0, "$NetBSD: irix_prctl.c,v 1.23 2003/11/26 08:36:51 he Exp $"); #include #include @@ -508,21 +508,21 @@ irix_sproc_child(isc) /* * Setup PC to return to the child entry point */ - tf->f_regs[PC] = (unsigned long)isc->isc_entry; - tf->f_regs[RA] = 0; + tf->f_regs[_R_PC] = (unsigned long)isc->isc_entry; + tf->f_regs[_R_RA] = 0; /* * Setup child arguments */ - tf->f_regs[A0] = (unsigned long)isc->isc_arg; - tf->f_regs[A1] = 0; - tf->f_regs[A2] = 0; - tf->f_regs[A3] = 0; - if (ptf->f_regs[S3] == (unsigned long)isc->isc_len) { - tf->f_regs[S0] = ptf->f_regs[S0]; - tf->f_regs[S1] = ptf->f_regs[S1]; - tf->f_regs[S2] = ptf->f_regs[S2]; - tf->f_regs[S3] = ptf->f_regs[S3]; + tf->f_regs[_R_A0] = (unsigned long)isc->isc_arg; + tf->f_regs[_R_A1] = 0; + tf->f_regs[_R_A2] = 0; + tf->f_regs[_R_A3] = 0; + if (ptf->f_regs[_R_S3] == (unsigned long)isc->isc_len) { + tf->f_regs[_R_S0] = ptf->f_regs[_R_S0]; + tf->f_regs[_R_S1] = ptf->f_regs[_R_S1]; + tf->f_regs[_R_S2] = ptf->f_regs[_R_S2]; + tf->f_regs[_R_S3] = ptf->f_regs[_R_S3]; } /* diff --git a/sys/compat/irix/irix_signal.c b/sys/compat/irix/irix_signal.c index d571a070bf0c..e970d06c064c 100644 --- a/sys/compat/irix/irix_signal.c +++ b/sys/compat/irix/irix_signal.c @@ -1,4 +1,4 @@ -/* $NetBSD: irix_signal.c,v 1.27 2003/11/08 21:35:26 manu Exp $ */ +/* $NetBSD: irix_signal.c,v 1.28 2003/11/26 08:36:51 he Exp $ */ /*- * Copyright (c) 1994, 2001-2002 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: irix_signal.c,v 1.27 2003/11/08 21:35:26 manu Exp $"); +__KERNEL_RCSID(0, "$NetBSD: irix_signal.c,v 1.28 2003/11/26 08:36:51 he Exp $"); #include #include @@ -277,7 +277,8 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) printf("catcher = %p, sig = %d, code = 0x%x\n", (void *)catcher, ksi->ksi_signo, ksi->ksi_trap); printf("irix_sendsig(): starting [PC=%p SP=%p SR=0x%08lx]\n", - (void *)f->f_regs[PC], (void *)f->f_regs[SP], f->f_regs[SR]); + (void *)f->f_regs[_R_PC], (void *)f->f_regs[_R_SP], + f->f_regs[_R_SR]); #endif /* DEBUG_IRIX */ /* @@ -298,7 +299,7 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) + p->p_sigctx.ps_sigstk.ss_size); else /* cast for _MIPS_BSD_API == _MIPS_BSD_API_LP32_64CLEAN case */ - sp = (void *)(u_int32_t)f->f_regs[SP]; + sp = (void *)(u_int32_t)f->f_regs[_R_SP]; /* * Build the signal frame @@ -307,7 +308,7 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) if (SIGACTION(p, ksi->ksi_signo).sa_flags & SA_SIGINFO) { irix_set_ucontext(&sf.isf_ctx.iss.iuc, mask, ksi->ksi_trap, l); irix_signal_siginfo(&sf.isf_ctx.iss.iis, ksi->ksi_signo, - ksi->ksi_trap, (caddr_t)f->f_regs[BADVADDR]); + ksi->ksi_trap, (caddr_t)f->f_regs[_R_BADVADDR]); } else { irix_set_sigcontext(&sf.isf_ctx.isc, mask, ksi->ksi_trap, l); } @@ -338,10 +339,10 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) /* * Set up signal trampoline arguments. */ - f->f_regs[A0] = native_to_svr4_signo[ksi->ksi_signo]; /* signo */ - f->f_regs[A1] = 0; /* NULL */ - f->f_regs[A2] = (unsigned long)sp; /* ucontext/sigcontext */ - f->f_regs[A3] = (unsigned long)catcher; /* signal handler address */ + f->f_regs[_R_A0] = native_to_svr4_signo[ksi->ksi_signo];/* signo */ + f->f_regs[_R_A1] = 0; /* NULL */ + f->f_regs[_R_A2] = (unsigned long)sp; /* ucontext/sigcontext */ + f->f_regs[_R_A3] = (unsigned long)catcher;/* signal handler address */ /* * When siginfo is selected, the higher bit of A0 is set @@ -350,17 +351,17 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) * Also, A1 points to struct siginfo instead of being NULL. */ if (SIGACTION(p, ksi->ksi_signo).sa_flags & SA_SIGINFO) { - f->f_regs[A0] |= 0x80000000; - f->f_regs[A1] = (u_long)sp + + f->f_regs[_R_A0] |= 0x80000000; + f->f_regs[_R_A1] = (u_long)sp + ((u_long)&sf.isf_ctx.iss.iis - (u_long)&sf); } /* * Set up the new stack pointer */ - f->f_regs[SP] = (unsigned long)sp; + f->f_regs[_R_SP] = (unsigned long)sp; #ifdef DEBUG_IRIX - printf("stack pointer at %p, A1 = %p\n", sp, (void *)f->f_regs[A1]); + printf("stack pointer at %p, A1 = %p\n", sp, (void *)f->f_regs[_R_A1]); #endif /* DEBUG_IRIX */ /* @@ -369,7 +370,7 @@ irix_sendsig(const ksiginfo_t *ksi, const sigset_t *mask) * see irix_sys_sigaction for details about how we get * the signal trampoline address. */ - f->f_regs[PC] = (unsigned long) + f->f_regs[_R_PC] = (unsigned long) (((struct irix_emuldata *)(p->p_emuldata))->ied_sigtramp[ksi->ksi_signo]); /* @@ -409,11 +410,11 @@ irix_set_sigcontext (scp, mask, code, l) scp->isc_regs[0] = 0; scp->isc_fp_rounded_result = 0; scp->isc_regmask = ~0x1UL; - scp->isc_mdhi = f->f_regs[MULHI]; - scp->isc_mdlo = f->f_regs[MULLO]; - scp->isc_pc = f->f_regs[PC]; - scp->isc_badvaddr = f->f_regs[BADVADDR]; - scp->isc_cause = f->f_regs[CAUSE]; + scp->isc_mdhi = f->f_regs[_R_MULHI]; + scp->isc_mdlo = f->f_regs[_R_MULLO]; + scp->isc_pc = f->f_regs[_R_PC]; + scp->isc_badvaddr = f->f_regs[_R_BADVADDR]; + scp->isc_cause = f->f_regs[_R_CAUSE]; /* * Save the floating-pointstate, if necessary, then copy it. @@ -462,10 +463,10 @@ irix_set_ucontext(ucp, mask, code, l) memcpy(&ucp->iuc_mcontext.svr4___gregs, &f->f_regs, 32 * sizeof(mips_reg_t)); /* Theses registers have different order on NetBSD and IRIX */ - ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDLO] = f->f_regs[MULLO]; - ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDHI] = f->f_regs[MULHI]; - ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_EPC] = f->f_regs[PC]; - ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_CAUSE] = f->f_regs[CAUSE]; + ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDLO] = f->f_regs[_R_MULLO]; + ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDHI] = f->f_regs[_R_MULHI]; + ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_EPC] = f->f_regs[_R_PC]; + ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_CAUSE] = f->f_regs[_R_CAUSE]; /* * Save the floating-pointstate, if necessary, then copy it. @@ -556,9 +557,9 @@ irix_sys_sigreturn(l, v, retval) #ifdef DEBUG_IRIX printf("irix_sys_sigreturn(): returning [PC=%p SP=%p SR=0x%08lx]\n", - (void *)((struct frame *)(l->l_md.md_regs))->f_regs[PC], - (void *)((struct frame *)(l->l_md.md_regs))->f_regs[SP], - ((struct frame *)(l->l_md.md_regs))->f_regs[SR]); + (void *)((struct frame *)(l->l_md.md_regs))->f_regs[_R_PC], + (void *)((struct frame *)(l->l_md.md_regs))->f_regs[_R_SP], + ((struct frame *)(l->l_md.md_regs))->f_regs[_R_SR]); #endif return EJUSTRETURN; @@ -580,18 +581,18 @@ irix_get_ucontext(ucp, l) (void)memcpy(&f->f_regs, &ucp->iuc_mcontext.svr4___gregs, 32 * sizeof(mips_reg_t)); /* Theses registers have different order on NetBSD and IRIX */ - f->f_regs[MULLO] = + f->f_regs[_R_MULLO] = ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDLO]; - f->f_regs[MULHI] = + f->f_regs[_R_MULHI] = ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_MDHI]; - f->f_regs[PC] = + f->f_regs[_R_PC] = ucp->iuc_mcontext.svr4___gregs[IRIX_CTX_EPC]; } if (ucp->iuc_flags & IRIX_UC_MAU) { #ifndef SOFTFLOAT /* Disable the FPU to fault in FP registers. */ - f->f_regs[SR] &= ~MIPS_SR_COP_1_BIT; + f->f_regs[_R_SR] &= ~MIPS_SR_COP_1_BIT; if (l == fpcurlwp) fpcurlwp = NULL; (void)memcpy(&l->l_addr->u_pcb.pcb_fpregs, @@ -651,14 +652,14 @@ irix_get_sigcontext(scp, l) for (i = 1; i < 32; i++) /* restore gpr1 to gpr31 */ f->f_regs[i] = scp->isc_regs[i]; - f->f_regs[MULLO] = scp->isc_mdlo; - f->f_regs[MULHI] = scp->isc_mdhi; - f->f_regs[PC] = scp->isc_pc; + f->f_regs[_R_MULLO] = scp->isc_mdlo; + f->f_regs[_R_MULHI] = scp->isc_mdhi; + f->f_regs[_R_PC] = scp->isc_pc; #ifndef SOFTFLOAT if (scp->isc_ownedfp) { /* Disable the FPU to fault in FP registers. */ - f->f_regs[SR] &= ~MIPS_SR_COP_1_BIT; + f->f_regs[_R_SR] &= ~MIPS_SR_COP_1_BIT; if (l == fpcurlwp) fpcurlwp = NULL; (void)memcpy(&l->l_addr->u_pcb.pcb_fpregs, &scp->isc_fpregs,