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ANSI KNF. and change my copyright to TNF copyright.

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This commit is contained in:
uch 2001-06-14 11:09:55 +00:00
parent 78484d385d
commit ea54d618ea
29 changed files with 1214 additions and 1098 deletions
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29
sys/arch/hpcmips/tx/tx39.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39.c,v 1.22 2001/06/13 19:09:08 uch Exp $ */
/* $NetBSD: tx39.c,v 1.23 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -130,14 +130,14 @@ tx_init()
switch (model) {
default:
/* Unknown TOSHIBA TX39-series */
/* Unknown TOSHIBA TX39-series */
sprintf(cpu_name, "Unknown TOSHIBA TX39-series %x", model);
break;
case TMPR3912:
tx39clock_cpuspeed(&cpuclock, &cpuspeed);
sprintf(cpu_name, "TOSHIBA TMPR3912 %d.%02d MHz",
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
tc->tc_chipset = __TX391X;
break;
case TMPR3922:
@ -145,8 +145,8 @@ tx_init()
rev = tx_conf_read(tc, TX3922_REVISION_REG);
sprintf(cpu_name, "TOSHIBA TMPR3922 rev. %x.%x "
"%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
"%d.%02d MHz", (rev >> 4) & 0xf, rev & 0xf,
cpuclock / 1000000, (cpuclock % 1000000) / 10000);
tc->tc_chipset = __TX392X;
break;
}
@ -178,7 +178,7 @@ tx_fb_init(kernend)
paddr_t fb_end;
fb_end = MIPS_KSEG0_TO_PHYS(mem_clusters[0].start +
mem_clusters[0].size - 1);
mem_clusters[0].size - 1);
tx3912video_init(MIPS_KSEG0_TO_PHYS(*kernend), &fb_end);
/* Skip V-RAM area */
@ -210,7 +210,7 @@ tx_mem_init(kernend)
* (For reboot Windows CE clearly)
*/
memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF -
(KERNBASE + 0x800));
(KERNBASE + 0x800));
}
void
@ -295,31 +295,30 @@ tx_cons_init()
slot = TX39_UARTA;
#endif
if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
if(txcom_cnattach(slot, CONSPEED,
(TTYDEF_CFLAG & ~(CSIZE | PARENB)) |
CS8)) {
if(txcom_cnattach(slot, CONSPEED,
(TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
panic("tx_cons_init: can't attach serial console.");
}
} else {
#if NM38813C > 0
if(CONSPLATIDMATCH(VICTOR_INTERLINK) &&
m38813c_cnattach(TX39_SYSADDR_CARD1)) {
m38813c_cnattach(TX39_SYSADDR_CARD1)) {
goto panic;
}
#endif
#if NTC5165BUF > 0
if(CONSPLATIDMATCH(COMPAQ_C) &&
tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
tc5165buf_cnattach(TX39_SYSADDR_CS3)) {
goto panic;
}
if(CONSPLATIDMATCH(SHARP_TELIOS) &&
tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
tc5165buf_cnattach(TX39_SYSADDR_CS1)) {
goto panic;
}
if(CONSPLATIDMATCH(SHARP_MOBILON) &&
tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
tc5165buf_cnattach(TX39_SYSADDR_MCS0)) {
goto panic;
}
#endif
@ -400,5 +399,5 @@ __is_set_print(reg, mask, name)
printf("%s[%c] ", name, onoff[ret]);
return ret;
return (ret);
}

133
sys/arch/hpcmips/tx/tx3912video.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx3912video.c,v 1.22 2001/02/22 18:38:04 uch Exp $ */
/* $NetBSD: tx3912video.c,v 1.23 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -106,7 +106,8 @@ paddr_t tx3912video_mmap(void *, off_t, int);
void tx3912video_clut_init(struct tx3912video_softc *);
void tx3912video_clut_install(void *, struct rasops_info *);
void tx3912video_clut_get(struct tx3912video_softc *, u_int32_t *, int, int);
void tx3912video_clut_get(struct tx3912video_softc *, u_int32_t *, int,
int);
static int __get_color8(int);
static int __get_color4(int);
@ -124,7 +125,7 @@ struct hpcfb_accessops tx3912video_ha = {
int
tx3912video_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_NORMAL;
return (ATTACH_NORMAL);
}
void
@ -148,9 +149,9 @@ tx3912video_attach(struct device *parent, struct device *self, void *aux)
/* print video module information */
printf(": %s, frame buffer 0x%08x-0x%08x\n",
depth_print[(ffs(chip->vc_fbdepth) - 1) & 0x3],
(unsigned)chip->vc_fbpaddr,
(unsigned)(chip->vc_fbpaddr + chip->vc_fbsize));
depth_print[(ffs(chip->vc_fbdepth) - 1) & 0x3],
(unsigned)chip->vc_fbpaddr,
(unsigned)(chip->vc_fbpaddr + chip->vc_fbsize));
/* don't inverse VDAT[3:0] signal */
tc = chip->vc_v;
@ -163,13 +164,12 @@ tx3912video_attach(struct device *parent, struct device *self, void *aux)
/* if serial console, power off video module */
tx3912video_power(sc, 0, 0, (void *)
(console ? PWR_RESUME : PWR_SUSPEND));
(console ? PWR_RESUME : PWR_SUSPEND));
/* Add a hard power hook to power saving */
sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT,
CONFIG_HOOK_PMEVENT_HARDPOWER,
CONFIG_HOOK_SHARE,
tx3912video_power, sc);
CONFIG_HOOK_PMEVENT_HARDPOWER, CONFIG_HOOK_SHARE,
tx3912video_power, sc);
if (sc->sc_powerhook == 0)
printf("WARNING unable to establish hard power hook");
@ -211,7 +211,7 @@ tx3912video_power(void *ctx, int type, long id, void *msg)
switch (why) {
case PWR_RESUME:
if (!sc->sc_console)
return 0; /* serial console */
return (0); /* serial console */
DPRINTF(("%s: ON\n", sc->sc_dev.dv_xname));
val = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);
@ -228,7 +228,7 @@ tx3912video_power(void *ctx, int type, long id, void *msg)
break;
}
return 0;
return (0);
}
void
@ -251,10 +251,10 @@ tx3912video_hpcfbinit(sc)
fb->hf_width = chip->vc_fbwidth;
fb->hf_baseaddr = (u_long)fbvaddr;
fb->hf_offset = (u_long)fbvaddr -
mips_ptob(mips_btop(fbvaddr));
mips_ptob(mips_btop(fbvaddr));
/* frame buffer start offset */
fb->hf_bytes_per_line = (chip->vc_fbwidth * chip->vc_fbdepth)
/ NBBY;
/ NBBY;
fb->hf_nplanes = 1;
fb->hf_bytes_per_plane = chip->vc_fbheight * fb->hf_bytes_per_line;
@ -316,8 +316,8 @@ tx3912video_init(paddr_t fb_start, paddr_t *fb_end)
bootinfo->fb_type = reverse ? BIFB_D2_M2L_3 : BIFB_D2_M2L_0;
reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);
TX3912_VIDEOCTRL1_BITSEL_CLR(reg);
reg = TX3912_VIDEOCTRL1_BITSEL_SET(
reg, TX3912_VIDEOCTRL1_BITSEL_2BITGREYSCALE);
reg = TX3912_VIDEOCTRL1_BITSEL_SET(reg,
TX3912_VIDEOCTRL1_BITSEL_2BITGREYSCALE);
tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, reg);
break;
case 8:
@ -351,9 +351,9 @@ tx3912video_init(paddr_t fb_start, paddr_t *fb_end)
return (0);
}
int
int
tx3912video_framebuffer_alloc(struct video_chip *chip, paddr_t fb_start,
paddr_t *fb_end /* buffer allocation hint */)
paddr_t *fb_end /* buffer allocation hint */)
{
struct extent_fixed ex_fixed[10];
struct extent *ex;
@ -362,25 +362,23 @@ tx3912video_framebuffer_alloc(struct video_chip *chip, paddr_t fb_start,
/* calcurate frame buffer size */
size = (chip->vc_fbwidth * chip->vc_fbheight * chip->vc_fbdepth) /
NBBY;
NBBY;
/* extent V-RAM region */
ex = extent_create("Frame buffer address", fb_start, *fb_end,
0, (caddr_t)ex_fixed, sizeof ex_fixed,
EX_NOWAIT);
0, (caddr_t)ex_fixed, sizeof ex_fixed,
EX_NOWAIT);
if (ex == 0)
return (1);
/* Allocate V-RAM area */
error = extent_alloc_subregion(ex, fb_start, fb_start + size - 1,
size, TX3912_FRAMEBUFFER_ALIGNMENT,
TX3912_FRAMEBUFFER_BOUNDARY,
EX_FAST|EX_NOWAIT, &addr);
size, TX3912_FRAMEBUFFER_ALIGNMENT,
TX3912_FRAMEBUFFER_BOUNDARY, EX_FAST|EX_NOWAIT, &addr);
extent_destroy(ex);
if (error != 0) {
if (error != 0)
return (1);
}
chip->vc_fbpaddr = addr;
chip->vc_fbvaddr = MIPS_PHYS_TO_KSEG1(addr);
@ -445,11 +443,10 @@ tx3912video_resolution_init(struct video_chip *chip)
reg = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);
split = reg & TX3912_VIDEOCTRL1_DISPSPLIT;
bit8 = (TX3912_VIDEOCTRL1_BITSEL(reg) ==
TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR);
TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR);
val = TX3912_VIDEOCTRL1_BITSEL(reg);
if ((val == TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR) &&
!split) {
if ((val == TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR) && !split) {
/* (LCD horizontal pixels / 8bit) * RGB - 1 */
horzval = (h / 8) * 3 - 1;
} else {
@ -517,9 +514,9 @@ tx3912video_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
idx = cmap->index;
if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR ||
sc->sc_fbconf.hf_pack_width != 8 ||
!LEGAL_CLUT_INDEX(idx) ||
!LEGAL_CLUT_INDEX(idx + cnt -1)) {
sc->sc_fbconf.hf_pack_width != 8 ||
!LEGAL_CLUT_INDEX(idx) ||
!LEGAL_CLUT_INDEX(idx + cnt -1)) {
return (EINVAL);
}
@ -574,9 +571,9 @@ tx3912video_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
case HPCFBIO_GDSPCONF:
dspconf = (struct hpcfb_dspconf *)data;
if ((dspconf->hd_unit_index != 0 &&
dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
(dspconf->hd_conf_index != 0 &&
dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
return (EINVAL);
}
*dspconf = sc->sc_dspconf; /* structure assignment */
@ -585,9 +582,9 @@ tx3912video_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
case HPCFBIO_SDSPCONF:
dspconf = (struct hpcfb_dspconf *)data;
if ((dspconf->hd_unit_index != 0 &&
dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) ||
(dspconf->hd_conf_index != 0 &&
dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) {
return (EINVAL);
}
/*
@ -611,7 +608,7 @@ tx3912video_mmap(void *ctx, off_t offset, int prot)
struct tx3912video_softc *sc = (struct tx3912video_softc *)ctx;
if (offset < 0 || (sc->sc_fbconf.hf_bytes_per_plane +
sc->sc_fbconf.hf_offset) < offset) {
sc->sc_fbconf.hf_offset) < offset) {
return (-1);
}
@ -680,7 +677,7 @@ __get_color4(int luti)
void
tx3912video_clut_get(struct tx3912video_softc *sc, u_int32_t *rgb, int beg,
int cnt)
int cnt)
{
int i;
@ -690,8 +687,8 @@ tx3912video_clut_get(struct tx3912video_softc *sc, u_int32_t *rgb, int beg,
for (i = beg; i < beg + cnt; i++) {
*rgb++ = RGB24(__get_color8((i >> 5) & 0x7),
__get_color8((i >> 2) & 0x7),
__get_color4(i & 0x3));
__get_color8((i >> 2) & 0x7),
__get_color4(i & 0x3));
}
}
@ -740,56 +737,56 @@ tx3912video_clut_init(struct tx3912video_softc *sc)
*/
/* 2/3, 1/3 */
tx_conf_write(tc, TX3912_VIDEOCTRL8_REG,
TX3912_VIDEOCTRL8_PAT2_3_DEFAULT);
TX3912_VIDEOCTRL8_PAT2_3_DEFAULT);
/* 3/4, 2/4 */
tx_conf_write(tc, TX3912_VIDEOCTRL9_REG,
(TX3912_VIDEOCTRL9_PAT3_4_DEFAULT << 16) |
TX3912_VIDEOCTRL9_PAT2_4_DEFAULT);
(TX3912_VIDEOCTRL9_PAT3_4_DEFAULT << 16) |
TX3912_VIDEOCTRL9_PAT2_4_DEFAULT);
/* 4/5, 1/5 */
tx_conf_write(tc, TX3912_VIDEOCTRL10_REG,
TX3912_VIDEOCTRL10_PAT4_5_DEFAULT);
TX3912_VIDEOCTRL10_PAT4_5_DEFAULT);
/* 3/5, 2/5 */
tx_conf_write(tc, TX3912_VIDEOCTRL11_REG,
TX3912_VIDEOCTRL11_PAT3_5_DEFAULT);
TX3912_VIDEOCTRL11_PAT3_5_DEFAULT);
/* 6/7, 1/7 */
tx_conf_write(tc, TX3912_VIDEOCTRL12_REG,
TX3912_VIDEOCTRL12_PAT6_7_DEFAULT);
TX3912_VIDEOCTRL12_PAT6_7_DEFAULT);
/* 5/7, 2/7 */
tx_conf_write(tc, TX3912_VIDEOCTRL13_REG,
TX3912_VIDEOCTRL13_PAT5_7_DEFAULT);
TX3912_VIDEOCTRL13_PAT5_7_DEFAULT);
/* 4/7, 3/7 */
tx_conf_write(tc, TX3912_VIDEOCTRL14_REG,
TX3912_VIDEOCTRL14_PAT4_7_DEFAULT);
TX3912_VIDEOCTRL14_PAT4_7_DEFAULT);
/*
* dither-pattern look-up table. (selected by uch)
*/
/* red */
tx_conf_write(tc, TX3912_VIDEOCTRL5_REG,
(dither_level8[7] << 28) |
(dither_level8[6] << 24) |
(dither_level8[5] << 20) |
(dither_level8[4] << 16) |
(dither_level8[3] << 12) |
(dither_level8[2] << 8) |
(dither_level8[1] << 4) |
(dither_level8[0] << 0));
(dither_level8[7] << 28) |
(dither_level8[6] << 24) |
(dither_level8[5] << 20) |
(dither_level8[4] << 16) |
(dither_level8[3] << 12) |
(dither_level8[2] << 8) |
(dither_level8[1] << 4) |
(dither_level8[0] << 0));
/* green */
tx_conf_write(tc, TX3912_VIDEOCTRL6_REG,
(dither_level8[7] << 28) |
(dither_level8[6] << 24) |
(dither_level8[5] << 20) |
(dither_level8[4] << 16) |
(dither_level8[3] << 12) |
(dither_level8[2] << 8) |
(dither_level8[1] << 4) |
(dither_level8[0] << 0));
(dither_level8[7] << 28) |
(dither_level8[6] << 24) |
(dither_level8[5] << 20) |
(dither_level8[4] << 16) |
(dither_level8[3] << 12) |
(dither_level8[2] << 8) |
(dither_level8[1] << 4) |
(dither_level8[0] << 0));
/* blue (2bit gray scale also use this look-up table) */
tx_conf_write(tc, TX3912_VIDEOCTRL7_REG,
(dither_level4[3] << 12) |
(dither_level4[2] << 8) |
(dither_level4[1] << 4) |
(dither_level4[0] << 0));
(dither_level4[3] << 12) |
(dither_level4[2] << 8) |
(dither_level4[1] << 4) |
(dither_level4[0] << 0));
tx3912video_reset(sc->sc_chip);
}

38
sys/arch/hpcmips/tx/tx3912videoreg.h
View File

@ -1,7 +1,11 @@
/* $NetBSD: tx3912videoreg.h,v 1.4 2000/05/12 18:09:56 uch Exp $ */
/* $NetBSD: tx3912videoreg.h,v 1.5 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 UCHIYAMA Yasushi. All rights reserved.
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -11,19 +15,25 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* TOSHIBA TMPR3912/05, Philips PR31700 Video module register

46
sys/arch/hpcmips/tx/tx3912videovar.h
View File

@ -1,7 +1,11 @@
/* $NetBSD: tx3912videovar.h,v 1.5 2000/05/08 21:57:58 uch Exp $ */
/* $NetBSD: tx3912videovar.h,v 1.6 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 UCHIYAMA Yasushi. All rights reserved.
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -11,22 +15,28 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
int tx3912video_init __P((paddr_t, paddr_t *));
int tx3912video_init(paddr_t, paddr_t *);
/*
* 8bpp CLUT
@ -63,6 +73,6 @@ int tx3912video_init __P((paddr_t, paddr_t *));
/*
* debug functions.
*/
void tx3912video_calibration_pattern __P((void));
void tx3912video_line __P((int, int, int, int));
void tx3912video_dot __P((int, int));
void tx3912video_calibration_pattern(void);
void tx3912video_line(int, int, int, int);
void tx3912video_dot(int, int);

70
sys/arch/hpcmips/tx/tx39biu.c
View File

@ -1,30 +1,41 @@
/* $NetBSD: tx39biu.c,v 1.4 2000/10/22 10:42:32 uch Exp $ */
/* $NetBSD: tx39biu.c,v 1.5 2001/06/14 11:09:55 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "opt_tx39_debug.h"
#include "opt_tx39_watchdogtimer.h"
#include "opt_tx39biudebug.h"
@ -41,18 +52,18 @@
#include <hpcmips/tx/txcsbusvar.h>
#define ISSET(x, s) ((x) & (1 << (s)))
#define ISSETPRINT(r, s, m) __is_set_print((u_int32_t)(r), \
#define ISSETPRINT(r, s, m) __is_set_print((u_int32_t)(r), \
TX39_MEMCONFIG##s##_##m, #m)
int tx39biu_match __P((struct device*, struct cfdata*, void*));
void tx39biu_attach __P((struct device*, struct device*, void*));
void tx39biu_callback __P((struct device*));
int tx39biu_print __P((void*, const char*));
int tx39biu_intr __P((void*));
int tx39biu_match(struct device *, struct cfdata *, void *);
void tx39biu_attach(struct device *, struct device *, void *);
void tx39biu_callback(struct device *);
int tx39biu_print(void *, const char *);
int tx39biu_intr(void *);
static void *__sc; /* XXX */
void tx39biu_dump __P((tx_chipset_tag_t));
void tx39biu_dump(tx_chipset_tag_t);
struct tx39biu_softc {
struct device sc_dev;
@ -69,7 +80,7 @@ tx39biu_match(parent, cf, aux)
struct cfdata *cf;
void *aux;
{
return ATTACH_NORMAL;
return (ATTACH_NORMAL);
}
void
@ -136,7 +147,7 @@ tx39biu_print(aux, pnp)
void *aux;
const char *pnp;
{
return pnp ? QUIET : UNCONF;
return (pnp ? QUIET : UNCONF);
}
int
@ -148,7 +159,7 @@ tx39biu_intr(arg)
txreg_t reg;
if (!sc) {
return 0;
return (0);
}
tc = sc->sc_tc;
/* Clear interrupt */
@ -159,7 +170,7 @@ tx39biu_intr(arg)
reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT;
tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
return 0;
return (0);
}
void
@ -199,7 +210,7 @@ tx39biu_dump(tc)
int r, c;
printf(" BANK%d: ", i);
switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg)
: TX39_MEMCONFIG0_BANK0CONF(reg)) {
: TX39_MEMCONFIG0_BANK0CONF(reg)) {
case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM:
printf("16bit SDRAM");
break;
@ -275,4 +286,3 @@ tx39biu_dump(tc)
}
printf("\n");
}

417
sys/arch/hpcmips/tx/tx39biureg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39biureg.h,v 1.2 1999/12/31 16:07:29 uch Exp $ */
/* $NetBSD: tx39biureg.h,v 1.3 2001/06/14 11:09:55 uch Exp $ */
/*
* Copyright (c) 1999, 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Toshiba TX3912/3922 BIU module (Bus Interface Unit)
@ -105,19 +115,19 @@
#define TX39_MEMCONFIG0_BANK1CONF_SHIFT 18
#define TX39_MEMCONFIG0_BANK1CONF_MASK 0x3
#define TX39_MEMCONFIG0_BANK1CONF(cr) \
(((cr) >> TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
#define TX39_MEMCONFIG0_BANK1CONF(cr) \
(((cr) >> TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
TX39_MEMCONFIG0_BANK1CONF_MASK)
#define TX39_MEMCONFIG0_BANK1CONF_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
#define TX39_MEMCONFIG0_BANK1CONF_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \
(TX39_MEMCONFIG0_BANK1CONF_MASK << TX39_MEMCONFIG0_BANK1CONF_SHIFT)))
#define TX39_MEMCONFIG0_BANK0CONF_SHIFT 16
#define TX39_MEMCONFIG0_BANK0CONF_MASK 0x3
#define TX39_MEMCONFIG0_BANK0CONF(cr) \
(((cr) >> TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
#define TX39_MEMCONFIG0_BANK0CONF(cr) \
(((cr) >> TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
TX39_MEMCONFIG0_BANK0CONF_MASK)
#define TX39_MEMCONFIG0_BANK0CONF_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
#define TX39_MEMCONFIG0_BANK0CONF_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \
(TX39_MEMCONFIG0_BANK0CONF_MASK << TX39_MEMCONFIG0_BANK0CONF_SHIFT)))
#define TX39_MEMCONFIG0_BANKCONF_16BITSDRAM 0x3
#define TX39_MEMCONFIG0_BANKCONF_8BITSDRAM 0x2
@ -126,36 +136,36 @@
#define TX39_MEMCONFIG0_ROWSEL1_SHIFT 14
#define TX39_MEMCONFIG0_ROWSEL1_MASK 0x3
#define TX39_MEMCONFIG0_ROWSEL1(cr) \
(((cr) >> TX39_MEMCONFIG0_ROWSEL1_SHIFT) & \
#define TX39_MEMCONFIG0_ROWSEL1(cr) \
(((cr) >> TX39_MEMCONFIG0_ROWSEL1_SHIFT) & \
TX39_MEMCONFIG0_ROWSEL1_MASK)
#define TX39_MEMCONFIG0_ROWSEL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL1_SHIFT) & \
#define TX39_MEMCONFIG0_ROWSEL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL1_SHIFT) & \
(TX39_MEMCONFIG0_ROWSEL1_MASK << TX39_MEMCONFIG0_ROWSEL1_SHIFT)))
#define TX39_MEMCONFIG0_ROWSEL0_SHIFT 12
#define TX39_MEMCONFIG0_ROWSEL0_MASK 0x3
#define TX39_MEMCONFIG0_ROWSEL0(cr) \
(((cr) >> TX39_MEMCONFIG0_ROWSEL0_SHIFT) & \
#define TX39_MEMCONFIG0_ROWSEL0(cr) \
(((cr) >> TX39_MEMCONFIG0_ROWSEL0_SHIFT) & \
TX39_MEMCONFIG0_ROWSEL0_MASK)
#define TX39_MEMCONFIG0_ROWSEL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL0_SHIFT) & \
#define TX39_MEMCONFIG0_ROWSEL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL0_SHIFT) & \
(TX39_MEMCONFIG0_ROWSEL0_MASK << TX39_MEMCONFIG0_ROWSEL0_SHIFT)))
#define TX39_MEMCONFIG0_COLSEL1_SHIFT 8
#define TX39_MEMCONFIG0_COLSEL1_MASK 0xf
#define TX39_MEMCONFIG0_COLSEL1(cr) \
(((cr) >> TX39_MEMCONFIG0_COLSEL1_SHIFT) & \
#define TX39_MEMCONFIG0_COLSEL1(cr) \
(((cr) >> TX39_MEMCONFIG0_COLSEL1_SHIFT) & \
TX39_MEMCONFIG0_COLSEL1_MASK)
#define TX39_MEMCONFIG0_COLSEL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_COLSEL1_SHIFT) & \
#define TX39_MEMCONFIG0_COLSEL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_COLSEL1_SHIFT) & \
(TX39_MEMCONFIG0_COLSEL1_MASK << TX39_MEMCONFIG0_COLSEL1_SHIFT)))
#define TX39_MEMCONFIG0_COLSEL0_SHIFT 4
#define TX39_MEMCONFIG0_COLSEL0_MASK 0xf
#define TX39_MEMCONFIG0_COLSEL0(cr) \
(((cr) >> TX39_MEMCONFIG0_COLSEL0_SHIFT) & \
#define TX39_MEMCONFIG0_COLSEL0(cr) \
(((cr) >> TX39_MEMCONFIG0_COLSEL0_SHIFT) & \
TX39_MEMCONFIG0_COLSEL0_MASK)
#define TX39_MEMCONFIG0_COLSEL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_COLSEL0_SHIFT) & \
#define TX39_MEMCONFIG0_COLSEL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG0_COLSEL0_SHIFT) & \
(TX39_MEMCONFIG0_COLSEL0_MASK << TX39_MEMCONFIG0_COLSEL0_SHIFT)))
#define TX39_MEMCONFIG0_CS3SIZE 0x00000008
@ -169,39 +179,43 @@
#ifdef TX391X
#define TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT 28
#define TX39_MEMCONFIG1_MCS3ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG1_MCS3ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG1_MCS3ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT) & \
TX39_MEMCONFIG1_MCS3ACCVAL1_MASK)
#define TX39_MEMCONFIG1_MCS3ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS3ACCVAL1_MASK << TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS3ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS3ACCVAL1_MASK << \
TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT 24
#define TX39_MEMCONFIG1_MCS3ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG1_MCS3ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG1_MCS3ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT) & \
TX39_MEMCONFIG1_MCS3ACCVAL2_MASK)
#define TX39_MEMCONFIG1_MCS3ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS3ACCVAL2_MASK << TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS3ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS3ACCVAL2_MASK << \
TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT 20
#define TX39_MEMCONFIG1_MCS2ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG1_MCS2ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG1_MCS2ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT) & \
TX39_MEMCONFIG1_MCS2ACCVAL1_MASK)
#define TX39_MEMCONFIG1_MCS2ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS2ACCVAL1_MASK << TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS2ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS2ACCVAL1_MASK << \
TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT 16
#define TX39_MEMCONFIG1_MCS2ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG1_MCS2ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG1_MCS2ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT) & \
TX39_MEMCONFIG1_MCS2ACCVAL2_MASK)
#define TX39_MEMCONFIG1_MCS2ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS2ACCVAL2_MASK << TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS2ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS2ACCVAL2_MASK << \
TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT)))
#endif /* TX391X */
#ifdef TX392X
#define TX39_MEMCONFIG1_C48MPLLON 0x40000000
@ -211,11 +225,11 @@
#define TX39_MEMCONFIG1_ENMCS0ACC 0x04000000
#define TX39_MEMCONFIG1_BCLKDIV_SHIFT 23
#define TX39_MEMCONFIG1_BCLKDIV_MASK 0x7
#define TX39_MEMCONFIG1_BCLKDIV(cr) \
(((cr) >> TX39_MEMCONFIG1_BCLKDIV_SHIFT) & \
#define TX39_MEMCONFIG1_BCLKDIV(cr) \
(((cr) >> TX39_MEMCONFIG1_BCLKDIV_SHIFT) & \
TX39_MEMCONFIG1_BCLKDIV_MASK)
#define TX39_MEMCONFIG1_BCLKDIV_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_BCLKDIV_SHIFT) & \
#define TX39_MEMCONFIG1_BCLKDIV_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_BCLKDIV_SHIFT) & \
(TX39_MEMCONFIG1_BCLKDIV_MASK << TX39_MEMCONFIG1_BCLKDIV_SHIFT)))
#define TX39_MEMCONFIG1_ENBCLK 0x00400000
#define TX39_MEMCONFIG1_ENMCS1PAGE 0x00200000
@ -228,114 +242,118 @@
#define TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT 12
#define TX39_MEMCONFIG1_MCS1ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG1_MCS1ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG1_MCS1ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT) & \
TX39_MEMCONFIG1_MCS1ACCVAL1_MASK)
#define TX39_MEMCONFIG1_MCS1ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS1ACCVAL1_MASK << TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS1ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS1ACCVAL1_MASK << \
TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT 8
#define TX39_MEMCONFIG1_MCS1ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG1_MCS1ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG1_MCS1ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT) & \
TX39_MEMCONFIG1_MCS1ACCVAL2_MASK)
#define TX39_MEMCONFIG1_MCS1ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS1ACCVAL2_MASK << TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS1ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS1ACCVAL2_MASK << \
TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT 4
#define TX39_MEMCONFIG1_MCS0ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG1_MCS0ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG1_MCS0ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT) & \
TX39_MEMCONFIG1_MCS0ACCVAL1_MASK)
#define TX39_MEMCONFIG1_MCS0ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS0ACCVAL1_MASK << TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS0ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG1_MCS0ACCVAL1_MASK << \
TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT 0
#define TX39_MEMCONFIG1_MCS0ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG1_MCS0ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG1_MCS0ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT) & \
TX39_MEMCONFIG1_MCS0ACCVAL2_MASK)
#define TX39_MEMCONFIG1_MCS0ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS0ACCVAL2_MASK << TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG1_MCS0ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG1_MCS0ACCVAL2_MASK << \
TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT)))
/*
* Memory Configuration 2 Register
*/
/* Define access timing. not required yet */
#define TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT 28
#define TX39_MEMCONFIG2_CS3ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS3ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS3ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS3ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT) & \
TX39_MEMCONFIG2_CS3ACCVAL1_MASK)
#define TX39_MEMCONFIG2_CS3ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS3ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG2_CS3ACCVAL1_MASK << TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT 24
#define TX39_MEMCONFIG2_CS3ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS3ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS3ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS3ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT) & \
TX39_MEMCONFIG2_CS3ACCVAL2_MASK)
#define TX39_MEMCONFIG2_CS3ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS3ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG2_CS3ACCVAL2_MASK << TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT 20
#define TX39_MEMCONFIG2_CS2ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS2ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS2ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS2ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT) & \
TX39_MEMCONFIG2_CS2ACCVAL1_MASK)
#define TX39_MEMCONFIG2_CS2ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS2ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG2_CS2ACCVAL1_MASK << TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT 16
#define TX39_MEMCONFIG2_CS2ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS2ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS2ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS2ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT) & \
TX39_MEMCONFIG2_CS2ACCVAL2_MASK)
#define TX39_MEMCONFIG2_CS2ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS2ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG2_CS2ACCVAL2_MASK << TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT 12
#define TX39_MEMCONFIG2_CS1ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS1ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS1ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS1ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT) & \
TX39_MEMCONFIG2_CS1ACCVAL1_MASK)
#define TX39_MEMCONFIG2_CS1ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS1ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG2_CS1ACCVAL1_MASK << TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT 8
#define TX39_MEMCONFIG2_CS1ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS1ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS1ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS1ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT) & \
TX39_MEMCONFIG2_CS1ACCVAL2_MASK)
#define TX39_MEMCONFIG2_CS1ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS1ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG2_CS1ACCVAL2_MASK << TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT)))
#define TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT 4
#define TX39_MEMCONFIG2_CS0ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS0ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS0ACCVAL1_MASK 0xf
#define TX39_MEMCONFIG2_CS0ACCVAL1(cr) \
(((cr) >> TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT) & \
TX39_MEMCONFIG2_CS0ACCVAL1_MASK)
#define TX39_MEMCONFIG2_CS0ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT) & \
#define TX39_MEMCONFIG2_CS0ACCVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT) & \
(TX39_MEMCONFIG2_CS0ACCVAL1_MASK << TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT)))
#define TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT 0
#define TX39_MEMCONFIG2_CS0ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS0ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS0ACCVAL2_MASK 0xf
#define TX39_MEMCONFIG2_CS0ACCVAL2(cr) \
(((cr) >> TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT) & \
TX39_MEMCONFIG2_CS0ACCVAL2_MASK)
#define TX39_MEMCONFIG2_CS0ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT) & \
#define TX39_MEMCONFIG2_CS0ACCVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT) & \
(TX39_MEMCONFIG2_CS0ACCVAL2_MASK << TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT)))
/*
@ -344,59 +362,63 @@
/* Define access timing, enable read page mode, PC-Card. */
#define TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT 28
#define TX39_MEMCONFIG3_CARD2ACCVAL_MASK 0xf
#define TX39_MEMCONFIG3_CARD2ACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT) & \
#define TX39_MEMCONFIG3_CARD2ACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT) & \
TX39_MEMCONFIG3_CARD2ACCVAL_MASK)
#define TX39_MEMCONFIG3_CARD2ACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD2ACCVAL_MASK << TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD2ACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD2ACCVAL_MASK << \
TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT 24
#define TX39_MEMCONFIG3_CARD1ACCVAL_MASK 0xf
#define TX39_MEMCONFIG3_CARD1ACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT) & \
#define TX39_MEMCONFIG3_CARD1ACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT) & \
TX39_MEMCONFIG3_CARD1ACCVAL_MASK)
#define TX39_MEMCONFIG3_CARD1ACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD1ACCVAL_MASK << TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD1ACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD1ACCVAL_MASK << \
TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT 20
#define TX39_MEMCONFIG3_CARD2IOACCVAL_MASK 0xf
#define TX39_MEMCONFIG3_CARD2IOACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT) & \
#define TX39_MEMCONFIG3_CARD2IOACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT) & \
TX39_MEMCONFIG3_CARD2IOACCVAL_MASK)
#define TX39_MEMCONFIG3_CARD2IOACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD2IOACCVAL_MASK << TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD2IOACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD2IOACCVAL_MASK << \
TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT 16
#define TX39_MEMCONFIG3_CARD1IOACCVAL_MASK 0xf
#define TX39_MEMCONFIG3_CARD1IOACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT) & \
#define TX39_MEMCONFIG3_CARD1IOACCVAL(cr) \
(((cr) >> TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT) & \
TX39_MEMCONFIG3_CARD1IOACCVAL_MASK)
#define TX39_MEMCONFIG3_CARD1IOACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD1IOACCVAL_MASK << TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT)))
#define TX39_MEMCONFIG3_CARD1IOACCVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT) & \
(TX39_MEMCONFIG3_CARD1IOACCVAL_MASK << \
TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT)))
#ifdef TX391X
#define TX39_MEMCONFIG3_ENMCS3PAGE 0x00008000
#define TX39_MEMCONFIG3_ENMCS2PAGE 0x00004000
#define TX39_MEMCONFIG3_ENMCS1PAGE 0x00002000
#define TX39_MEMCONFIG3_ENMCS0PAGE 0x00001000
#define TX39_MEMCONFIG3_ENMCS3PAGE 0x00008000
#define TX39_MEMCONFIG3_ENMCS2PAGE 0x00004000
#define TX39_MEMCONFIG3_ENMCS1PAGE 0x00002000
#define TX39_MEMCONFIG3_ENMCS0PAGE 0x00001000
#endif /* TX391X */
#define TX39_MEMCONFIG3_ENCS3PAGE 0x00000800
#define TX39_MEMCONFIG3_ENCS2PAGE 0x00000400
#define TX39_MEMCONFIG3_ENCS1PAGE 0x00000200
#define TX39_MEMCONFIG3_ENCS0PAGE 0x00000100
#define TX39_MEMCONFIG3_CARD2WAITEN 0x00000080
#define TX39_MEMCONFIG3_CARD1WAITEN 0x00000040
#define TX39_MEMCONFIG3_CARD2IOEN 0x00000020
#define TX39_MEMCONFIG3_CARD1IOEN 0x00000010
#define TX39_MEMCONFIG3_ENCS3PAGE 0x00000800
#define TX39_MEMCONFIG3_ENCS2PAGE 0x00000400
#define TX39_MEMCONFIG3_ENCS1PAGE 0x00000200
#define TX39_MEMCONFIG3_ENCS0PAGE 0x00000100
#define TX39_MEMCONFIG3_CARD2WAITEN 0x00000080
#define TX39_MEMCONFIG3_CARD1WAITEN 0x00000040
#define TX39_MEMCONFIG3_CARD2IOEN 0x00000020
#define TX39_MEMCONFIG3_CARD1IOEN 0x00000010
#ifdef TX391X
#define TX39_MEMCONFIG3_PORT8SEL 0x00000008
#define TX39_MEMCONFIG3_PORT8SEL 0x00000008
#endif /* TX391X */
#ifdef TX392X
#define TX39_MEMCONFIG3_CARD2_8SEL 0x00000008
#define TX39_MEMCONFIG3_CARD1_8SEL 0x00000004
#define TX39_MEMCONFIG3_CARD2_8SEL 0x00000008
#define TX39_MEMCONFIG3_CARD1_8SEL 0x00000004
#endif /* TX392X */
/*
* Memory Configuration 4 Register
@ -416,12 +438,13 @@
*/
#define TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT 20
#define TX39_MEMCONFIG4_WATCHTIMEVAL_MASK 0xf
#define TX39_MEMCONFIG4_WATCHTIMEVAL(cr) \
(((cr) >> TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT) & \
#define TX39_MEMCONFIG4_WATCHTIMEVAL(cr) \
(((cr) >> TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT) & \
TX39_MEMCONFIG4_WATCHTIMEVAL_MASK)
#define TX39_MEMCONFIG4_WATCHTIMEVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT) & \
(TX39_MEMCONFIG4_WATCHTIMEVAL_MASK << TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT)))
#define TX39_MEMCONFIG4_WATCHTIMEVAL_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT) & \
(TX39_MEMCONFIG4_WATCHTIMEVAL_MASK << \
TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT)))
#define TX39_MEMCONFIG4_MEMPOWERDOWN 0x00010000
@ -430,20 +453,20 @@
#define TX39_MEMCONFIG4_RFSHVAL1_SHIFT 8
#define TX39_MEMCONFIG4_RFSHVAL1_MASK 0x3f
#define TX39_MEMCONFIG4_RFSHVAL1(cr) \
(((cr) >> TX39_MEMCONFIG4_RFSHVAL1_SHIFT) & \
#define TX39_MEMCONFIG4_RFSHVAL1(cr) \
(((cr) >> TX39_MEMCONFIG4_RFSHVAL1_SHIFT) & \
TX39_MEMCONFIG4_RFSHVAL1_MASK)
#define TX39_MEMCONFIG4_RFSHVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL1_SHIFT) & \
#define TX39_MEMCONFIG4_RFSHVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL1_SHIFT) & \
(TX39_MEMCONFIG4_RFSHVAL1_MASK << TX39_MEMCONFIG4_RFSHVAL1_SHIFT)))
#define TX39_MEMCONFIG4_RFSHVAL0_SHIFT 0
#define TX39_MEMCONFIG4_RFSHVAL0_MASK 0x3f
#define TX39_MEMCONFIG4_RFSHVAL0(cr) \
(((cr) >> TX39_MEMCONFIG4_RFSHVAL0_SHIFT) & \
#define TX39_MEMCONFIG4_RFSHVAL0(cr) \
(((cr) >> TX39_MEMCONFIG4_RFSHVAL0_SHIFT) & \
TX39_MEMCONFIG4_RFSHVAL0_MASK)
#define TX39_MEMCONFIG4_RFSHVAL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL0_SHIFT) & \
#define TX39_MEMCONFIG4_RFSHVAL0_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL0_SHIFT) & \
(TX39_MEMCONFIG4_RFSHVAL0_MASK << TX39_MEMCONFIG4_RFSHVAL0_SHIFT)))
/*
@ -452,20 +475,20 @@
/* Address remap region 2 */
#define TX39_MEMCONFIG5_STARTVAL2_SHIFT 9
#define TX39_MEMCONFIG5_STARTVAL2_MASK 0x007fffff
#define TX39_MEMCONFIG5_STARTVAL2(cr) \
(((cr) >> TX39_MEMCONFIG5_STARTVAL2_SHIFT) & \
#define TX39_MEMCONFIG5_STARTVAL2(cr) \
(((cr) >> TX39_MEMCONFIG5_STARTVAL2_SHIFT) & \
TX39_MEMCONFIG5_STARTVAL2_MASK)
#define TX39_MEMCONFIG5_STARTVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG5_STARTVAL2_SHIFT) & \
#define TX39_MEMCONFIG5_STARTVAL2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG5_STARTVAL2_SHIFT) & \
(TX39_MEMCONFIG5_STARTVAL2_MASK << TX39_MEMCONFIG5_STARTVAL2_SHIFT)))
#define TX39_MEMCONFIG5_MASK2_SHIFT 0
#define TX39_MEMCONFIG5_MASK2_MASK 0xf
#define TX39_MEMCONFIG5_MASK2(cr) \
(((cr) >> TX39_MEMCONFIG5_MASK2_SHIFT) & \
#define TX39_MEMCONFIG5_MASK2(cr) \
(((cr) >> TX39_MEMCONFIG5_MASK2_SHIFT) & \
TX39_MEMCONFIG5_MASK2_MASK)
#define TX39_MEMCONFIG5_MASK2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG5_MASK2_SHIFT) & \
#define TX39_MEMCONFIG5_MASK2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG5_MASK2_SHIFT) & \
(TX39_MEMCONFIG5_MASK2_MASK << TX39_MEMCONFIG5_MASK2_SHIFT)))
/*
@ -474,20 +497,20 @@
/* Address remap region 1 */
#define TX39_MEMCONFIG6_STARTVAL1_SHIFT 9
#define TX39_MEMCONFIG6_STARTVAL1_MASK 0x007fffff
#define TX39_MEMCONFIG6_STARTVAL1(cr) \
(((cr) >> TX39_MEMCONFIG6_STARTVAL1_SHIFT) & \
#define TX39_MEMCONFIG6_STARTVAL1(cr) \
(((cr) >> TX39_MEMCONFIG6_STARTVAL1_SHIFT) & \
TX39_MEMCONFIG6_STARTVAL1_MASK)
#define TX39_MEMCONFIG6_STARTVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG6_STARTVAL1_SHIFT) & \
#define TX39_MEMCONFIG6_STARTVAL1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG6_STARTVAL1_SHIFT) & \
(TX39_MEMCONFIG6_STARTVAL1_MASK << TX39_MEMCONFIG6_STARTVAL1_SHIFT)))
#define TX39_MEMCONFIG6_MASK1_SHIFT 0
#define TX39_MEMCONFIG6_MASK1_MASK 0xf
#define TX39_MEMCONFIG6_MASK1(cr) \
(((cr) >> TX39_MEMCONFIG6_MASK1_SHIFT) & \
#define TX39_MEMCONFIG6_MASK1(cr) \
(((cr) >> TX39_MEMCONFIG6_MASK1_SHIFT) & \
TX39_MEMCONFIG6_MASK1_MASK)
#define TX39_MEMCONFIG6_MASK1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG6_MASK1_SHIFT) & \
#define TX39_MEMCONFIG6_MASK1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG6_MASK1_SHIFT) & \
(TX39_MEMCONFIG6_MASK1_MASK << TX39_MEMCONFIG6_MASK1_SHIFT)))
/*
@ -496,11 +519,11 @@
/* Address remap region 2 */
#define TX39_MEMCONFIG7_RMAPADD2_SHIFT 9
#define TX39_MEMCONFIG7_RMAPADD2_MASK 0x007fffff
#define TX39_MEMCONFIG7_RMAPADD2(cr) \
(((cr) >> TX39_MEMCONFIG7_RMAPADD2_SHIFT) & \
#define TX39_MEMCONFIG7_RMAPADD2(cr) \
(((cr) >> TX39_MEMCONFIG7_RMAPADD2_SHIFT) & \
TX39_MEMCONFIG7_RMAPADD2_MASK)
#define TX39_MEMCONFIG7_RMAPADD2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG7_RMAPADD2_SHIFT) & \
#define TX39_MEMCONFIG7_RMAPADD2_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG7_RMAPADD2_SHIFT) & \
(TX39_MEMCONFIG7_RMAPADD2_MASK << TX39_MEMCONFIG7_RMAPADD2_SHIFT)))
/*
@ -509,9 +532,9 @@
/* Address remap region 1 */
#define TX39_MEMCONFIG8_RMAPADD1_SHIFT 9
#define TX39_MEMCONFIG8_RMAPADD1_MASK 0x007fffff
#define TX39_MEMCONFIG8_RMAPADD1(cr) \
(((cr) >> TX39_MEMCONFIG8_RMAPADD1_SHIFT) & \
#define TX39_MEMCONFIG8_RMAPADD1(cr) \
(((cr) >> TX39_MEMCONFIG8_RMAPADD1_SHIFT) & \
TX39_MEMCONFIG8_RMAPADD1_MASK)
#define TX39_MEMCONFIG8_RMAPADD1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG8_RMAPADD1_SHIFT) & \
#define TX39_MEMCONFIG8_RMAPADD1_SET(cr, val) \
((cr) | (((val) << TX39_MEMCONFIG8_RMAPADD1_SHIFT) & \
(TX39_MEMCONFIG8_RMAPADD1_MASK << TX39_MEMCONFIG8_RMAPADD1_SHIFT)))

44
sys/arch/hpcmips/tx/tx39biuvar.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39biuvar.h,v 1.1 1999/11/20 19:56:32 uch Exp $ */
/* $NetBSD: tx39biuvar.h,v 1.2 2001/06/14 11:09:55 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#define TX39_MAXCS 12

10
sys/arch/hpcmips/tx/tx39clock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39clock.c,v 1.8 2000/10/22 10:42:32 uch Exp $ */
/* $NetBSD: tx39clock.c,v 1.9 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -106,7 +106,7 @@ struct cfattach tx39clock_ca = {
int
tx39clock_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_FIRST;
return (ATTACH_FIRST);
}
void
@ -198,7 +198,7 @@ __inline__ time_t
__tx39timer_rtc2sec(struct txtime *t)
{
/* This rely on RTC is 32.768kHz */
return (t->t_lo >> 15) | (t->t_hi << 17);
return ((t->t_lo >> 15) | (t->t_hi << 17));
}
__inline__ void
@ -287,7 +287,7 @@ tx39clock_get(struct device *dev, time_t base, struct clocktime *ct)
if (!sc->sc_enabled) {
DPRINTF(("bootstrap: %d sec from previous reboot\n",
(int)sec));
(int)sec));
sc->sc_enabled = 1;
base += sec;
@ -333,7 +333,7 @@ tx39clock_alarm_set(tx_chipset_tag_t tc, int msec)
sc->sc_alarm = TX39_MSEC2RTC(msec);
tx39clock_alarm_refill(tc);
return 0;
return (0);
}
void

183
sys/arch/hpcmips/tx/tx39icu.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39icu.c,v 1.11 2001/05/09 11:57:05 shin Exp $ */
/* $NetBSD: tx39icu.c,v 1.12 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -132,7 +132,7 @@ static const struct irqhigh_list {
struct txintr_high_entry {
int he_set;
txreg_t he_mask;
int (*he_fun) __P((void*));
int (*he_fun)(void *);
void *he_arg;
TAILQ_ENTRY(txintr_high_entry) he_link;
};
@ -141,11 +141,11 @@ struct txintr_high_entry {
struct txpoll_entry{
int p_cnt; /* dispatch interval */
int p_desc;
int (*p_fun) __P((void*));
int (*p_fun)(void *);
void *p_arg;
TAILQ_ENTRY(txpoll_entry) p_link;
};
int tx39_poll_intr __P((void*));
int tx39_poll_intr(void *);
#endif /* USE_POLL */
struct tx39icu_softc {
@ -153,7 +153,7 @@ struct tx39icu_softc {
tx_chipset_tag_t sc_tc;
/* IRQLOW */
txreg_t sc_le_mask[TX39_INTRSET_MAX + 1];
int (*sc_le_fun[TX39_INTRSET_MAX + 1][32]) __P((void*));
int (*sc_le_fun[TX39_INTRSET_MAX + 1][32])(void *);
void *sc_le_arg[TX39_INTRSET_MAX + 1][32];
/* IRQHIGH */
TAILQ_HEAD(, txintr_high_entry) sc_he_head[TX39_IRQHIGH_MAX];
@ -167,39 +167,33 @@ struct tx39icu_softc {
#endif /* USE_POLL */
};
int tx39icu_match __P((struct device*, struct cfdata*, void*));
void tx39icu_attach __P((struct device*, struct device*, void*));
int tx39icu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
int tx39icu_match(struct device *, struct cfdata *, void *);
void tx39icu_attach(struct device *, struct device *, void *);
int tx39icu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
void tx39_intr_dump __P((struct tx39icu_softc*));
void tx39_intr_decode __P((int, int*, int*));
void tx39_irqhigh_disestablish __P((tx_chipset_tag_t, int, int, int));
void tx39_irqhigh_establish __P((tx_chipset_tag_t, int, int, int,
int (*) __P((void*)), void*));
void tx39_irqhigh_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
int tx39_irqhigh __P((int, int));
void tx39_intr_dump(struct tx39icu_softc *);
void tx39_intr_decode(int, int *, int *);
void tx39_irqhigh_disestablish(tx_chipset_tag_t, int, int, int);
void tx39_irqhigh_establish(tx_chipset_tag_t, int, int, int,
int (*)(void *), void *);
void tx39_irqhigh_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
int tx39_irqhigh(int, int);
struct cfattach tx39icu_ca = {
sizeof(struct tx39icu_softc), tx39icu_match, tx39icu_attach
sizeof(struct tx39icu_softc), tx39icu_match, tx39icu_attach
};
int
tx39icu_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
tx39icu_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_FIRST;
return (ATTACH_FIRST);
}
void
tx39icu_attach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
tx39icu_attach(struct device *parent, struct device *self, void *aux)
{
struct txsim_attach_args *ta = aux;
struct tx39icu_softc *sc = (void*)self;
struct tx39icu_softc *sc = (void *)self;
tx_chipset_tag_t tc = ta->ta_tc;
txreg_t reg, *regs;
int i;
@ -245,20 +239,20 @@ tx39icu_attach(parent, self, aux)
/* Clear all pending interrupts */
tx_conf_write(tc, TX39_INTRCLEAR1_REG,
tx_conf_read(tc, TX39_INTRSTATUS1_REG));
tx_conf_read(tc, TX39_INTRSTATUS1_REG));
tx_conf_write(tc, TX39_INTRCLEAR2_REG,
tx_conf_read(tc, TX39_INTRSTATUS2_REG));
tx_conf_read(tc, TX39_INTRSTATUS2_REG));
tx_conf_write(tc, TX39_INTRCLEAR3_REG,
tx_conf_read(tc, TX39_INTRSTATUS3_REG));
tx_conf_read(tc, TX39_INTRSTATUS3_REG));
tx_conf_write(tc, TX39_INTRCLEAR4_REG,
tx_conf_read(tc, TX39_INTRSTATUS4_REG));
tx_conf_read(tc, TX39_INTRSTATUS4_REG));
tx_conf_write(tc, TX39_INTRCLEAR5_REG,
tx_conf_read(tc, TX39_INTRSTATUS5_REG));
tx_conf_read(tc, TX39_INTRSTATUS5_REG));
#ifdef TX392X
tx_conf_write(tc, TX39_INTRCLEAR7_REG,
tx_conf_read(tc, TX39_INTRSTATUS7_REG));
tx_conf_read(tc, TX39_INTRSTATUS7_REG));
tx_conf_write(tc, TX39_INTRCLEAR8_REG,
tx_conf_read(tc, TX39_INTRSTATUS8_REG));
tx_conf_read(tc, TX39_INTRSTATUS8_REG));
#endif /* TX392X */
/* Enable global interrupts */
@ -280,8 +274,8 @@ tx39icu_attach(parent, self, aux)
}
int
tx39icu_intr(status, cause, pc, ipending)
u_int32_t status, cause, pc, ipending;
tx39icu_intr(u_int32_t status, u_int32_t cause, u_int32_t pc,
u_int32_t ipending)
{
struct tx39icu_softc *sc;
tx_chipset_tag_t tc;
@ -321,7 +315,7 @@ tx39icu_intr(status, cause, pc, ipending)
if (ipending & MIPS_INT_MASK_4) {
tx39_irqhigh_intr(ipending, pc, status, cause);
return 0;
return (0);
}
/* IRQLOW */
@ -345,11 +339,11 @@ tx39icu_intr(status, cause, pc, ipending)
tx39intrvec = (i << 16) | j;
if (tx39debugflag) {
DPRINTF(("IRQLOW %d:%d\n",
i, j));
i, j));
}
#endif /* TX39_DEBUG */
(*sc->sc_le_fun[i][j])
(sc->sc_le_arg[i][j]);
(sc->sc_le_arg[i][j]);
}
}
@ -365,7 +359,7 @@ tx39icu_intr(status, cause, pc, ipending)
}
#ifdef TX39_WATCHDOGTIMER
{
extern int tx39biu_intr __P((void*));
extern int tx39biu_intr(void *);
/* Bus error (If watch dog timer is enabled)*/
if (ipending & MIPS_INT_MASK_1) {
tx39biu_intr(0); /* Clear bus error */
@ -382,8 +376,7 @@ tx39icu_intr(status, cause, pc, ipending)
}
int
tx39_irqhigh(set, bit)
int set, bit;
tx39_irqhigh(int set, int bit)
{
int i, n;
@ -391,18 +384,15 @@ tx39_irqhigh(set, bit)
for (i = 0; i < n; i++) {
if (irqhigh_list[i].qh_set == set &&
irqhigh_list[i].qh_bit == bit)
return irqhigh_list[i].qh_pri;
return (irqhigh_list[i].qh_pri);
}
return 0;
return (0);
}
void
tx39_irqhigh_intr(ipending, pc, status, cause)
u_int32_t ipending;
u_int32_t pc;
u_int32_t status;
u_int32_t cause;
tx39_irqhigh_intr(u_int32_t ipending, u_int32_t pc, u_int32_t status,
u_int32_t cause)
{
struct txintr_high_entry *he;
struct tx39icu_softc *sc;
@ -417,7 +407,7 @@ tx39_irqhigh_intr(ipending, pc, status, cause)
if (pri == TX39_INTRPRI13_TIMER_PERIODIC) {
tx_conf_write(tc, TX39_INTRCLEAR5_REG,
TX39_INTRSTATUS5_PERINT);
TX39_INTRSTATUS5_PERINT);
cf.pc = pc;
cf.sr = status;
hardclock(&cf);
@ -437,10 +427,10 @@ tx39_irqhigh_intr(ipending, pc, status, cause)
tx_conf_write(tc, ofs, he_mask);
#ifdef TX39_DEBUG
tx39intrvec = (set << 16) |
(ffs(he_mask) - 1);
(ffs(he_mask) - 1);
if (tx39debugflag) {
DPRINTF(("IRQHIGH: %d:%d\n",
set, ffs(he_mask) - 1));
set, ffs(he_mask) - 1));
}
#endif /* TX39_DEBUG */
/* Dispatch handler */
@ -451,16 +441,13 @@ tx39_irqhigh_intr(ipending, pc, status, cause)
}
void
tx39_intr_decode(intr, set, bit)
int intr;
int *set;
int *bit;
tx39_intr_decode(int intr, int *set, int *bit)
{
if (!intr || intr >= (TX39_INTRSET_MAX + 1) * 32
#ifdef TX392X
|| intr == 6
#endif /* TX392X */
) {
) {
panic("tx39icu_decode: bogus intrrupt line. %d", intr);
}
*set = intr / 32;
@ -468,13 +455,8 @@ tx39_intr_decode(intr, set, bit)
}
void
tx39_irqhigh_establish(tc, set, bit, pri, ih_fun, ih_arg)
tx_chipset_tag_t tc;
int set;
int bit;
int pri;
int (*ih_fun) __P((void*));
void *ih_arg;
tx39_irqhigh_establish(tx_chipset_tag_t tc, int set, int bit, int pri,
int (*ih_fun)(void *), void *ih_arg)
{
struct tx39icu_softc *sc;
struct txintr_high_entry *he;
@ -485,7 +467,7 @@ tx39_irqhigh_establish(tc, set, bit, pri, ih_fun, ih_arg)
* Add new entry to `pri' priority
*/
if (!(he = malloc(sizeof(struct txintr_high_entry),
M_DEVBUF, M_NOWAIT))) {
M_DEVBUF, M_NOWAIT))) {
panic ("tx39_irqhigh_establish: no memory.");
}
memset(he, 0, sizeof(struct txintr_high_entry));
@ -503,9 +485,7 @@ tx39_irqhigh_establish(tc, set, bit, pri, ih_fun, ih_arg)
}
void
tx39_irqhigh_disestablish(tc, set, bit, pri)
tx_chipset_tag_t tc;
int set, bit, pri;
tx39_irqhigh_disestablish(tx_chipset_tag_t tc, int set, int bit, int pri)
{
struct tx39icu_softc *sc;
struct txintr_high_entry *he;
@ -528,14 +508,9 @@ tx39_irqhigh_disestablish(tc, set, bit, pri)
}
void*
tx_intr_establish(tc, line, mode, level, ih_fun, ih_arg)
tx_chipset_tag_t tc;
int line;
int mode; /* Trigger setting. but TX39 handles edge only. */
int level; /* XXX not yet */
int (*ih_fun) __P((void*));
void *ih_arg;
void *
tx_intr_establish(tx_chipset_tag_t tc, int line, int mode, int level,
int (*ih_fun)(void *), void *ih_arg)
{
struct tx39icu_softc *sc;
txreg_t reg;
@ -551,7 +526,7 @@ tx_intr_establish(tc, line, mode, level, ih_fun, ih_arg)
if ((highpri = tx39_irqhigh(set, bit))) {
tx39_irqhigh_establish(tc, set, bit, highpri,
ih_fun, ih_arg);
ih_fun, ih_arg);
DPRINTF(("(high)\n"));
} else {
/* Set mask for acknowledge. */
@ -564,13 +539,11 @@ tx_intr_establish(tc, line, mode, level, ih_fun, ih_arg)
DPRINTF(("(low)\n"));
}
return (void*)line;
return ((void *)line);
}
void
tx_intr_disestablish(tc, arg)
tx_chipset_tag_t tc;
void *arg;
tx_intr_disestablish(tx_chipset_tag_t tc, void *arg)
{
struct tx39icu_softc *sc;
int set, bit, highpri, ofs;
@ -597,9 +570,7 @@ tx_intr_disestablish(tc, arg)
}
u_int32_t
tx_intr_status(tc, r)
tx_chipset_tag_t tc;
int r;
tx_intr_status(tx_chipset_tag_t tc, int r)
{
struct tx39icu_softc *sc = tc->tc_intrt;
@ -610,13 +581,9 @@ tx_intr_status(tc, r)
}
#ifdef USE_POLL
void*
tx39_poll_establish(tc, interval, level, ih_fun, ih_arg)
tx_chipset_tag_t tc;
int interval;
int level; /* XXX not yet */
int (*ih_fun) __P((void*));
void *ih_arg;
void *
tx39_poll_establish(tx_chipset_tag_t tc, int interval, int level,
int (*ih_fun)(void *), void *ih_arg)
{
struct tx39icu_softc *sc;
struct txpoll_entry *p;
@ -627,7 +594,7 @@ tx39_poll_establish(tc, interval, level, ih_fun, ih_arg)
sc = tc->tc_intrt;
if (!(p = malloc(sizeof(struct txpoll_entry),
M_DEVBUF, M_NOWAIT))) {
M_DEVBUF, M_NOWAIT))) {
panic ("tx39_poll_establish: no memory.");
}
memset(p, 0, sizeof(struct txpoll_entry));
@ -640,29 +607,27 @@ tx39_poll_establish(tc, interval, level, ih_fun, ih_arg)
tx39clock_alarm_set(tc, 33); /* 33 msec */
if (!(sc->sc_poll_ih =
tx_intr_establish(
tc, MAKEINTR(5, TX39_INTRSTATUS5_ALARMINT),
IST_EDGE, level, tx39_poll_intr, sc))) {
tx_intr_establish(
tc, MAKEINTR(5, TX39_INTRSTATUS5_ALARMINT),
IST_EDGE, level, tx39_poll_intr, sc))) {
printf("tx39_poll_establish: can't hook\n");
splx(s);
return 0;
return (0);
}
}
sc->sc_polling++;
p->p_desc = sc->sc_polling;
TAILQ_INSERT_TAIL(&sc->sc_p_head, p, p_link);
ret = (void*)p->p_desc;
ret = (void *)p->p_desc;
splx(s);
return ret;
return (ret);
}
void
tx39_poll_disestablish(tc, arg)
tx_chipset_tag_t tc;
void *arg;
tx39_poll_disestablish(tx_chipset_tag_t tc, void *arg)
{
struct tx39icu_softc *sc;
struct txpoll_entry *p;
@ -690,8 +655,7 @@ tx39_poll_disestablish(tc, arg)
}
int
tx39_poll_intr(arg)
void *arg;
tx39_poll_intr(void *arg)
{
struct tx39icu_softc *sc = arg;
struct txpoll_entry *p;
@ -699,7 +663,7 @@ tx39_poll_intr(arg)
tx39clock_alarm_refill(sc->sc_tc);
if (!sc->sc_polling) {
return 0;
return (0);
}
sc->sc_pollcnt++;
TAILQ_FOREACH(p, &sc->sc_p_head, p_link) {
@ -709,7 +673,7 @@ tx39_poll_intr(arg)
}
}
return 0;
return (0);
disestablish:
TAILQ_REMOVE(&sc->sc_p_head, p, p_link);
@ -719,13 +683,12 @@ tx39_poll_intr(arg)
tx_intr_disestablish(sc->sc_tc, sc->sc_poll_ih);
}
return 0;
return (0);
}
#endif /* USE_POLL */
void
tx39_intr_dump(sc)
struct tx39icu_softc *sc;
tx39_intr_dump(struct tx39icu_softc *sc)
{
tx_chipset_tag_t tc = sc->sc_tc;
int i, j, ofs;
@ -753,9 +716,9 @@ tx39_intr_dump(sc)
}
reg = sc->sc_regs[0];
printf("<%s><%s> vector=%2d\t\t[6 status]\n",
reg & TX39_INTRSTATUS6_IRQHIGH ? "HI" : "--",
reg & TX39_INTRSTATUS6_IRQLOW ? "LO" : "--",
TX39_INTRSTATUS6_INTVECT(reg));
reg & TX39_INTRSTATUS6_IRQHIGH ? "HI" : "--",
reg & TX39_INTRSTATUS6_IRQLOW ? "LO" : "--",
TX39_INTRSTATUS6_INTVECT(reg));
reg = tx_conf_read(tc, TX39_INTRENABLE6_REG);
__bitdisp(reg, 0, 18, "6 enable", 1);

111
sys/arch/hpcmips/tx/tx39icureg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39icureg.h,v 1.3 2000/10/04 13:53:56 uch Exp $ */
/* $NetBSD: tx39icureg.h,v 1.4 2001/06/14 11:09:55 uch Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -62,8 +62,8 @@
#define TX39_INTRSTATUS_REG(x) (((x) - 1) * 4 + TX39_INTRSTATUS1_REG)
#endif /* TX391X */
#ifdef TX392X
#define TX39_INTRSTATUS_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRSTATUS1_REG) : \
#define TX39_INTRSTATUS_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRSTATUS1_REG) : \
(((x) - 7) * 8 + TX39_INTRSTATUS7_REG))
#endif /* TX392X */
@ -81,8 +81,8 @@
#define TX39_INTRCLEAR_REG(x) (((x) - 1) * 4 + TX39_INTRCLEAR1_REG)
#endif /* TX391X */
#ifdef TX392X
#define TX39_INTRCLEAR_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRCLEAR1_REG) : \
#define TX39_INTRCLEAR_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRCLEAR1_REG) : \
(((x) - 7) * 8 + TX39_INTRCLEAR7_REG))
#endif /* TX392X */
@ -101,8 +101,8 @@
#define TX39_INTRENABLE_REG(x) (((x) - 1) * 4 + TX39_INTRENABLE1_REG)
#endif /* TX391X */
#ifdef TX392X
#define TX39_INTRENABLE_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRENABLE1_REG) : \
#define TX39_INTRENABLE_REG(x) (((x) <= 6) ? \
(((x) - 1) * 4 + TX39_INTRENABLE1_REG) : \
(((x) - 7) * 8 + TX39_INTRENABLE7_REG))
#endif /* TX392X */
/*
@ -177,35 +177,35 @@
#define TX39_INTRSTATUS2_UARTBDMAFULLINT 0x00002000
#define TX39_INTRSTATUS2_UARTBDMAHALFINT 0x00001000
#define TX39_INTRSTATUS2_UARTRXINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBRXINT : \
#define TX39_INTRSTATUS2_UARTRXINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBRXINT : \
TX39_INTRSTATUS2_UARTARXINT)
#define TX39_INTRSTATUS2_UARTRXOVERRUNINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBRXOVERRUNINT : \
#define TX39_INTRSTATUS2_UARTRXOVERRUNINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBRXOVERRUNINT : \
TX39_INTRSTATUS2_UARTARXOVERRUNINT)
#define TX39_INTRSTATUS2_UARTFRAMEERRINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBFRAMEERRINT : \
#define TX39_INTRSTATUS2_UARTFRAMEERRINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBFRAMEERRINT : \
TX39_INTRSTATUS2_UARTAFRAMEERRINT)
#define TX39_INTRSTATUS2_UARTBREAKINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBBREAKINT : \
#define TX39_INTRSTATUS2_UARTBREAKINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBBREAKINT : \
TX39_INTRSTATUS2_UARTABREAKINT)
#define TX39_INTRSTATUS2_UARTPARITYERRINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBPARITYERRINT : \
#define TX39_INTRSTATUS2_UARTPARITYERRINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBPARITYERRINT : \
TX39_INTRSTATUS2_UARTAPARITYERRINT)
#define TX39_INTRSTATUS2_UARTTXINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBTXINT : \
#define TX39_INTRSTATUS2_UARTTXINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBTXINT : \
TX39_INTRSTATUS2_UARTATXINT)
#define TX39_INTRSTATUS2_UARTTXOVERRUNINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBTXOVERRUNINT : \
#define TX39_INTRSTATUS2_UARTTXOVERRUNINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBTXOVERRUNINT : \
TX39_INTRSTATUS2_UARTATXOVERRUNINT)
#define TX39_INTRSTATUS2_UARTEMPTYINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBEMPTYINT : \
#define TX39_INTRSTATUS2_UARTEMPTYINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBEMPTYINT : \
TX39_INTRSTATUS2_UARTEMPTYINT)
#define TX39_INTRSTATUS2_UARTDMAFULLINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBDMAFULLINT : \
#define TX39_INTRSTATUS2_UARTDMAFULLINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBDMAFULLINT : \
TX39_INTRSTATUS2_UARTADMAFULLINT)
#define TX39_INTRSTATUS2_UARTDMAHALFINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBDMAHALFINT : \
#define TX39_INTRSTATUS2_UARTDMAHALFINT(x) \
((x) ? TX39_INTRSTATUS2_UARTBDMAHALFINT : \
TX39_INTRSTATUS2_UARTADMAHALFINT)
#ifdef TX391X
@ -351,20 +351,20 @@
#define TX39_INTRSTATUS5_IOPOSINT_SHIFT 7
#define TX39_INTRSTATUS5_IOPOSINT_MASK 0x7f
#define TX39_INTRSTATUS5_IOPOSINT(cr) \
(((cr) >> TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
#define TX39_INTRSTATUS5_IOPOSINT(cr) \
(((cr) >> TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
TX39_INTRSTATUS5_IOPOSINT_MASK)
#define TX39_INTRSTATUS5_IOPOSINT_SET(cr, val) \
((cr) | (((val) << TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
#define TX39_INTRSTATUS5_IOPOSINT_SET(cr, val) \
((cr) | (((val) << TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \
(TX39_INTRSTATUS5_IOPOSINT_MASK << TX39_INTRSTATUS5_IOPOSINT_SHIFT)))
#define TX39_INTRSTATUS5_IONEGINT_SHIFT 0
#define TX39_INTRSTATUS5_IONEGINT_MASK 0x7f
#define TX39_INTRSTATUS5_IONEGINT(cr) \
(((cr) >> TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
#define TX39_INTRSTATUS5_IONEGINT(cr) \
(((cr) >> TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
TX39_INTRSTATUS5_IONEGINT_MASK)
#define TX39_INTRSTATUS5_IONEGINT_SET(cr, val) \
((cr) | (((val) << TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
#define TX39_INTRSTATUS5_IONEGINT_SET(cr, val) \
((cr) | (((val) << TX39_INTRSTATUS5_IONEGINT_SHIFT) & \
(TX39_INTRSTATUS5_IONEGINT_MASK << TX39_INTRSTATUS5_IONEGINT_SHIFT)))
#endif /* TX391X */
/*
@ -374,10 +374,10 @@
#define TX39_INTRSTATUS6_IRQHIGH 0x80000000
#define TX39_INTRSTATUS6_IRQLOW 0x40000000
#define TX39_INTRSTATUS6_INTVECT_SHIFT 2
#define TX39_INTRSTATUS6_INTVECT_SHIFT 2
#define TX39_INTRSTATUS6_INTVECT_MASK 0xf
#define TX39_INTRSTATUS6_INTVECT(cr) \
(((cr) >> TX39_INTRSTATUS6_INTVECT_SHIFT) & \
#define TX39_INTRSTATUS6_INTVECT(cr) \
(((cr) >> TX39_INTRSTATUS6_INTVECT_SHIFT) & \
TX39_INTRSTATUS6_INTVECT_MASK)
/*
@ -388,12 +388,13 @@
#define TX39_INTRENABLE6_PRIORITYMASK_SHIFT 0
#define TX39_INTRENABLE6_PRIORITYMASK_MASK 0xffff
#define TX39_INTRENABLE6_PRIORITYMASK(cr) \
(((cr) >> TX39_INTRENABLE6_PRIORITYMASK_SHIFT) & \
#define TX39_INTRENABLE6_PRIORITYMASK(cr) \
(((cr) >> TX39_INTRENABLE6_PRIORITYMASK_SHIFT) & \
TX39_INTRENABLE6_PRIORITYMASK_MASK)
#define TX39_INTRENABLE6_PRIORITYMASK_SET(cr, val) \
((cr) | (((val) << TX39_INTRENABLE6_PRIORITYMASK_SHIFT) & \
(TX39_INTRENABLE6_PRIORITYMASK_MASK << TX39_INTRENABLE6_PRIORITYMASK_SHIFT)))
#define TX39_INTRENABLE6_PRIORITYMASK_SET(cr, val) \
((cr) | (((val) << TX39_INTRENABLE6_PRIORITYMASK_SHIFT) & \
(TX39_INTRENABLE6_PRIORITYMASK_MASK << \
TX39_INTRENABLE6_PRIORITYMASK_SHIFT)))
#ifdef TX392X
/*
@ -443,26 +444,26 @@
#define TX3922_INTRSTATUS8_IOPOSINT_SHIFT 16
#define TX3922_INTRSTATUS8_IOPOSINT_MASK 0xffff
#define TX3922_INTRSTATUS8_IOPOSINT(cr) \
(((cr) >> TX3922_INTRSTATUS8_IOPOSINT_SHIFT) & \
#define TX3922_INTRSTATUS8_IOPOSINT(cr) \
(((cr) >> TX3922_INTRSTATUS8_IOPOSINT_SHIFT) & \
TX3922_INTRSTATUS8_IOPOSINT_MASK)
#define TX3922_INTRSTATUS8_IOPOSINT_SET(cr, val) \
((cr) | (((val) << TX3922_INTRSTATUS8_IOPOSINT_SHIFT) & \
(TX3922_INTRSTATUS8_IOPOSINT_MASK << TX3922_INTRSTATUS8_IOPOSINT_SHIFT)))
#define TX3922_INTRSTATUS8_IOPOSINT_SET(cr, val) \
((cr) | (((val) << TX3922_INTRSTATUS8_IOPOSINT_SHIFT) & \
(TX3922_INTRSTATUS8_IOPOSINT_MASK << \
TX3922_INTRSTATUS8_IOPOSINT_SHIFT)))
#define TX3922_INTRSTATUS8_IONEGINT_SHIFT 0
#define TX3922_INTRSTATUS8_IONEGINT_MASK 0xffff
#define TX3922_INTRSTATUS8_IONEGINT(cr) \
(((cr) >> TX3922_INTRSTATUS8_IONEGINT_SHIFT) & \
#define TX3922_INTRSTATUS8_IONEGINT(cr) \
(((cr) >> TX3922_INTRSTATUS8_IONEGINT_SHIFT) & \
TX3922_INTRSTATUS8_IONEGINT_MASK)
#define TX3922_INTRSTATUS8_IONEGINT_SET(cr, val) \
((cr) | (((val) << TX3922_INTRSTATUS8_IONEGINT_SHIFT) & \
(TX3922_INTRSTATUS8_IONEGINT_MASK << TX3922_INTRSTATUS8_IONEGINT_SHIFT)))
#define TX3922_INTRSTATUS8_IONEGINT_SET(cr, val) \
((cr) | (((val) << TX3922_INTRSTATUS8_IONEGINT_SHIFT) & \
(TX3922_INTRSTATUS8_IONEGINT_MASK << \
TX3922_INTRSTATUS8_IONEGINT_SHIFT)))
#endif /* TX392X */
/*
* IRQHIGH (Priority level interrupt)
*/

10
sys/arch/hpcmips/tx/tx39io.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39io.c,v 1.8 2001/06/13 19:09:08 uch Exp $ */
/* $NetBSD: tx39io.c,v 1.9 2001/06/14 11:09:56 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -107,7 +107,7 @@ static void __print_port_status(struct tx39io_port_status *, int);
int
tx39io_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_FIRST; /* 1st attach group of txsim */
return (ATTACH_FIRST); /* 1st attach group of txsim */
}
void
@ -248,7 +248,7 @@ mfio_in(hpcio_chip_t arg, int port)
struct tx39io_softc *sc __attribute__((__unused__)) = arg->hc_sc ;
DPRINTF(("%s: port #%d\n", __FUNCTION__, port));
return tx_conf_read(sc->sc_tc, TX39_IOMFIODATAIN_REG) & (1 << port);
return (tx_conf_read(sc->sc_tc, TX39_IOMFIODATAIN_REG) & (1 << port));
}
static int
@ -294,7 +294,7 @@ tx391x_io_in(hpcio_chip_t arg, int port)
txreg_t reg = tx_conf_read(sc->sc_tc, TX39_IOCTRL_REG);
DPRINTF(("%s: port #%d\n", __FUNCTION__, port));
return TX391X_IOCTRL_IODIN(reg) & (1 << port);
return (TX391X_IOCTRL_IODIN(reg) & (1 << port));
}
void
@ -379,7 +379,7 @@ tx392x_io_in(hpcio_chip_t arg, int port)
DPRINTF(("%s: port #%d\n", __FUNCTION__, port));
return TX392X_IODATAINOUT_DIN(reg) & (1 << port);
return (TX392X_IODATAINOUT_DIN(reg) & (1 << port));
}
void

84
sys/arch/hpcmips/tx/tx39ir.c
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39ir.c,v 1.1 2000/01/13 17:53:35 uch Exp $ */
/* $NetBSD: tx39ir.c,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
@ -53,8 +63,8 @@ int tx39ir_debug = 1;
#define DPRINTF(arg)
#endif
int tx39ir_match __P((struct device*, struct cfdata*, void*));
void tx39ir_attach __P((struct device*, struct device*, void*));
int tx39ir_match(struct device *, struct cfdata *, void *);
void tx39ir_attach(struct device *, struct device *, void *);
struct tx39ir_softc {
struct device sc_dev;
@ -62,27 +72,21 @@ struct tx39ir_softc {
tx_chipset_tag_t sc_tc;
};
void tx39ir_dump __P((struct tx39ir_softc*));
int tx39ir_intr __P((void*));
static void tx39ir_dump(struct tx39ir_softc *);
static int tx39ir_intr(void *);
struct cfattach tx39ir_ca = {
sizeof(struct tx39ir_softc), tx39ir_match, tx39ir_attach
};
int
tx39ir_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
tx39ir_match(struct device *parent, struct cfdata *cf, void *aux)
{
return 1;
return (ATTACH_NORMAL);
}
void
tx39ir_attach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
tx39ir_attach(struct device *parent, struct device *self, void *aux)
{
struct txcom_attach_args *tca = aux;
struct tx39ir_softc *sc = (void*)self;
@ -109,11 +113,11 @@ tx39ir_attach(parent, self, aux)
#if not_required_yet
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
IST_EDGE, IPL_TTY, tx39ir_intr, sc);
#endif
#ifdef TX39IRDEBUG
@ -121,29 +125,27 @@ tx39ir_attach(parent, self, aux)
#endif
}
#define ISSETPRINT(r, m) __is_set_print((u_int32_t)(r), \
TX39_IRCTRL1_##m, #m)
void
tx39ir_dump(sc)
struct tx39ir_softc *sc;
tx39ir_dump(struct tx39ir_softc *sc)
{
tx_chipset_tag_t tc = sc->sc_tc;
txreg_t reg;
reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
#define ISSETPRINT(r, m) __is_set_print((u_int32_t)(r), \
TX39_IRCTRL1_##m, #m)
ISSETPRINT(reg, CARDET);
ISSETPRINT(reg, TESTIR);
ISSETPRINT(reg, DTINVERT);
ISSETPRINT(reg, RXPWR);
ISSETPRINT(reg, ENSTATE);
ISSETPRINT(reg, ENCOMSM);
#undef ISSETPRINT
printf("baudval %d\n", TX39_IRCTRL1_BAUDVAL(reg));
}
int
tx39ir_intr(arg)
void *arg;
tx39ir_intr(void *arg)
{
return 0;
return (0);
}

78
sys/arch/hpcmips/tx/tx39irreg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39irreg.h,v 1.1 2000/01/13 17:53:36 uch Exp $ */
/* $NetBSD: tx39irreg.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Toshiba TX3912 IR module
@ -40,13 +50,13 @@
#define TX39_IRCTRL1_BAUDVAL_SHIFT 16
#define TX39_IRCTRL1_BAUDVAL_MASK 0xff
#define TX39_IRCTRL1_BAUDVAL(cr) \
(((cr) >> TX39_IRCTRL1_BAUDVAL_SHIFT) & \
#define TX39_IRCTRL1_BAUDVAL(cr) \
(((cr) >> TX39_IRCTRL1_BAUDVAL_SHIFT) & \
TX39_IRCTRL1_BAUDVAL_MASK)
#define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \
#define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \
(TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT)))
#define TX39_IRCTRL1_BAUDVAL_CLR(cr) \
#define TX39_IRCTRL1_BAUDVAL_CLR(cr) \
((cr) &= ~(TX39_IRCTRL1_BAUDVAL_MASK << TX39_IRCTRL1_BAUDVAL_SHIFT))
#define TX39_IRCTRL1_TESTIR 0x00000010 /* don't set */
@ -63,10 +73,10 @@
*/
#define TX39_IRCTRL2_PER_SHIFT 24
#define TX39_IRCTRL2_PER_MASK 0xff
#define TX39_IRCTRL2_PER_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_PER_SHIFT) & \
#define TX39_IRCTRL2_PER_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_PER_SHIFT) & \
(TX39_IRCTRL2_PER_MASK << TX39_IRCTRL2_PER_SHIFT)))
#define TX39_IRCTRL2_PER_CLR(cr) \
#define TX39_IRCTRL2_PER_CLR(cr) \
((cr) &= ~(TX39_IRCTRL2_PER_MASK << TX39_IRCTRL2_PER_SHIFT))
/*
@ -74,10 +84,10 @@
*/
#define TX39_IRCTRL2_ONTIME_SHIFT 16
#define TX39_IRCTRL2_ONTIME_MASK 0xff
#define TX39_IRCTRL2_ONTIME_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_ONTIME_SHIFT) & \
#define TX39_IRCTRL2_ONTIME_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_ONTIME_SHIFT) & \
(TX39_IRCTRL2_ONTIME_MASK << TX39_IRCTRL2_ONTIME_SHIFT)))
#define TX39_IRCTRL2_ONTIME_CLR(cr) \
#define TX39_IRCTRL2_ONTIME_CLR(cr) \
((cr) &= ~(TX39_IRCTRL2_ONTIME_MASK << TX39_IRCTRL2_ONTIME_SHIFT))
/*
@ -85,10 +95,10 @@
*/
#define TX39_IRCTRL2_DELAYVAL_SHIFT 8
#define TX39_IRCTRL2_DELAYVAL_MASK 0xff
#define TX39_IRCTRL2_DELAYVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_DELAYVAL_SHIFT) & \
#define TX39_IRCTRL2_DELAYVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_DELAYVAL_SHIFT) & \
(TX39_IRCTRL2_DELAYVAL_MASK << TX39_IRCTRL2_DELAYVAL_SHIFT)))
#define TX39_IRCTRL2_DELAYVAL_CLR(cr) \
#define TX39_IRCTRL2_DELAYVAL_CLR(cr) \
((cr) &= ~(TX39_IRCTRL2_DELAYVAL_MASK << TX39_IRCTRL2_DELAYVAL_SHIFT))
/*
@ -96,8 +106,8 @@
*/
#define TX39_IRCTRL2_WAITVAL_SHIFT 0
#define TX39_IRCTRL2_WAITVAL_MASK 0xff
#define TX39_IRCTRL2_WAITVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_WAITVAL_SHIFT) & \
#define TX39_IRCTRL2_WAITVAL_SET(cr, val) \
((cr) | (((val) << TX39_IRCTRL2_WAITVAL_SHIFT) & \
(TX39_IRCTRL2_WAITVAL_MASK << TX39_IRCTRL2_WAITVAL_SHIFT)))
#define TX39_IRCTRL2_WAITVAL_CLR(cr) \
#define TX39_IRCTRL2_WAITVAL_CLR(cr) \
((cr) &= ~(TX39_IRCTRL2_WAITVAL_MASK << TX39_IRCTRL2_WAITVAL_SHIFT))

46
sys/arch/hpcmips/tx/tx39irvar.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39irvar.h,v 1.1 2000/01/13 17:53:36 uch Exp $ */
/* $NetBSD: tx39irvar.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
struct txcom_attach_args {
@ -31,4 +41,4 @@ struct txcom_attach_args {
struct device *tca_parent;
};
void txcom_pulse_mode __P((struct device*));
void txcom_pulse_mode(struct device *);

61
sys/arch/hpcmips/tx/tx39power.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39power.c,v 1.8 2000/10/22 10:42:32 uch Exp $ */
/* $NetBSD: tx39power.c,v 1.9 2001/06/14 11:09:56 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -96,7 +96,7 @@ static void __tx39power_dump(struct tx39power_softc *);
int
tx39power_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_FIRST;
return (ATTACH_FIRST);
}
void
@ -121,34 +121,34 @@ tx39power_attach(struct device *parent, struct device *self, void *aux)
/* enable stop timer */
reg = tx_conf_read(tc, TX39_POWERCTRL_REG);
reg &= ~(TX39_POWERCTRL_STPTIMERVAL_MASK <<
TX39_POWERCTRL_STPTIMERVAL_SHIFT);
TX39_POWERCTRL_STPTIMERVAL_SHIFT);
reg = TX39_POWERCTRL_STPTIMERVAL_SET(reg,
TX39_POWERCTRL_STPTIMERVAL_MAX);
TX39_POWERCTRL_STPTIMERVAL_MAX);
reg |= TX39_POWERCTRL_ENSTPTIMER;
tx_conf_write(tc, TX39_POWERCTRL_REG, reg);
/* install power event handler */
/* low priority */
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWRINT),
IST_EDGE, IPL_CLOCK,
tx39power_intr_p, sc);
IST_EDGE, IPL_CLOCK,
tx39power_intr_p, sc);
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWRINT),
IST_EDGE, IPL_CLOCK,
tx39power_intr_n, sc);
IST_EDGE, IPL_CLOCK,
tx39power_intr_n, sc);
/* high priority */
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSPWROKINT),
IST_EDGE, IPL_CLOCK,
tx39power_ok_intr_p, sc);
IST_EDGE, IPL_CLOCK,
tx39power_ok_intr_p, sc);
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGPWROKINT),
IST_EDGE, IPL_CLOCK,
tx39power_ok_intr_n, sc);
IST_EDGE, IPL_CLOCK,
tx39power_ok_intr_n, sc);
/* user driven event */
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSONBUTNINT),
IST_EDGE, IPL_CLOCK,
tx39power_button_intr_p, sc);
IST_EDGE, IPL_CLOCK,
tx39power_button_intr_p, sc);
tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGONBUTNINT),
IST_EDGE, IPL_CLOCK,
tx39power_button_intr_n, sc);
IST_EDGE, IPL_CLOCK,
tx39power_button_intr_n, sc);
}
void
@ -222,19 +222,21 @@ static int
tx39power_button_intr_p(void *arg)
{
config_hook_call(CONFIG_HOOK_BUTTONEVENT,
CONFIG_HOOK_BUTTONEVENT_POWER,
(void *)1 /* on */);
return 0;
CONFIG_HOOK_BUTTONEVENT_POWER,
(void *)1 /* on */);
return (0);
}
static int
tx39power_button_intr_n(void *arg)
{
config_hook_call(CONFIG_HOOK_BUTTONEVENT,
CONFIG_HOOK_BUTTONEVENT_POWER,
(void *)0 /* off */);
CONFIG_HOOK_BUTTONEVENT_POWER,
(void *)0 /* off */);
DUMP_REGS(arg);
return 0;
return (0);
}
int
@ -243,7 +245,8 @@ tx39power_intr_p(void *arg)
/* low priority event */
printf("power_p\n");
DUMP_REGS(arg);
return 0;
return (0);
}
static int
@ -252,7 +255,8 @@ tx39power_intr_n(void *arg)
/* low priority event */
printf("power_n\n");
DUMP_REGS(arg);
return 0;
return (0);
}
static int
@ -262,8 +266,9 @@ tx39power_ok_intr_p(void *arg)
printf("power NG\n");
DUMP_REGS(arg);
config_hook_call(CONFIG_HOOK_PMEVENT,
CONFIG_HOOK_PMEVENT_SUSPENDREQ, NULL);
return 0;
CONFIG_HOOK_PMEVENT_SUSPENDREQ, NULL);
return (0);
}
static int
@ -272,7 +277,8 @@ tx39power_ok_intr_n(void *arg)
/* high priority event */
printf("power OK\n");
DUMP_REGS(arg);
return 0;
return (0);
}
#ifdef TX39POWERDEBUG
@ -314,4 +320,3 @@ __tx39power_dump (struct tx39power_softc *sc)
printf("\n");
}
#endif /* TX39POWERDEBUG */

18
sys/arch/hpcmips/tx/tx39powerreg.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: tx39powerreg.h,v 1.3 2000/10/22 10:42:32 uch Exp $ */
/* $NetBSD: tx39powerreg.h,v 1.4 2001/06/14 11:09:56 uch Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -53,11 +53,11 @@
/* R/W */
#define TX39_POWERCTRL_VIDRF_SHIFT 27
#define TX39_POWERCTRL_VIDRF_MASK 0x3
#define TX39_POWERCTRL_VIDRF(cr) \
(((cr) >> TX39_POWERCTRL_VIDRF_SHIFT) & \
#define TX39_POWERCTRL_VIDRF(cr) \
(((cr) >> TX39_POWERCTRL_VIDRF_SHIFT) & \
TX39_POWERCTRL_VIDRF_MASK)
#define TX39_POWERCTRL_VIDRF_SET(cr, val) \
((cr) | (((val) << TX39_POWERCTRL_VIDRF_SHIFT) & \
#define TX39_POWERCTRL_VIDRF_SET(cr, val) \
((cr) | (((val) << TX39_POWERCTRL_VIDRF_SHIFT) & \
(TX39_POWERCTRL_VIDRF_MASK << TX39_POWERCTRL_VIDRF_SHIFT)))
#endif /* TX391X */
#ifdef TX392X
@ -71,11 +71,11 @@
#define TX39_POWERCTRL_STPTIMERVAL_SHIFT 12
#define TX39_POWERCTRL_STPTIMERVAL_MASK 0xf
#define TX39_POWERCTRL_STPTIMERVAL(cr) \
(((cr) >> TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
#define TX39_POWERCTRL_STPTIMERVAL(cr) \
(((cr) >> TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
TX39_POWERCTRL_STPTIMERVAL_MASK)
#define TX39_POWERCTRL_STPTIMERVAL_SET(cr, val) \
((cr) | (((val) << TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
#define TX39_POWERCTRL_STPTIMERVAL_SET(cr, val) \
((cr) | (((val) << TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \
(TX39_POWERCTRL_STPTIMERVAL_MASK << TX39_POWERCTRL_STPTIMERVAL_SHIFT)))
#define TX39_POWERCTRL_STPTIMERVAL_MIN 0x0
#define TX39_POWERCTRL_STPTIMERVAL_MAX 0xf

44
sys/arch/hpcmips/tx/tx39reg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39reg.h,v 1.1 1999/11/20 19:56:37 uch Exp $ */
/* $NetBSD: tx39reg.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*

140
sys/arch/hpcmips/tx/tx39sib.c
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39sib.c,v 1.7 2000/10/22 10:42:32 uch Exp $ */
/* $NetBSD: tx39sib.c,v 1.8 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
@ -53,10 +63,10 @@ int tx39sibdebug = 0;
#define DPRINTF(arg)
#endif
int tx39sib_match __P((struct device*, struct cfdata*, void*));
void tx39sib_attach __P((struct device*, struct device*, void*));
int tx39sib_print __P((void*, const char*));
int tx39sib_search __P((struct device*, struct cfdata*, void*));
int tx39sib_match(struct device *, struct cfdata *, void *);
void tx39sib_attach(struct device *, struct device *, void *);
int tx39sib_print(void *, const char *);
int tx39sib_search(struct device *, struct cfdata *, void *);
#define TX39_CLK2X 18432000
const int sibsclk_divide_table[8] = {
@ -123,9 +133,9 @@ struct tx39sib_softc {
int sc_attached;
};
__inline int __txsibsf0_ready __P((tx_chipset_tag_t));
__inline int __txsibsf0_ready(tx_chipset_tag_t);
#ifdef TX39SIBDEBUG
void tx39sib_dump __P((struct tx39sib_softc*));
void tx39sib_dump(struct tx39sib_softc *);
#endif
struct cfattach tx39sib_ca = {
@ -133,19 +143,13 @@ struct cfattach tx39sib_ca = {
};
int
tx39sib_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
tx39sib_match(struct device *parent, struct cfdata *cf, void *aux)
{
return ATTACH_FIRST;
return (ATTACH_FIRST);
}
void
tx39sib_attach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
tx39sib_attach(struct device *parent, struct device *self, void *aux)
{
struct txsim_attach_args *ta = aux;
struct tx39sib_softc *sc = (void*)self;
@ -183,8 +187,7 @@ tx39sib_attach(parent, self, aux)
}
void
tx39sib_enable1(dev)
struct device *dev;
tx39sib_enable1(struct device *dev)
{
struct tx39sib_softc *sc = (void*)dev;
struct tx39sib_param *param = &sc->sc_param;
@ -211,9 +214,9 @@ tx39sib_enable1(dev)
/* DMA */
reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG);
reg &= ~(TX39_SIBDMACTRL_ENDMARXSND |
TX39_SIBDMACTRL_ENDMATXSND |
TX39_SIBDMACTRL_ENDMARXTEL |
TX39_SIBDMACTRL_ENDMATXTEL);
TX39_SIBDMACTRL_ENDMATXSND |
TX39_SIBDMACTRL_ENDMARXTEL |
TX39_SIBDMACTRL_ENDMATXTEL);
tx_conf_write(tc, TX39_SIBDMACTRL_REG, reg);
/*
@ -225,8 +228,7 @@ tx39sib_enable1(dev)
}
void
tx39sib_enable2(dev)
struct device *dev;
tx39sib_enable2(struct device *dev)
{
struct tx39sib_softc *sc = (void*)dev;
tx_chipset_tag_t tc = sc->sc_tc;
@ -238,8 +240,7 @@ tx39sib_enable2(dev)
}
void
tx39sib_disable(dev)
struct device *dev;
tx39sib_disable(struct device *dev)
{
struct tx39sib_softc *sc = (void*)dev;
tx_chipset_tag_t tc = sc->sc_tc;
@ -258,7 +259,7 @@ tx39sib_disable(dev)
reg = tx_conf_read(tc, TX39_SIBCTRL_REG);
reg &= ~TX39_SIBCTRL_ENSF0;
reg &= ~(TX39_SIBCTRL_ENSF1 | TX39_SIBCTRL_SELTELSF1 |
TX39_SIBCTRL_SELSNDSF1);
TX39_SIBCTRL_SELSNDSF1);
tx_conf_write(tc, TX39_SIBCTRL_REG, reg);
/* disable TX39SIB module */
@ -267,19 +268,15 @@ tx39sib_disable(dev)
}
int
tx39sib_clock(dev)
struct device *dev;
tx39sib_clock(struct device *dev)
{
struct tx39sib_softc *sc = (void*)dev;
return TX39_CLK2X / sibsclk_divide_table[sc->sc_param.sp_clock];
return (TX39_CLK2X / sibsclk_divide_table[sc->sc_param.sp_clock]);
}
int
tx39sib_search(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
tx39sib_search(struct device *parent, struct cfdata *cf, void *aux)
{
struct tx39sib_softc *sc = (void*)parent;
struct txsib_attach_args sa;
@ -291,7 +288,7 @@ tx39sib_search(parent, cf, aux)
if (sa.sa_slot == TXSIBIFCF_SLOT_DEFAULT) {
printf("tx39sib_search: wildcarded slot, skipping\n");
return 0;
return (0);
}
if (!(sc->sc_attached & (1 << sa.sa_slot)) &&/* not attached slot */
@ -300,34 +297,31 @@ tx39sib_search(parent, cf, aux)
sc->sc_attached |= (1 << sa.sa_slot);
}
return 0;
return (0);
}
int
tx39sib_print(aux, pnp)
void *aux;
const char *pnp;
tx39sib_print(void *aux, const char *pnp)
{
struct txsib_attach_args *sa = aux;
printf(" slot %d", sa->sa_slot);
return QUIET;
return (QUIET);
}
/*
* sync access method. don't use runtime.
*/
__inline int
__txsibsf0_ready(tc)
tx_chipset_tag_t tc;
__inline__ int
__txsibsf0_ready(tx_chipset_tag_t tc)
{
int i;
tx_conf_write(tc, TX39_INTRSTATUS1_REG, TX39_INTRSTATUS1_SIBSF0INT);
for (i = 0; (!(tx_conf_read(tc, TX39_INTRSTATUS1_REG) &
TX39_INTRSTATUS1_SIBSF0INT)) && i < 1000; i++) {
TX39_INTRSTATUS1_SIBSF0INT)) && i < 1000; i++) {
if (i > 100 && !(i % 100)) {
printf("sf0 busy loop: retry count %d\n", i);
}
@ -335,17 +329,14 @@ __txsibsf0_ready(tc)
if (i >= 1000) {
printf("sf0 busy\n");
return 0;
return (0);
}
return 1;
return (1);
}
void
txsibsf0_reg_write(tc, addr, val)
tx_chipset_tag_t tc;
int addr;
u_int16_t val;
txsibsf0_reg_write(tx_chipset_tag_t tc, int addr, u_int16_t val)
{
txreg_t reg;
@ -359,17 +350,13 @@ txsibsf0_reg_write(tc, addr, val)
}
u_int16_t
txsibsf0_reg_read(tc, addr)
tx_chipset_tag_t tc;
int addr;
txsibsf0_reg_read(tx_chipset_tag_t tc, int addr)
{
return TX39_SIBSF0_REGDATA(txsibsf0_read(tc, addr));
return (TX39_SIBSF0_REGDATA(txsibsf0_read(tc, addr)));
}
u_int32_t
txsibsf0_read(tc, addr)
tx_chipset_tag_t tc;
int addr;
txsibsf0_read(tx_chipset_tag_t tc, int addr)
{
txreg_t reg;
int retry = 3;
@ -387,18 +374,17 @@ txsibsf0_read(tc, addr)
if (retry <= 0)
printf("txsibsf0_read: command failed\n");
return reg;
return (reg);
}
#ifdef TX39SIBDEBUG
#define ISSETPRINT_CTRL(r, m) \
#define ISSETPRINT_CTRL(r, m) \
__is_set_print(r, TX39_SIBCTRL_##m, #m)
#define ISSETPRINT_DMACTRL(r, m) \
#define ISSETPRINT_DMACTRL(r, m) \
__is_set_print(r, TX39_SIBDMACTRL_##m, #m)
void
tx39sib_dump(sc)
struct tx39sib_softc *sc;
tx39sib_dump(struct tx39sib_softc *sc)
{
tx_chipset_tag_t tc = sc->sc_tc;
txreg_t reg;

126
sys/arch/hpcmips/tx/tx39sibreg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39sibreg.h,v 1.2 2000/03/03 19:54:37 uch Exp $ */
/* $NetBSD: tx39sibreg.h,v 1.3 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Toshiba TX3912 SIB module
@ -89,33 +99,33 @@
#define TX39_SIBCTRL_SCLKDIV_SHIFT 24
#define TX39_SIBCTRL_SCLKDIV_MASK 0x7
#define TX39_SIBCTRL_SCLKDIV(cr) \
(((cr) >> TX39_SIBCTRL_SCLKDIV_SHIFT) & \
#define TX39_SIBCTRL_SCLKDIV(cr) \
(((cr) >> TX39_SIBCTRL_SCLKDIV_SHIFT) & \
TX39_SIBCTRL_SCLKDIV_MASK)
#define TX39_SIBCTRL_SCLKDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_SCLKDIV_SHIFT) & \
#define TX39_SIBCTRL_SCLKDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_SCLKDIV_SHIFT) & \
(TX39_SIBCTRL_SCLKDIV_MASK << TX39_SIBCTRL_SCLKDIV_SHIFT)))
#define TX39_SIBCTRL_TEL16 0x00800000
#define TX39_SIBCTRL_TELFSDIV_SHIFT 16
#define TX39_SIBCTRL_TELFSDIV_MASK 0x7f
#define TX39_SIBCTRL_TELFSDIV(cr) \
(((cr) >> TX39_SIBCTRL_TELFSDIV_SHIFT) & \
#define TX39_SIBCTRL_TELFSDIV(cr) \
(((cr) >> TX39_SIBCTRL_TELFSDIV_SHIFT) & \
TX39_SIBCTRL_TELFSDIV_MASK)
#define TX39_SIBCTRL_TELFSDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_TELFSDIV_SHIFT) & \
#define TX39_SIBCTRL_TELFSDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_TELFSDIV_SHIFT) & \
(TX39_SIBCTRL_TELFSDIV_MASK << TX39_SIBCTRL_TELFSDIV_SHIFT)))
#define TX39_SIBCTRL_SND16 0x00008000
#define TX39_SIBCTRL_SNDFSDIV_SHIFT 8
#define TX39_SIBCTRL_SNDFSDIV_MASK 0x7f
#define TX39_SIBCTRL_SNDFSDIV(cr) \
(((cr) >> TX39_SIBCTRL_SNDFSDIV_SHIFT) & \
#define TX39_SIBCTRL_SNDFSDIV(cr) \
(((cr) >> TX39_SIBCTRL_SNDFSDIV_SHIFT) & \
TX39_SIBCTRL_SNDFSDIV_MASK)
#define TX39_SIBCTRL_SNDFSDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_SNDFSDIV_SHIFT) & \
#define TX39_SIBCTRL_SNDFSDIV_SET(cr, val) \
((cr) | (((val) << TX39_SIBCTRL_SNDFSDIV_SHIFT) & \
(TX39_SIBCTRL_SNDFSDIV_MASK << TX39_SIBCTRL_SNDFSDIV_SHIFT)))
#define TX39_SIBCTRL_SELTELSF1 0x00000080
@ -141,11 +151,11 @@
/* Control/Status bit, field definition (See also UCB1200) */
#define TX39_SIBSF0_REGADDR_SHIFT 27
#define TX39_SIBSF0_REGADDR_MASK 0xf
#define TX39_SIBSF0_REGADDR(cr) \
(((cr) >> TX39_SIBSF0_REGADDR_SHIFT) & \
#define TX39_SIBSF0_REGADDR(cr) \
(((cr) >> TX39_SIBSF0_REGADDR_SHIFT) & \
TX39_SIBSF0_REGADDR_MASK)
#define TX39_SIBSF0_REGADDR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF0_REGADDR_SHIFT) & \
#define TX39_SIBSF0_REGADDR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF0_REGADDR_SHIFT) & \
(TX39_SIBSF0_REGADDR_MASK << TX39_SIBSF0_REGADDR_SHIFT)))
#define TX39_SIBSF0_WRITE 0x04000000
@ -154,13 +164,13 @@
#define TX39_SIBSF0_REGDATA_SHIFT 0
#define TX39_SIBSF0_REGDATA_MASK 0xffff
#define TX39_SIBSF0_REGDATA(cr) \
(((cr) >> TX39_SIBSF0_REGDATA_SHIFT) & \
#define TX39_SIBSF0_REGDATA(cr) \
(((cr) >> TX39_SIBSF0_REGDATA_SHIFT) & \
TX39_SIBSF0_REGDATA_MASK)
#define TX39_SIBSF0_REGDATA_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF0_REGDATA_SHIFT) & \
#define TX39_SIBSF0_REGDATA_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF0_REGDATA_SHIFT) & \
(TX39_SIBSF0_REGDATA_MASK << TX39_SIBSF0_REGDATA_SHIFT)))
#define TX39_SIBSF0_REGDATA_CLR(cr) \
#define TX39_SIBSF0_REGDATA_CLR(cr) \
((cr) &= ~(TX39_SIBSF0_REGDATA_MASK << TX39_SIBSF0_REGDATA_SHIFT))
/*
@ -172,32 +182,32 @@
#define TX39_SIBSF1CTRL_ADCGAINL_SHIFT 20
#define TX39_SIBSF1CTRL_ADCGAINL_MASK 0xf
#define TX39_SIBSF1CTRL_ADCGAINL_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINL_SHIFT) & \
#define TX39_SIBSF1CTRL_ADCGAINL_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINL_SHIFT) & \
(TX39_SIBSF1CTRL_ADCGAINL_MASK << TX39_SIBSF1CTRL_ADCGAINL_SHIFT)))
#define TX39_SIBSF1CTRL_ADCGAINR_SHIFT 16
#define TX39_SIBSF1CTRL_ADCGAINR_MASK 0xf
#define TX39_SIBSF1CTRL_ADCGAINR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINR_SHIFT) & \
#define TX39_SIBSF1CTRL_ADCGAINR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINR_SHIFT) & \
(TX39_SIBSF1CTRL_ADCGAINR_MASK << TX39_SIBSF1CTRL_ADCGAINR_SHIFT)))
#define TX39_SIBSF1CTRL_DACATTNL_SHIFT 8
#define TX39_SIBSF1CTRL_DACATTNL_MASK 0xf
#define TX39_SIBSF1CTRL_DACATTNL_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNL_SHIFT) & \
#define TX39_SIBSF1CTRL_DACATTNL_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNL_SHIFT) & \
(TX39_SIBSF1CTRL_DACATTNL_MASK << TX39_SIBSF1CTRL_DACATTNL_SHIFT)))
#define TX39_SIBSF1CTRL_DACATTNR_SHIFT 4
#define TX39_SIBSF1CTRL_DACATTNR_MASK 0xf
#define TX39_SIBSF1CTRL_DACATTNR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNR_SHIFT) & \
#define TX39_SIBSF1CTRL_DACATTNR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNR_SHIFT) & \
(TX39_SIBSF1CTRL_DACATTNR_MASK << TX39_SIBSF1CTRL_DACATTNR_SHIFT)))
#define TX39_SIBSF1CTRL_DIGITALOUT_SHIFT 0
#define TX39_SIBSF1CTRL_DIGITALOUT_MASK 0xf
#define TX39_SIBSF1CTRL_DIGITALOUT_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DIGITALOUT_SHIFT) & \
#define TX39_SIBSF1CTRL_DIGITALOUT_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1CTRL_DIGITALOUT_SHIFT) & \
(TX39_SIBSF1CTRL_DIGITALOUT_MASK << TX39_SIBSF1CTRL_DIGITALOUT_SHIFT)))
/*
@ -209,20 +219,20 @@
#define TX39_SIBSF1STAT_ERROR_SHIFT 20
#define TX39_SIBSF1STAT_ERROR_MASK 0xf
#define TX39_SIBSF1STAT_ERROR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_ERROR_SHIFT) & \
#define TX39_SIBSF1STAT_ERROR_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_ERROR_SHIFT) & \
(TX39_SIBSF1STAT_ERROR_MASK << TX39_SIBSF1STAT_ERROR_SHIFT)))
#define TX39_SIBSF1STAT_REVISION_SHIFT 16
#define TX39_SIBSF1STAT_REVISION_MASK 0xf
#define TX39_SIBSF1STAT_REVISION_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_REVISION_SHIFT) & \
#define TX39_SIBSF1STAT_REVISION_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_REVISION_SHIFT) & \
(TX39_SIBSF1STAT_REVISION_MASK << TX39_SIBSF1STAT_REVISION_SHIFT)))
#define TX39_SIBSF1STAT_DIGITALIN_SHIFT 0
#define TX39_SIBSF1STAT_DIGITALIN_MASK 0xf
#define TX39_SIBSF1STAT_DIGITALIN_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_DIGITALIN_SHIFT) & \
#define TX39_SIBSF1STAT_DIGITALIN_SET(cr, val) \
((cr) | (((val) << TX39_SIBSF1STAT_DIGITALIN_SHIFT) & \
(TX39_SIBSF1STAT_DIGITALIN_MASK << TX39_SIBSF1STAT_DIGITALIN_SHIFT)))
/*
@ -233,8 +243,8 @@
#define TX39_SIBDMACTRL_SNDDMAPTR_SHIFT 18
#define TX39_SIBDMACTRL_SNDDMAPTR_MASK 0xfff
#define TX39_SIBDMACTRL_SNDDMAPTR(cr) \
(((cr) >> TX39_SIBDMACTRL_SNDDMAPTR_SHIFT) & \
#define TX39_SIBDMACTRL_SNDDMAPTR(cr) \
(((cr) >> TX39_SIBDMACTRL_SNDDMAPTR_SHIFT) & \
TX39_SIBDMACTRL_SNDDMAPTR_MASK)
#define TX39_SIBDMACTRL_ENDMARXSND 0x00020000
@ -244,8 +254,8 @@
#define TX39_SIBDMACTRL_TELDMAPTR_SHIFT 2
#define TX39_SIBDMACTRL_TELDMAPTR_MASK 0xfff
#define TX39_SIBDMACTRL_TELDMAPTR(cr) \
(((cr) >> TX39_SIBDMACTRL_TELDMAPTR_SHIFT) & \
#define TX39_SIBDMACTRL_TELDMAPTR(cr) \
(((cr) >> TX39_SIBDMACTRL_TELDMAPTR_SHIFT) & \
TX39_SIBDMACTRL_TELDMAPTR_MASK)
#define TX39_SIBDMACTRL_ENDMARXTEL 0x00000002

58
sys/arch/hpcmips/tx/tx39sibvar.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39sibvar.h,v 1.2 2000/01/12 14:56:19 uch Exp $ */
/* $NetBSD: tx39sibvar.h,v 1.3 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
struct txsib_attach_args {
@ -33,13 +43,13 @@ struct txsib_attach_args {
int sa_slot; /* subframe 0 or subframe 1 */
};
void tx39sib_enable1 __P((struct device*));
void tx39sib_enable2 __P((struct device*));
void tx39sib_disable __P((struct device*));
int tx39sib_clock __P((struct device*));
void tx39sib_enable1(struct device *);
void tx39sib_enable2(struct device *);
void tx39sib_disable(struct device *);
int tx39sib_clock(struct device *);
/* subframe0 access sync method */
void txsibsf0_reg_write __P((tx_chipset_tag_t, int, u_int16_t));
u_int16_t txsibsf0_reg_read __P((tx_chipset_tag_t, int));
u_int32_t txsibsf0_read __P((tx_chipset_tag_t, int));
void txsibsf0_reg_write(tx_chipset_tag_t, int, u_int16_t);
u_int16_t txsibsf0_reg_read(tx_chipset_tag_t, int);
u_int32_t txsibsf0_read(tx_chipset_tag_t, int);

68
sys/arch/hpcmips/tx/tx39spireg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39spireg.h,v 1.1 1999/11/20 19:56:37 uch Exp $ */
/* $NetBSD: tx39spireg.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Toshiba TX3912/3922 SPI module
@ -42,20 +52,20 @@
/* R/W */
#define TX39_SPICTRL_DELAYVAL_SHIFT 12
#define TX39_SPICTRL_DELAYVAL_MASK 0xf
#define TX39_SPICTRL_DELAYVAL(cr) \
(((cr) >> TX39_SPICTRL_DELAYVAL_SHIFT) & \
#define TX39_SPICTRL_DELAYVAL(cr) \
(((cr) >> TX39_SPICTRL_DELAYVAL_SHIFT) & \
TX39_SPICTRL_DELAYVAL_MASK)
#define TX39_SPICTRL_DELAYVAL_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_DELAYVAL_SHIFT) & \
#define TX39_SPICTRL_DELAYVAL_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_DELAYVAL_SHIFT) & \
(TX39_SPICTRL_DELAYVAL_MASK << TX39_SPICTRL_DELAYVAL_SHIFT)))
/* SPICLK Rate = 7.3728MHz/(BAUDRATE*2 + 2) */
#define TX39_SPICTRL_BAUDRATE_SHIFT 8
#define TX39_SPICTRL_BAUDRATE_MASK 0xf
#define TX39_SPICTRL_BAUDRATE(cr) \
(((cr) >> TX39_SPICTRL_BAUDRATE_SHIFT) & \
#define TX39_SPICTRL_BAUDRATE(cr) \
(((cr) >> TX39_SPICTRL_BAUDRATE_SHIFT) & \
TX39_SPICTRL_BAUDRATE_MASK)
#define TX39_SPICTRL_BAUDRATE_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_BAUDRATE_SHIFT) & \
#define TX39_SPICTRL_BAUDRATE_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_BAUDRATE_SHIFT) & \
(TX39_SPICTRL_BAUDRATE_MASK << TX39_SPICTRL_BAUDRATE_SHIFT)))
#define TX39_SPICTRL_PHAPOL 0x00000020
#define TX39_SPICTRL_CLKPOL 0x00000010
@ -69,8 +79,8 @@
/* W */
#define TX39_SPICTRL_TXDATA_SHIFT 0
#define TX39_SPICTRL_TXDATA_MASK 0xffff
#define TX39_SPICTRL_TXDATA_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_TXDATA_SHIFT) & \
#define TX39_SPICTRL_TXDATA_SET(cr, val) \
((cr) | (((val) << TX39_SPICTRL_TXDATA_SHIFT) & \
(TX39_SPICTRL_TXDATA_MASK << TX39_SPICTRL_TXDATA_SHIFT)))
/*
@ -79,6 +89,6 @@
/* R */
#define TX39_SPICTRL_RXDATA_SHIFT 8
#define TX39_SPICTRL_RXDATA_MASK 0xf
#define TX39_SPICTRL_RXDATA(cr) \
(((cr) >> TX39_SPICTRL_RXDATA_SHIFT) & \
#define TX39_SPICTRL_RXDATA(cr) \
(((cr) >> TX39_SPICTRL_RXDATA_SHIFT) & \
TX39_SPICTRL_RXDATA_MASK)

72
sys/arch/hpcmips/tx/tx39uartreg.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: tx39uartreg.h,v 1.1 1999/11/20 19:56:38 uch Exp $ */
/* $NetBSD: tx39uartreg.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Toshiba TX3912/3922 UART module
@ -47,19 +57,19 @@
#define TX39_UARTA_REG_START 0x0b0
#define TX39_UARTB_REG_START 0x0c8
#define TX39_UARTCTRL1_REG(x) \
#define TX39_UARTCTRL1_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START))
#define TX39_UARTCTRL2_REG(x) \
#define TX39_UARTCTRL2_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 4)
#define TX39_UARTDMACTRL1_REG(x) \
#define TX39_UARTDMACTRL1_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 8)
#define TX39_UARTDMACTRL2_REG(x) \
#define TX39_UARTDMACTRL2_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 12)
#define TX39_UARTDMACNT_REG(x) \
#define TX39_UARTDMACNT_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 16)
#define TX39_UARTTXHOLD_REG(x) \
#define TX39_UARTTXHOLD_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 20)
#define TX39_UARTRXHOLD_REG(x) \
#define TX39_UARTRXHOLD_REG(x) \
(((x) ? TX39_UARTB_REG_START : TX39_UARTA_REG_START) + 20)
/*
@ -111,8 +121,8 @@
#define TX39_UARTCTRL2_BAUDRATE_MASK TX3922_UARTCTRL2_BAUDRATE_MASK
#endif
#define TX39_UARTCTRL2_BAUDRATE_SET(cr, val) \
((cr) | (((val) << TX39_UARTCTRL2_BAUDRATE_SHIFT) & \
#define TX39_UARTCTRL2_BAUDRATE_SET(cr, val) \
((cr) | (((val) << TX39_UARTCTRL2_BAUDRATE_SHIFT) & \
(TX39_UARTCTRL2_BAUDRATE_MASK << TX39_UARTCTRL2_BAUDRATE_SHIFT)))
/*
@ -120,7 +130,7 @@
*/
/* W */
#define TX39_UARTDMACTRL1_DMASTARTVAL_MASK 0xfffffffc
#define TX39_UARTDMACTRL1_DMASTARTVAL_SET(cr, val) \
#define TX39_UARTDMACTRL1_DMASTARTVAL_SET(cr, val) \
((cr) | ((val) & TX39_UARTDMACTRL1_DMASTARTVAL_MASK))
/*
@ -128,7 +138,7 @@
*/
/* W */
#define TX39_UARTDMACTRL2_DMALENGTH_MASK 0x0000ffff
#define TX39_UARTDMACTRL2_DMALENGTH_SET(cr, val) \
#define TX39_UARTDMACTRL2_DMALENGTH_SET(cr, val) \
((cr) | ((val) & TX39_UARTDMACTRL1_DMALENGTH_MASK))
/*
@ -137,7 +147,7 @@
/* R */
#define TX39_UARTDMACNT_DMACNT_SHIFT 0
#define TX39_UARTDMACNT_DMACNT_MASK 0xffff
#define TX39_UARTDMACNT_DMACNT(cr) \
#define TX39_UARTDMACNT_DMACNT(cr) \
((cr) & TX39_UARTDMACNT_DMACNT_MASK)
/*
@ -147,7 +157,7 @@
#define TX39_UARTTXHOLD_BREAK 0x00000100
#define TX39_UARTTXHOLD_TXDATA_SHIFT 0
#define TX39_UARTTXHOLD_TXDATA_MASK 0x000000ff
#define TX39_UARTTXHOLD_TXDATA_SET(cr, val) \
#define TX39_UARTTXHOLD_TXDATA_SET(cr, val) \
((cr) | ((val) & TX39_UARTTXHOLD_TXDATA_MASK))
/*
@ -156,5 +166,5 @@
/* R */
#define TX39_UARTRXHOLD_RXDATA_SHIFT 0
#define TX39_UARTRXHOLD_RXDATA_MASK 0x000000ff
#define TX39_UARTRXHOLD_RXDATA(cr) \
#define TX39_UARTRXHOLD_RXDATA(cr) \
((cr) & TX39_UARTRXHOLD_RXDATA_MASK)

46
sys/arch/hpcmips/tx/tx39uartvar.h
View File

@ -1,35 +1,45 @@
/* $NetBSD: tx39uartvar.h,v 1.1 1999/11/20 19:56:38 uch Exp $ */
/* $NetBSD: tx39uartvar.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#define TX39_UARTA 0
#define TX39_UARTB 1
int txcom_cnattach __P((int, int, int));
int txcom_cnattach(int, int, int);
struct tx39uart_attach_args {
tx_chipset_tag_t ua_tc;

48
sys/arch/hpcmips/tx/txcom.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: txcom.c,v 1.13 2001/06/13 19:09:08 uch Exp $ */
/* $NetBSD: txcom.c,v 1.14 2001/06/14 11:09:56 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -167,7 +167,7 @@ cdev_decl(txcom);
struct consdev txcomcons = {
NULL, NULL, txcom_cngetc, txcom_cnputc, txcom_cnpollc,
NULL, NODEV, CN_NORMAL
NULL, NODEV, CN_NORMAL
};
/* Serial console */
@ -199,13 +199,13 @@ txcom_attach(struct device *parent, struct device *self, void *aux)
/* Check this slot used as serial console */
console = (ua->ua_slot == txcom_chip.sc_slot) &&
(txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
(txcom_chip.sc_hwflags & TXCOM_HW_CONSOLE);
if (console) {
sc->sc_chip = &txcom_chip;
} else {
if (!(sc->sc_chip = malloc(sizeof(struct txcom_chip),
M_DEVBUF, M_WAITOK))) {
M_DEVBUF, M_WAITOK))) {
printf(": can't allocate chip\n");
return;
}
@ -255,19 +255,19 @@ txcom_attach(struct device *parent, struct device *self, void *aux)
#define TXCOMINTR(i, s) MAKEINTR(2, TX39_INTRSTATUS2_UART##i##INT(s))
tx_intr_establish(tc, TXCOMINTR(RX, slot), IST_EDGE, IPL_TTY,
txcom_rxintr, sc);
txcom_rxintr, sc);
tx_intr_establish(tc, TXCOMINTR(TX, slot), IST_EDGE, IPL_TTY,
txcom_txintr, sc);
txcom_txintr, sc);
tx_intr_establish(tc, TXCOMINTR(RXOVERRUN, slot), IST_EDGE, IPL_TTY,
txcom_rxintr, sc);
txcom_rxintr, sc);
tx_intr_establish(tc, TXCOMINTR(TXOVERRUN, slot), IST_EDGE, IPL_TTY,
txcom_txintr, sc);
txcom_txintr, sc);
tx_intr_establish(tc, TXCOMINTR(FRAMEERR, slot), IST_EDGE, IPL_TTY,
txcom_frameerr_intr, sc);
txcom_frameerr_intr, sc);
tx_intr_establish(tc, TXCOMINTR(PARITYERR, slot), IST_EDGE, IPL_TTY,
txcom_parityerr_intr, sc);
txcom_parityerr_intr, sc);
tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
txcom_break_intr, sc);
txcom_break_intr, sc);
/*
* UARTA has external signal line. (its wiring is platform dependent)
@ -275,9 +275,9 @@ txcom_attach(struct device *parent, struct device *self, void *aux)
if (IS_COM0(slot)) {
/* install DCD, CTS hooks. */
config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_DCD,
CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
CONFIG_HOOK_EXCLUSIVE, txcom_dcd_hook, sc);
config_hook(CONFIG_HOOK_EVENT, CONFIG_HOOK_COM0_CTS,
CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
CONFIG_HOOK_EXCLUSIVE, txcom_cts_hook, sc);
}
/*
@ -330,7 +330,7 @@ txcom_enable(struct txcom_chip *chip)
/* External power supply (if any) */
config_hook_call(CONFIG_HOOK_POWERCONTROL,
CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
CONFIG_HOOK_POWERCONTROL_COM0, PWCTL_ON);
delay(3);
/* Supply clock */
@ -354,7 +354,7 @@ txcom_enable(struct txcom_chip *chip)
timeout = 100000;
while(!(tx_conf_read(tc, ofs) & TX39_UARTCTRL1_UARTON) &&
--timeout > 0)
--timeout > 0)
;
if (timeout == 0 && !cold) {
@ -465,7 +465,7 @@ txcom_cnputc(dev_t dev, int c)
__txcom_txbufready(chip, -1);
tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
(c & TX39_UARTTXHOLD_TXDATA_MASK));
(c & TX39_UARTTXHOLD_TXDATA_MASK));
__txcom_txbufready(chip, -1);
@ -577,7 +577,7 @@ txcom_break(struct txcom_softc *sc, int on)
struct txcom_chip *chip = sc->sc_chip;
tx_conf_write(chip->sc_tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
on ? TX39_UARTTXHOLD_BREAK : 0);
on ? TX39_UARTTXHOLD_BREAK : 0);
}
void
@ -591,8 +591,8 @@ txcom_modem(struct txcom_softc *sc, int on)
/* assert DTR */
if (IS_COM0(slot)) {
config_hook_call(CONFIG_HOOK_SET,
CONFIG_HOOK_COM0_DTR,
(void *)on);
CONFIG_HOOK_COM0_DTR,
(void *)on);
}
reg = tx_conf_read(tc, TX39_UARTCTRL1_REG(slot));
@ -686,7 +686,7 @@ txcom_rxintr(void *arg)
c = TX39_UARTRXHOLD_RXDATA(
tx_conf_read(chip->sc_tc,
TX39_UARTRXHOLD_REG(chip->sc_slot)));
TX39_UARTRXHOLD_REG(chip->sc_slot)));
sc->sc_rbuf[sc->sc_rbput] = c;
sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
@ -701,7 +701,7 @@ txcom_rxsoft(void *arg)
{
struct txcom_softc *sc = arg;
struct tty *tp = sc->sc_tty;
int (*rint) __P((int c, struct tty *tp));
int (*rint)(int, struct tty *);
int code;
int s, end, get;
@ -735,8 +735,8 @@ txcom_txintr(void *arg)
if (sc->sc_tbc > 0) {
tx_conf_write(tc, TX39_UARTTXHOLD_REG(chip->sc_slot),
(*sc->sc_tba &
TX39_UARTTXHOLD_TXDATA_MASK));
(*sc->sc_tba &
TX39_UARTTXHOLD_TXDATA_MASK));
sc->sc_tbc--;
sc->sc_tba++;
} else {
@ -1035,7 +1035,7 @@ txcomstart(struct tty *tp)
/* Output the first character of the contiguous buffer. */
tx_conf_write(tc, TX39_UARTTXHOLD_REG(slot),
(*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
(*sc->sc_tba & TX39_UARTTXHOLD_TXDATA_MASK));
sc->sc_tbc--;
sc->sc_tba++;

155
sys/arch/hpcmips/tx/txcsbus.c
View File

@ -1,29 +1,39 @@
/* $NetBSD: txcsbus.c,v 1.4 2000/08/18 07:33:14 sato Exp $ */
/* $NetBSD: txcsbus.c,v 1.5 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "opt_tx39_debug.h"
@ -78,10 +88,10 @@ const struct csmap {
TX39_SYSADDR_CARD_SIZE},
};
int txcsbus_match __P((struct device*, struct cfdata*, void*));
void txcsbus_attach __P((struct device*, struct device*, void*));
int txcsbus_print __P((void*, const char*));
int txcsbus_search __P((struct device*, struct cfdata*, void*));
int txcsbus_match(struct device *, struct cfdata *, void *);
void txcsbus_attach(struct device *, struct device *, void *);
int txcsbus_print(void *, const char *);
int txcsbus_search(struct device *, struct cfdata *, void *);
struct txcsbus_softc {
struct device sc_dev;
@ -94,40 +104,30 @@ struct cfattach txcsbus_ca = {
sizeof(struct txcsbus_softc), txcsbus_match, txcsbus_attach
};
bus_space_tag_t __txcsbus_alloc_cstag __P((struct txcsbus_softc*,
struct cs_handle*));
static bus_space_tag_t __txcsbus_alloc_cstag(struct txcsbus_softc *,
struct cs_handle *);
int
txcsbus_match(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
txcsbus_match(struct device *parent, struct cfdata *cf, void *aux)
{
struct csbus_attach_args *cba = aux;
platid_mask_t mask;
if (strcmp(cba->cba_busname, cf->cf_driver->cd_name)) {
return 0;
}
if (strcmp(cba->cba_busname, cf->cf_driver->cd_name))
return (0);
if (cf->cf_loc[TXCSBUSIFCF_PLATFORM] ==
TXCSBUSIFCF_PLATFORM_DEFAULT) {
return 1;
}
if (cf->cf_loc[TXCSBUSIFCF_PLATFORM] == TXCSBUSIFCF_PLATFORM_DEFAULT)
return (1);
mask = PLATID_DEREF(cf->cf_loc[TXCSBUSIFCF_PLATFORM]);
if (platid_match(&platid, &mask)) {
return 2;
}
if (platid_match(&platid, &mask))
return (2);
return 0;
return (0);
}
void
txcsbus_attach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
txcsbus_attach(struct device *parent, struct device *self, void *aux)
{
struct csbus_attach_args *cba = aux;
struct txcsbus_softc *sc = (void*)self;
@ -142,35 +142,33 @@ txcsbus_attach(parent, self, aux)
}
int
txcsbus_print(aux, pnp)
void *aux;
const char *pnp;
txcsbus_print(void *aux, const char *pnp)
{
#define PRINTIRQ(i) i, (i) / 32, (i) % 32
struct cs_attach_args *ca = aux;
if (ca->ca_csreg.cs != TXCSBUSCF_REGCS_DEFAULT) {
printf(" regcs %s %dbit %#x+%#x",
__csmap[ca->ca_csreg.cs].cs_name,
ca->ca_csreg.cswidth,
ca->ca_csreg.csbase,
ca->ca_csreg.cssize);
__csmap[ca->ca_csreg.cs].cs_name,
ca->ca_csreg.cswidth,
ca->ca_csreg.csbase,
ca->ca_csreg.cssize);
}
if (ca->ca_csio.cs != TXCSBUSCF_IOCS_DEFAULT) {
printf(" iocs %s %dbit %#x+%#x",
__csmap[ca->ca_csio.cs].cs_name,
ca->ca_csio.cswidth,
ca->ca_csio.csbase,
ca->ca_csio.cssize);
__csmap[ca->ca_csio.cs].cs_name,
ca->ca_csio.cswidth,
ca->ca_csio.csbase,
ca->ca_csio.cssize);
}
if (ca->ca_csmem.cs != TXCSBUSCF_MEMCS_DEFAULT) {
printf(" memcs %s %dbit %#x+%#x",
__csmap[ca->ca_csmem.cs].cs_name,
ca->ca_csmem.cswidth,
ca->ca_csmem.csbase,
ca->ca_csmem.cssize);
__csmap[ca->ca_csmem.cs].cs_name,
ca->ca_csmem.cswidth,
ca->ca_csmem.csbase,
ca->ca_csmem.cssize);
}
if (ca->ca_irq1 != TXCSBUSCF_IRQ1_DEFAULT) {
@ -185,14 +183,11 @@ txcsbus_print(aux, pnp)
printf(" irq3 %d(%d:%d)", PRINTIRQ(ca->ca_irq3));
}
return UNCONF;
return (UNCONF);
}
int
txcsbus_search(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
txcsbus_search(struct device *parent, struct cfdata *cf, void *aux)
{
struct txcsbus_softc *sc = (void*)parent;
struct cs_attach_args ca;
@ -234,13 +229,11 @@ txcsbus_search(parent, cf, aux)
config_attach(parent, cf, &ca, txcsbus_print);
}
return 0;
return (0);
}
bus_space_tag_t
__txcsbus_alloc_cstag(sc, csh)
struct txcsbus_softc *sc;
struct cs_handle *csh;
__txcsbus_alloc_cstag(struct txcsbus_softc *sc, struct cs_handle *csh)
{
tx_chipset_tag_t tc = sc->sc_tc;
@ -255,7 +248,7 @@ __txcsbus_alloc_cstag(sc, csh)
/* Already setuped chip select */
if (sc->sc_cst[cs]) {
return sc->sc_cst[cs];
return (sc->sc_cst[cs]);
}
iot = hpcmips_alloc_bus_space_tag();
@ -282,8 +275,8 @@ __txcsbus_alloc_cstag(sc, csh)
#ifdef TX392X
reg = tx_conf_read(tc, TX39_MEMCONFIG1_REG);
reg |= ((cs == TX39_MCS0) ?
TX39_MEMCONFIG1_MCS0_32 :
TX39_MEMCONFIG1_MCS1_32);
TX39_MEMCONFIG1_MCS0_32 :
TX39_MEMCONFIG1_MCS1_32);
tx_conf_write(tc, TX39_MEMCONFIG1_REG, reg);
#endif /* TX392X */
}
@ -299,8 +292,8 @@ __txcsbus_alloc_cstag(sc, csh)
#ifdef TX392X
reg = tx_conf_read(tc, TX39_MEMCONFIG1_REG);
reg &= ~((cs == TX39_MCS0) ?
TX39_MEMCONFIG1_MCS0_32 :
TX39_MEMCONFIG1_MCS1_32);
TX39_MEMCONFIG1_MCS0_32 :
TX39_MEMCONFIG1_MCS1_32);
tx_conf_write(tc, TX39_MEMCONFIG1_REG, reg);
#endif /* TX392X */
} else {
@ -309,13 +302,13 @@ __txcsbus_alloc_cstag(sc, csh)
/* enable I/O access */
reg |= (cs == TX39_CARD1) ?
TX39_MEMCONFIG3_CARD1IOEN :
TX39_MEMCONFIG3_CARD2IOEN;
TX39_MEMCONFIG3_CARD1IOEN :
TX39_MEMCONFIG3_CARD2IOEN;
/* disable 8bit access */
#ifdef TX392X
reg &= ~((cs == TX39_CARD1) ?
TX39_MEMCONFIG3_CARD1_8SEL :
TX39_MEMCONFIG3_CARD2_8SEL);
TX39_MEMCONFIG3_CARD1_8SEL :
TX39_MEMCONFIG3_CARD2_8SEL);
#endif /* TX392X */
#ifdef TX391X
reg &= ~TX39_MEMCONFIG3_PORT8SEL;
@ -330,13 +323,13 @@ __txcsbus_alloc_cstag(sc, csh)
/* enable I/O access */
reg |= (cs == TX39_CARD1) ?
TX39_MEMCONFIG3_CARD1IOEN :
TX39_MEMCONFIG3_CARD2IOEN;
TX39_MEMCONFIG3_CARD1IOEN :
TX39_MEMCONFIG3_CARD2IOEN;
/* disable 8bit access */
#ifdef TX392X
reg |= (cs == TX39_CARD1) ?
TX39_MEMCONFIG3_CARD1_8SEL :
TX39_MEMCONFIG3_CARD2_8SEL;
TX39_MEMCONFIG3_CARD1_8SEL :
TX39_MEMCONFIG3_CARD2_8SEL;
#endif /* TX392X */
#ifdef TX391X
reg |= TX39_MEMCONFIG3_PORT8SEL;
@ -345,11 +338,11 @@ __txcsbus_alloc_cstag(sc, csh)
} else {
panic("__txcsbus_alloc_cstag: CS%d 8bit mode is"
"not allowed", cs);
"not allowed", cs);
}
}
hpcmips_init_bus_space_extent(iot);
return iot;
return (iot);
}

44
sys/arch/hpcmips/tx/txcsbusvar.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: txcsbusvar.h,v 1.1 1999/11/20 19:56:40 uch Exp $ */
/* $NetBSD: txcsbusvar.h,v 1.2 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 1999, by UCHIYAMA Yasushi
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*

16
sys/arch/hpcmips/tx/txsim.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: txsim.c,v 1.4 2001/04/18 10:42:39 sato Exp $ */
/* $NetBSD: txsim.c,v 1.5 2001/06/14 11:09:56 uch Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -77,11 +77,12 @@ txsim_match(struct device *parent, struct cfdata *match, void *aux)
#ifdef VR41XX
if (!platid_match(&platid, &platid_mask_CPU_MIPS_TX_3900)
&& !platid_match(&platid, &platid_mask_CPU_MIPS_TX_3920))
return 1;
return (1);
#endif /* !TX39XX */
if (strcmp(ma->ma_name, match->cf_driver->cd_name))
return 0;
return 1;
return (0);
return (1);
}
void
@ -114,7 +115,7 @@ txsim_attach(struct device *parent, struct device *self, void *aux)
int
txsim_print(void *aux, const char *pnp)
{
return pnp ? QUIET : UNCONF;
return (pnp ? QUIET : UNCONF);
}
int
@ -125,9 +126,8 @@ txsim_search(struct device *parent, struct cfdata *cf, void *aux)
ta.ta_tc = tx_conf_get_tag();
if ((*cf->cf_attach->ca_match)(parent, cf, &ta) == sc->sc_pri) {
if ((*cf->cf_attach->ca_match)(parent, cf, &ta) == sc->sc_pri)
config_attach(parent, cf, &ta, txsim_print);
}
return 0;
return (0);
}

59
sys/arch/hpcmips/tx/txsnd.c
View File

@ -1,30 +1,41 @@
/* $NetBSD: txsnd.c,v 1.2 2000/01/16 21:47:01 uch Exp $ */
/* $NetBSD: txsnd.c,v 1.3 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
@ -33,12 +44,11 @@
#include <hpcmips/tx/txsnd.h>
struct tx_sound_tag __tx_sound_default;
void __tx_sound_click __P((tx_sound_tag_t));
void __tx_sound_mute __P((tx_sound_tag_t, int));
static void __tx_sound_click(tx_sound_tag_t);
static void __tx_sound_mute(tx_sound_tag_t, int);
void
tx_sound_init(tc)
tx_chipset_tag_t tc;
tx_sound_init(tx_chipset_tag_t tc)
{
__tx_sound_default.ts_v = NULL;
__tx_sound_default.ts_click = __tx_sound_click;
@ -48,14 +58,11 @@ tx_sound_init(tc)
}
void
__tx_sound_click(arg)
tx_sound_tag_t arg;
__tx_sound_click(tx_sound_tag_t arg)
{
}
void
__tx_sound_mute(arg, onoff)
tx_sound_tag_t arg;
int onoff;
__tx_sound_mute(tx_sound_tag_t arg, int onoff)
{
}

58
sys/arch/hpcmips/tx/txsnd.h
View File

@ -1,29 +1,39 @@
/* $NetBSD: txsnd.h,v 1.2 2000/01/16 21:47:01 uch Exp $ */
/* $NetBSD: txsnd.h,v 1.3 2001/06/14 11:09:56 uch Exp $ */
/*
* Copyright (c) 2000, by UCHIYAMA Yasushi
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by UCHIYAMA Yasushi.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. The name of the developer may NOT be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
typedef struct tx_sound_tag *tx_sound_tag_t;
@ -31,15 +41,15 @@ typedef struct tx_sound_tag *tx_sound_tag_t;
struct tx_sound_tag {
void *ts_v;
void (*ts_click) __P((tx_sound_tag_t));
void (*ts_mute) __P((tx_sound_tag_t, int));
void (*ts_click)(tx_sound_tag_t);
void (*ts_mute)(tx_sound_tag_t, int);
};
#define tx_sound_click(t) \
(*((tx_sound_tag_t)(t->tc_soundt))->ts_click) \
#define tx_sound_click(t) \
(*((tx_sound_tag_t)(t->tc_soundt))->ts_click) \
(((tx_sound_tag_t)(t->tc_soundt))->ts_v)
#define tx_sound_mute(t, onoff) \
(*((tx_sound_tag_t)(t->tc_soundt))->ts_mute) \
#define tx_sound_mute(t, onoff) \
(*((tx_sound_tag_t)(t->tc_soundt))->ts_mute) \
(((tx_sound_tag_t)(t->tc_soundt))->ts_v, (onoff))
void tx_sound_init __P((tx_chipset_tag_t));
void tx_sound_init(tx_chipset_tag_t);