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Rename L_ADDR to L_PCB and amend some comments accordingly.

This commit is contained in:
rmind 2009-12-10 05:10:00 +00:00
parent 779d1d735d
commit e9f7af26e6
47 changed files with 218 additions and 229 deletions
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5
sys/arch/acorn26/acorn26/genassym.cf
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@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.11 2009/11/27 03:23:03 rmind Exp $
# $NetBSD: genassym.cf,v 1.12 2009/12/10 05:10:00 rmind Exp $
#
# Copyright (c) 1999 Ben Harris
# All rights reserved.
@ -30,7 +30,6 @@ include "eca.h"
include <sys/param.h>
include <sys/proc.h>
include <sys/user.h>
include <sys/mbuf.h>
include <netinet/in.h>
include <netinet/in_systm.h>
@ -48,7 +47,7 @@ define __PROG26 1
define PCB_SF offsetof(struct pcb, pcb_sf)
define PCB_ONFAULT offsetof(struct pcb, pcb_onfault)
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define TF_SPSR offsetof(struct trapframe, tf_spsr)
define TF_R0 offsetof(struct trapframe, tf_r0)

8
sys/arch/acorn26/acorn26/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.21 2009/11/27 03:23:03 rmind Exp $ */
/* $NetBSD: locore.S,v 1.22 2009/12/10 05:10:00 rmind Exp $ */
/*
* Copyright (c) 1998, 1999, 2000 Ben Harris
* Copyright (C) 1994-1997 Mark Brinicombe
@ -391,7 +391,7 @@ ENTRY(cpu_loswitch)
teq r0, #0x00000000
beq Lswitch_exited
ldr r3, [r0, #(L_ADDR)]
ldr r3, [r0, #(L_PCB)]
add r3, r3, #PCB_SF /* r3 = oldpcb->pcb_sf */
mov r2, sp /* Temporary stack pointer */
@ -400,7 +400,7 @@ ENTRY(cpu_loswitch)
Lswitch_exited:
ldr r2, [r1, #(L_ADDR)]
ldr r2, [r1, #(L_PCB)]
ldr r3, [r2, #(PCB_SF)] /* r3 = newpcb->pcb_sf */
ldmfd r3, {r4-r11, r13-r14} /* Restore from old switchframe */
@ -452,4 +452,4 @@ ENTRY(cpu_Debugger)
ldmfd r13!, {pc}
#endif
RCSID("$NetBSD: locore.S,v 1.21 2009/11/27 03:23:03 rmind Exp $")
RCSID("$NetBSD: locore.S,v 1.22 2009/12/10 05:10:00 rmind Exp $")

5
sys/arch/alpha/alpha/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.17 2009/11/27 03:23:04 rmind Exp $
# $NetBSD: genassym.cf,v 1.18 2009/12/10 05:10:00 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -72,7 +72,6 @@ include <sys/proc.h>
include <sys/sched.h>
include <sys/mbuf.h>
include <sys/msgbuf.h>
include <sys/user.h>
include <sys/syscall.h>
include <machine/cpu.h>
@ -141,7 +140,7 @@ define ALPHA_PTE_KR ALPHA_PTE_KR
define ALPHA_PTE_KW ALPHA_PTE_KW
# Important offsets into the lwp and proc structs & associated constants
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_STAT offsetof(struct lwp, l_stat)
define L_CPU offsetof(struct lwp, l_cpu)
define L_PROC offsetof(struct lwp, l_proc)

76
sys/arch/alpha/alpha/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.117 2009/11/27 03:23:04 rmind Exp $ */
/* $NetBSD: locore.s,v 1.118 2009/12/10 05:10:00 rmind Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -67,7 +67,7 @@
#include <machine/asm.h>
__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.117 2009/11/27 03:23:04 rmind Exp $");
__KERNEL_RCSID(0, "$NetBSD: locore.s,v 1.118 2009/12/10 05:10:00 rmind Exp $");
#include "assym.h"
@ -670,7 +670,7 @@ LEAF(cpu_switchto, 0)
/*
* do an inline savectx(), to save old context
*/
ldq a2, L_ADDR(a0)
ldq a2, L_PCB(a0)
/* NOTE: ksp is stored by the swpctx */
stq s0, PCB_CONTEXT+(0 * 8)(a2) /* store s0 - s6 */
stq s1, PCB_CONTEXT+(1 * 8)(a2)
@ -692,9 +692,9 @@ LEAF(cpu_switchto, 0)
stq s2, CPU_INFO_CURLWP(v0) /* curlwp = l */
/*
* Now running on the new u struct.
* Now running on the new PCB.
*/
ldq s0, L_ADDR(s2)
ldq s0, L_PCB(s2)
/*
* Check for restartable atomic sequences (RAS).
@ -812,13 +812,13 @@ NESTED(copyinstr, 4, 16, ra, IM_RA|IM_S0, 0)
lda v0, copyerr /* set up fault handler. */
.set noat
ldq at_reg, 0(s0)
ldq at_reg, L_ADDR(at_reg)
ldq at_reg, L_PCB(at_reg)
stq v0, PCB_ONFAULT(at_reg)
.set at
CALL(copystr) /* do the copy. */
.set noat
ldq at_reg, 0(s0) /* kill the fault handler. */
ldq at_reg, L_ADDR(at_reg)
ldq at_reg, L_PCB(at_reg)
stq zero, PCB_ONFAULT(at_reg)
.set at
ldq ra, (16-8)(sp) /* restore ra. */
@ -841,13 +841,13 @@ NESTED(copyoutstr, 4, 16, ra, IM_RA|IM_S0, 0)
lda v0, copyerr /* set up fault handler. */
.set noat
ldq at_reg, 0(s0)
ldq at_reg, L_ADDR(at_reg)
ldq at_reg, L_PCB(at_reg)
stq v0, PCB_ONFAULT(at_reg)
.set at
CALL(copystr) /* do the copy. */
.set noat
ldq at_reg, 0(s0) /* kill the fault handler. */
ldq at_reg, L_ADDR(at_reg)
ldq at_reg, L_PCB(at_reg)
stq zero, PCB_ONFAULT(at_reg)
.set at
ldq ra, (16-8)(sp) /* restore ra. */
@ -881,13 +881,13 @@ NESTED(kcopy, 3, 32, ra, IM_RA|IM_S0|IM_S1, 0)
ldq s1, 0(v0) /* s1 = curlwp */
lda v0, kcopyerr /* set up fault handler. */
.set noat
ldq at_reg, L_ADDR(s1)
ldq at_reg, L_PCB(s1)
ldq s0, PCB_ONFAULT(at_reg) /* save old handler. */
stq v0, PCB_ONFAULT(at_reg)
.set at
CALL(memcpy) /* do the copy. */
.set noat
ldq at_reg, L_ADDR(s1) /* restore the old handler. */
ldq at_reg, L_PCB(s1) /* restore the old handler. */
stq s0, PCB_ONFAULT(at_reg)
.set at
ldq ra, (32-8)(sp) /* restore ra. */
@ -901,7 +901,7 @@ NESTED(kcopy, 3, 32, ra, IM_RA|IM_S0|IM_S1, 0)
LEAF(kcopyerr, 0)
LDGP(pv)
.set noat
ldq at_reg, L_ADDR(s1) /* restore the old handler. */
ldq at_reg, L_PCB(s1) /* restore the old handler. */
stq s0, PCB_ONFAULT(at_reg)
.set at
ldq ra, (32-8)(sp) /* restore ra. */
@ -928,12 +928,12 @@ NESTED(copyin, 3, 16, ra, IM_RA|IM_S0, 0)
ldq s0, 0(v0) /* s0 = curlwp */
lda v0, copyerr /* set up fault handler. */
.set noat
ldq at_reg, L_ADDR(s0)
ldq at_reg, L_PCB(s0)
stq v0, PCB_ONFAULT(at_reg)
.set at
CALL(memcpy) /* do the copy. */
.set noat
ldq at_reg, L_ADDR(s0) /* kill the fault handler. */
ldq at_reg, L_PCB(s0) /* kill the fault handler. */
stq zero, PCB_ONFAULT(at_reg)
.set at
ldq ra, (16-8)(sp) /* restore ra. */
@ -960,12 +960,12 @@ NESTED(copyout, 3, 16, ra, IM_RA|IM_S0, 0)
ldq s0, 0(v0) /* s0 = curlwp */
lda v0, copyerr /* set up fault handler. */
.set noat
ldq at_reg, L_ADDR(s0)
ldq at_reg, L_PCB(s0)
stq v0, PCB_ONFAULT(at_reg)
.set at
CALL(memcpy) /* do the copy. */
.set noat
ldq at_reg, L_ADDR(s0) /* kill the fault handler. */
ldq at_reg, L_PCB(s0) /* kill the fault handler. */
stq zero, PCB_ONFAULT(at_reg)
.set at
ldq ra, (16-8)(sp) /* restore ra. */
@ -1004,13 +1004,13 @@ XLEAF(fuiword, 1)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
ldq v0, 0(a0)
zap v0, 0xf0, v0
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
RET
@ -1027,12 +1027,12 @@ XLEAF(fuisword, 1)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
/* XXX FETCH IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
RET
@ -1049,12 +1049,12 @@ XLEAF(fuibyte, 1)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
/* XXX FETCH IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
RET
@ -1070,12 +1070,12 @@ LEAF(suword, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
stq a1, 0(a0) /* do the store. */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
mov zero, v0
@ -1093,12 +1093,12 @@ LEAF(suiword, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
/* XXX STORE IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
call_pal PAL_OSF1_imb /* sync instruction stream */
@ -1116,12 +1116,12 @@ LEAF(susword, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
/* XXX STORE IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
mov zero, v0
@ -1138,12 +1138,12 @@ LEAF(suisword, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
/* XXX STORE IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
call_pal PAL_OSF1_imb /* sync instruction stream */
@ -1162,7 +1162,7 @@ LEAF(subyte, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
zap a1, 0xfe, a1 /* kill arg's high bytes */
@ -1172,7 +1172,7 @@ LEAF(subyte, 2)
or t0, a1, a1 /* put the result together */
stq_u a1, 0(a0) /* and store it. */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
mov zero, v0
@ -1189,7 +1189,7 @@ LEAF(suibyte, 2)
ldq t1, 0(v0)
lda t0, fswberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
.set at
zap a1, 0xfe, a1 /* kill arg's high bytes */
@ -1199,7 +1199,7 @@ LEAF(suibyte, 2)
or t0, a1, a1 /* put the result together */
stq_u a1, 0(a0) /* and store it. */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
call_pal PAL_OSF1_imb /* sync instruction stream */
@ -1232,13 +1232,13 @@ LEAF(fuswintr, 2)
ldq t1, 0(v0)
lda t0, fswintrberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
stq a0, PCB_ACCESSADDR(at_reg)
.set at
/* XXX FETCH IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
RET
@ -1254,13 +1254,13 @@ LEAF(suswintr, 2)
ldq t1, 0(v0)
lda t0, fswintrberr
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq t0, PCB_ONFAULT(at_reg)
stq a0, PCB_ACCESSADDR(at_reg)
.set at
/* XXX STORE IT */
.set noat
ldq at_reg, L_ADDR(t1)
ldq at_reg, L_PCB(t1)
stq zero, PCB_ONFAULT(at_reg)
.set at
mov zero, v0

4
sys/arch/amiga/amiga/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.27 2009/11/23 00:11:42 rmind Exp $
# $NetBSD: genassym.cf,v 1.28 2009/12/10 05:10:01 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -94,7 +94,7 @@ define DRACO DRACO
endif
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

14
sys/arch/arm/arm32/cpuswitch.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpuswitch.S,v 1.59 2008/11/19 06:34:21 matt Exp $ */
/* $NetBSD: cpuswitch.S,v 1.60 2009/12/10 05:10:01 rmind Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@ -90,7 +90,7 @@
#include <machine/asm.h>
#include <machine/cpu.h>
RCSID("$NetBSD: cpuswitch.S,v 1.59 2008/11/19 06:34:21 matt Exp $")
RCSID("$NetBSD: cpuswitch.S,v 1.60 2009/12/10 05:10:01 rmind Exp $")
/* LINTSTUB: include <sys/param.h> */
@ -175,7 +175,7 @@ ENTRY(cpu_switchto)
#endif
/* Hook in a new pcb */
ldr r0, [r6, #(L_ADDR)]
ldr r0, [r6, #(L_PCB)]
str r0, [r7, #(CI_CURPCB)]
mov r7, r0
@ -206,7 +206,7 @@ ENTRY(cpu_switchto)
/* Save old context */
/* Get the user structure for the old lwp. */
ldr r5, [r4, #(L_ADDR)]
ldr r5, [r4, #(L_PCB)]
/* Save all the registers in the old lwp's pcb */
#if defined(__XSCALE__) || defined(_ARM_ARCH_6)
@ -386,7 +386,7 @@ ENTRY_NP(softint_switch)
mov r5, r0 /* save new lwp */
ldr r2, [r4, #(L_ADDR)] /* get old lwp's pcb */
ldr r2, [r4, #(L_PCB)] /* get old lwp's pcb */
/* Save all the registers into the old lwp's pcb */
#if defined(__XSCALE__) || defined(_ARM_ARCH_6)
@ -399,7 +399,7 @@ ENTRY_NP(softint_switch)
#endif
/* this is an invariant so load before disabling intrs */
ldr r2, [r5, #(L_ADDR)] /* get new lwp's pcb */
ldr r2, [r5, #(L_PCB)] /* get new lwp's pcb */
#ifndef __HAVE_UNNESTED_INTRS
IRQdisable
@ -435,7 +435,7 @@ ENTRY_NP(softint_switch)
/*
* If we've returned, we need to change everything back and return.
*/
ldr r2, [r4, #(L_ADDR)] /* get pinned lwp's pcb */
ldr r2, [r4, #(L_PCB)] /* get pinned lwp's pcb */
#ifndef __HAVE_UNNESTED_INTRS
IRQdisable

5
sys/arch/arm/arm32/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.41 2008/09/20 18:29:05 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.42 2009/12/10 05:10:01 rmind Exp $
# Copyright (c) 1982, 1990 The Regents of the University of California.
# All rights reserved.
@ -36,7 +36,6 @@ include <sys/mbuf.h>
include <sys/proc.h>
include <sys/resourcevar.h>
include <sys/device.h>
include <sys/user.h>
include <sys/signal.h>
include <netinet/in.h>
include <netinet/in_systm.h>
@ -84,7 +83,7 @@ define UPAGES UPAGES
define PGSHIFT PGSHIFT
# Important offsets into the lwp and proc structs & associated constants
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_CPU offsetof(struct lwp, l_cpu)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_WCHAN offsetof(struct lwp, l_wchan)

2
sys/arch/arm/include/cpu.h
View File

@ -121,7 +121,7 @@ extern int cpu_do_powersave;
#elif defined (PROCESS_ID_IS_CURLWP)
#define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4
#define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU]
#define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_ADDR]
#define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_PCB]
#elif !defined(MULTIPROCESSOR)
#define GET_CURCPU(rX) ldr rX, =_C_LABEL(cpu_info_store)
#define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]

4
sys/arch/atari/atari/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.29 2009/11/23 00:11:43 rmind Exp $
# $NetBSD: genassym.cf,v 1.30 2009/12/10 05:10:01 rmind Exp $
#-
# Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -74,7 +74,7 @@ define M68060 1
endif
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/cesfic/cesfic/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.12 2009/11/23 00:11:43 rmind Exp $
# $NetBSD: genassym.cf,v 1.13 2009/12/10 05:10:01 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -94,7 +94,7 @@ define PGSHIFT PGSHIFT
define USRSTACK USRSTACK
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

5
sys/arch/hp300/hp300/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.39 2008/09/20 18:29:05 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.40 2009/12/10 05:10:01 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -41,7 +41,6 @@ include <sys/proc.h>
include <sys/mbuf.h>
include <sys/msgbuf.h>
include <sys/syscall.h>
include <sys/user.h>
include <uvm/uvm.h>
@ -149,7 +148,7 @@ define USRSTACK USRSTACK
define MAXADDR MAXADDR
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

5
sys/arch/hp700/hp700/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.19 2009/12/01 09:06:16 skrll Exp $
# $NetBSD: genassym.cf,v 1.20 2009/12/10 05:10:01 rmind Exp $
# $OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $
@ -43,7 +43,6 @@ include <sys/proc.h>
include <sys/mbuf.h>
include <sys/msgbuf.h>
include <sys/syscall.h>
include <sys/user.h>
include <sys/mutex.h>
include <sys/rwlock.h>
include <sys/device.h>
@ -178,7 +177,7 @@ member P_MD p_md
struct lwp
member L_PROC l_proc
member L_CPU l_cpu
member L_ADDR l_addr
member L_PCB l_addr
member L_PRIORITY l_priority
member L_STAT l_stat
member L_WCHAN l_wchan

10
sys/arch/hp700/hp700/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.38 2009/12/01 09:06:16 skrll Exp $ */
/* $NetBSD: locore.S,v 1.39 2009/12/10 05:10:01 rmind Exp $ */
/* $OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $ */
/*
@ -262,7 +262,7 @@ L$start_zero_tf:
add %t3, %r4, %r4
ldil L%lwp0, %t2
stw %t3, R%lwp0+L_ADDR(%t2)
stw %t3, R%lwp0+L_PCB(%t2) /* XXXuvm_lwp_getuarea */
ldo NBPG(%t3), %t1
stw %t1, R%lwp0+L_MD_REGS(%t2)
@ -805,7 +805,7 @@ switch_diag:
* cpu_lwp_fork sets the initial stack to a page above uarea address.
* Check that the stack is above this value for curl.
*/
ldw L_ADDR(%arg1), %arg2
ldw L_PCB(%arg1), %arg2
ldw PCB_KSP(%arg2), %t1 /* t1 for switch_error */
ldo NBPG(%arg2), %arg2
comb,>>,n %arg2, %t1, switch_error
@ -830,7 +830,7 @@ kstack_ok:
* arg1: new LWP (newl)
*/
ldw L_ADDR(%arg0), %t3 /* curl pcb */
ldw L_PCB(%arg0), %t3 /* curl pcb */
stw %sp, PCB_KSP(%t3)
fdc %r0(%t3) /* flush curl pcb - surely fdc PCB_KSP(%t3) */
@ -862,7 +862,7 @@ kstack_ok:
*/
switch_exited:
ldw L_MD(%arg1), %t1
ldw L_ADDR(%arg1), %t3
ldw L_PCB(%arg1), %t3
ldw PCB_KSP(%t3), %sp /* restore stack of newl */
fdc %r0(%t3) /* Flush newl PCB - why? */

10
sys/arch/hppa/hppa/copy.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: copy.S,v 1.14 2009/12/01 09:06:17 skrll Exp $ */
/* $NetBSD: copy.S,v 1.15 2009/12/10 05:10:01 rmind Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -99,7 +99,7 @@ LEAF_ENTRY_NOPROFILE(name) ! \
ldil L%VM_MAXUSER_ADDRESS, %t1 ! \
comb,>>= %arg0, %t1, fusubadaddr ! \
mfctl CR_CURLWP, %t1 ! \
ldw L_ADDR(%t1), %t1 ! \
ldw L_PCB(%t1), %t1 ! \
ldil L%fusufault, %t2 ! \
ldo R%fusufault(%t2), %t2 ! \
ldw PCB_ONFAULT(%t1), %t3 ! \
@ -158,7 +158,7 @@ EXIT(_copy_on_fault)
LEAF_ENTRY(spstrcpy)
/* setup fault handler */
mfctl CR_CURLWP, %r31
ldw L_ADDR(%r31), %r31
ldw L_PCB(%r31), %r31
ldil L%_copy_on_fault, %t2
ldo R%_copy_on_fault(%t2), %t2
stw %t2, PCB_ONFAULT(%r31)
@ -229,7 +229,7 @@ EXIT(name)
/* This loads curlwp's space into the given register. */
#define SPACE_CURLWP(reg) \
mfctl CR_CURLWP, reg ! \
ldw L_ADDR(reg), reg ! \
ldw L_PCB(reg), reg ! \
ldw PCB_SPACE(reg), reg
/* This loads the kernel's space into the given register. */
@ -358,7 +358,7 @@ LEAF_ENTRY(ucas_32)
/* setup fault handler */
mfctl CR_CURLWP, %r31
ldw L_ADDR(%r31), %r31
ldw L_PCB(%r31), %r31
ldil L%_copy_on_fault, %t2
ldo R%_copy_on_fault(%t2), %t2
stw %t2, PCB_ONFAULT(%r31)

4
sys/arch/hppa/hppa/trap.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.S,v 1.31 2009/12/01 09:06:17 skrll Exp $ */
/* $NetBSD: trap.S,v 1.32 2009/12/10 05:10:01 rmind Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -217,7 +217,7 @@ syscall_entry:
/* t2 = curlwp PCB */
mfctl CR_CURLWP, %t3
ldw L_ADDR(%sr1, %t3), %t2 /* XXX can use ,sl */
ldw L_PCB(%sr1, %t3), %t2 /* XXX can use ,sl */
/*
* NB: Even though t4 is a caller-saved register, we

3
sys/arch/ia64/ia64/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.7 2009/11/27 03:23:10 rmind Exp $
# $NetBSD: genassym.cf,v 1.8 2009/12/10 05:10:02 rmind Exp $
#
# Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -73,7 +73,6 @@ include <sys/param.h>
include <sys/proc.h>
include <sys/resourcevar.h>
include <sys/device.h>
include <sys/user.h>
include <sys/mbuf.h>
include <sys/exec_elf.h>
include <sys/ucontext.h>

4
sys/arch/luna68k/luna68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.16 2009/11/23 00:11:44 rmind Exp $
# $NetBSD: genassym.cf,v 1.17 2009/12/10 05:10:02 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -94,7 +94,7 @@ define PGSHIFT PGSHIFT
define USRSTACK USRSTACK
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

8
sys/arch/m68k/m68k/switch_subr.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: switch_subr.s,v 1.22 2009/05/30 17:52:05 martin Exp $ */
/* $NetBSD: switch_subr.s,v 1.23 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 2001 The NetBSD Foundation.
@ -136,7 +136,7 @@ ENTRY(cpu_switchto)
/*
* Save state of previous process in its pcb.
*/
movl %a1@(L_ADDR),%a1
movl %a1@(L_PCB),%a1
moveml %d2-%d7/%a2-%a7,%a1@(PCB_REGS) | save non-scratch registers
movl %usp,%a2 | grab USP (a2 has been saved)
movl %a2,%a1@(PCB_USP) | and save it
@ -180,7 +180,7 @@ Lcpu_switch_nofpsave:
Lcpu_switch_noctxsave:
movl %sp@(8),%a0 | get newlwp
movl %a0,_C_LABEL(curlwp)
movl %a0@(L_ADDR),%a1 | get l_addr
movl %a0@(L_PCB),%a1 | get its pcb
movl %a1,_C_LABEL(curpcb)
#if defined(sun2) || defined(sun3)
@ -239,7 +239,7 @@ Lsame_mmuctx:
movel %a0,%a1@(TF_PC)
1:
movl %sp@+,%d0 | restore newlwp
movl _C_LABEL(curpcb),%a1 | restore l_addr
movl _C_LABEL(curpcb),%a1 | restore pcb
#endif
movl %sp@(4),%d1 | restore oldlwp for a return value

4
sys/arch/mac68k/mac68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.33 2009/11/23 00:11:44 rmind Exp $
# $NetBSD: genassym.cf,v 1.34 2009/12/10 05:10:02 rmind Exp $
#
# Copyright (c) 1990 The Regents of the University of California.
@ -86,7 +86,7 @@ define USRIOSIZE USRIOSIZE
define USRSTACK USRSTACK
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

42
sys/arch/mips/mips/copy.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: copy.S,v 1.6 2009/11/27 03:23:11 rmind Exp $ */
/* $NetBSD: copy.S,v 1.7 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 1992, 1993
@ -97,7 +97,7 @@ END(copystr)
* else return 0 or EFAULT.
*/
LEAF(copyinstr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(copystrerr)
blt a0, zero, _C_LABEL(copystrerr)
sw v0, PCB_ONFAULT(v1)
@ -130,7 +130,7 @@ END(copyinstr)
* else return 0 or EFAULT.
*/
LEAF(copyoutstr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(copystrerr)
blt a1, zero, _C_LABEL(copystrerr)
sw v0, PCB_ONFAULT(v1)
@ -180,13 +180,13 @@ NESTED(kcopy, 48, ra)
move v0, a0 # swap a0, a1 for call to memcpy
move a0, a1
move a1, v0
lw v1, L_ADDR(MIPS_CURLWP) # set up fault handler
lw v1, L_PCB(MIPS_CURLWP) # set up fault handler
la v0, _C_LABEL(kcopyerr)
lw s0, PCB_ONFAULT(v1) # save old handler
jal memcpy
sw v0, PCB_ONFAULT(v1)
lw v1, L_ADDR(MIPS_CURLWP) # restore the old handler
lw v1, L_PCB(MIPS_CURLWP) # restore the old handler
lw ra, 44(sp) # restore ra
sw s0, PCB_ONFAULT(v1)
lw s0, 32(sp) # restore s0
@ -196,7 +196,7 @@ NESTED(kcopy, 48, ra)
END(kcopy)
LEAF(kcopyerr)
lw v1, L_ADDR(MIPS_CURLWP) # restore the old handler
lw v1, L_PCB(MIPS_CURLWP) # restore the old handler
lw ra, 44(sp) # restore ra
sw s0, PCB_ONFAULT(v1)
lw s0, 32(sp) # restore s0
@ -219,12 +219,12 @@ NESTED(copyin, CALLFRAME_SIZ, ra)
move v0, a0 # swap a0, a1 for call to memcpy
move a0, a1
move a1, v0
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(copyerr)
jal memcpy
sw v0, PCB_ONFAULT(v1)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
lw ra, CALLFRAME_RA(sp)
addu sp, sp, CALLFRAME_SIZ
sw zero, PCB_ONFAULT(v1)
@ -246,12 +246,12 @@ NESTED(copyout, CALLFRAME_SIZ, ra)
move v0, a0 # swap a0, a1 for call to memcpy
move a0, a1
move a1, v0
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(copyerr)
jal memcpy
sw v0, PCB_ONFAULT(v1)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
lw ra, CALLFRAME_RA(sp)
addu sp, sp, CALLFRAME_SIZ
sw zero, PCB_ONFAULT(v1)
@ -260,7 +260,7 @@ NESTED(copyout, CALLFRAME_SIZ, ra)
END(copyout)
LEAF(copyerr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
lw ra, CALLFRAME_RA(sp)
addu sp, sp, CALLFRAME_SIZ
sw zero, PCB_ONFAULT(v1)
@ -274,7 +274,7 @@ END(copyerr)
* This function is safe to call during an interrupt context.
*/
LEAF(fuswintr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswintrberr)
lw a2, PCB_ONFAULT(v1)
blt a0, zero, _C_LABEL(fswintrberr)
@ -290,7 +290,7 @@ END(fuswintr)
* This function is safe to call during an interrupt context.
*/
LEAF(suswintr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswintrberr)
lw a2, PCB_ONFAULT(v1)
blt a0, zero, _C_LABEL(fswintrberr)
@ -307,7 +307,7 @@ END(suswintr)
*/
LEAF(fuword)
XLEAF(fuiword)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -322,7 +322,7 @@ END(fuword)
*/
LEAF(fusword)
XLEAF(fuisword)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -337,7 +337,7 @@ END(fusword)
*/
LEAF(fubyte)
XLEAF(fuibyte)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -351,7 +351,7 @@ END(fubyte)
* Stores a word of data to the user-space address.
*/
LEAF(suword)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -366,7 +366,7 @@ END(suword)
* Have to flush instruction cache afterwards.
*/
LEAF(suiword)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -384,7 +384,7 @@ END(suiword)
*/
LEAF(susword)
XLEAF(suisword)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -400,7 +400,7 @@ END(susword)
*/
LEAF(subyte)
XLEAF(suibyte)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(fswberr)
blt a0, zero, _C_LABEL(fswberr)
sw v0, PCB_ONFAULT(v1)
@ -416,7 +416,7 @@ END(subyte)
* len is length of access (1=byte, 2=short, 4=long)
*/
LEAF(badaddr)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(baderr)
bne a1, 1, 2f
sw v0, PCB_ONFAULT(v1)

60
sys/arch/mips/mips/fp.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: fp.S,v 1.35 2009/11/27 03:23:11 rmind Exp $ */
/* $NetBSD: fp.S,v 1.36 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 1992, 1993
@ -115,7 +115,7 @@ NESTED(MachEmulateFP, CALLFRAME_SIZ, ra)
srl v0, a0, 21 - 2 # get FMT field
andi v0, v0, 0x1F << 2 # mask FMT field
#ifdef SOFTFLOAT
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
lw a3, fmt_tbl(v0) # switch on FUNC & FMT
lw a2, PCB_FPREGS+FRAME_FSR(t0)
#else
@ -493,7 +493,7 @@ func_long_fixed_tbl:
#ifdef SOFTFLOAT
mfromc1:
srl t1, a0, 11-2
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x007C
addu t0, t0, t1
@ -519,7 +519,7 @@ mtoc1:
REG_EPILOGUE
srl t1, a0, 11-2
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x007C
addu t0, t0, t1
@ -529,7 +529,7 @@ mtoc1:
cfromc1:
srl t1, a0, 11
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x001F
li t2, 0x1F
move v0, zero
@ -565,7 +565,7 @@ ctoc1:
REG_PROLOGUE
REG_L v0, FRAME_ZERO(v0)
REG_EPILOGUE
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw v0, PCB_FPREGS+FRAME_FSR(t0)
@ -1122,7 +1122,7 @@ div_s:
and v0, a2, MIPS_FPU_ENABLE_DIV0 # trap enabled?
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw t1, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t1, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(t1)
#else
@ -1202,7 +1202,7 @@ div_d:
and v0, a2, MIPS_FPU_ENABLE_DIV0 # trap enabled?
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw t1, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t1, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(t1)
#else
@ -1818,7 +1818,7 @@ inexact_w:
and v0, a2, MIPS_FPU_ENABLE_INEXACT
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -1930,7 +1930,7 @@ set_cond:
or a2, a2, MIPS_FPU_COND_BIT # set condition bit
2:
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -1953,7 +1953,7 @@ unordered:
bne v0, zero, fpe_trap
1:
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2070,7 +2070,7 @@ inexact_nobias_s:
and v0, a2, MIPS_FPU_ENABLE_INEXACT
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2191,7 +2191,7 @@ underflow_s:
and v0, a2, MIPS_FPU_ENABLE_INEXACT
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2332,7 +2332,7 @@ inexact_nobias_d:
and v0, a2, MIPS_FPU_ENABLE_INEXACT
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2475,7 +2475,7 @@ underflow_d:
and v0, a2, MIPS_FPU_ENABLE_INEXACT
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2492,7 +2492,7 @@ invalid_s: # trap invalid operation
and v0, a2, MIPS_FPU_ENABLE_INVALID
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2513,7 +2513,7 @@ invalid_d: # trap invalid operation
and v0, a2, MIPS_FPU_ENABLE_INVALID
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2535,7 +2535,7 @@ invalid_w: # trap invalid operation
and v0, a2, MIPS_FPU_ENABLE_INVALID
bne v0, zero, fpe_trap
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2553,7 +2553,7 @@ invalid_w: # trap invalid operation
*/
fpe_trap:
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2566,7 +2566,7 @@ fpe_trap:
lw a2, CALLFRAME_SIZ + 12(sp)
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#endif
@ -2581,7 +2581,7 @@ fpe_trap:
*/
ill:
#ifdef SOFTFLOAT
lw v0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw v0, L_PCB(MIPS_CURLWP) # get pcb of current process
#nop
sw a2, PCB_FPREGS+FRAME_FSR(v0)
#else
@ -2667,7 +2667,7 @@ END(MachEmulateFP)
STATIC_LEAF(get_fs_int)
#ifdef SOFTFLOAT
srl t2, a0, 11-2
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t2, t2, 0x0078 # Even regs only
addu t0, t0, t2
@ -2780,7 +2780,7 @@ END(get_fs_int)
STATIC_LEAF(get_ft_fs_s)
#ifdef SOFTFLOAT
srl ta0, a0, 16-2
lw ta1, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw ta1, L_PCB(MIPS_CURLWP) # get pcb of current process
andi ta0, ta0, 0x0078 # Even regs only
addu ta1, ta1, ta0
@ -2897,7 +2897,7 @@ get_ft_s_done:
STATIC_XLEAF(get_fs_s)
#ifdef SOFTFLOAT
srl t0, a0, 11-2
lw t1, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t1, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t0, t0, 0x0078 # Even regs only
addu t1, t1, t0
@ -3020,7 +3020,7 @@ END(get_ft_fs_s)
STATIC_LEAF(get_ft_fs_d)
#ifdef SOFTFLOAT
srl ta3, a0, 16-2
lw ta0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw ta0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi ta3, ta3, 0x0078 # Even regs only
addu ta0, ta0, ta3
@ -3155,7 +3155,7 @@ get_ft_d_done:
STATIC_XLEAF(get_fs_d)
#ifdef SOFTFLOAT
srl t3, a0, 11-2
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t3, t3, 0x0078 # Even regs only
addu t0, t0, t3
@ -3293,7 +3293,7 @@ END(get_ft_fs_d)
STATIC_LEAF(get_cmp_s)
#ifdef SOFTFLOAT
srl t1, a0, 11-2
lw ta2, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw ta2, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x0078 # Even regs only
addu t0, ta2, t1
@ -3497,7 +3497,7 @@ END(get_cmp_s)
STATIC_LEAF(get_cmp_d)
#ifdef SOFTFLOAT
srl t1, a0, 11-2
lw ta2, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw ta2, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x0078 # Even regs only
addu t0, ta2, t1
@ -3744,7 +3744,7 @@ STATIC_LEAF(set_fd_s)
STATIC_XLEAF(set_fd_word)
#ifdef SOFTFLOAT
srl t1, a0, 6-2
lw t0, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t0, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x0078 # Even regs only
addu t0, t0, t1
@ -3850,7 +3850,7 @@ STATIC_LEAF(set_fd_d)
or t0, t0, t2 # set fraction
srl t1, a0, 6-2
lw t2, L_ADDR(MIPS_CURLWP) # get pcb of current process
lw t2, L_PCB(MIPS_CURLWP) # get pcb of current process
andi t1, t1, 0x0078 # Even regs only
addu t2, t2, t1

5
sys/arch/mips/mips/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.47 2009/11/27 03:23:11 rmind Exp $
# $NetBSD: genassym.cf,v 1.48 2009/12/10 05:10:02 rmind Exp $
#
# Copyright (c) 1992, 1993
# The Regents of the University of California. All rights reserved.
@ -77,7 +77,6 @@ include <sys/param.h>
include <sys/buf.h>
include <sys/proc.h>
include <sys/mbuf.h>
include <sys/user.h>
include <sys/mutex.h>
include <uvm/uvm.h>
@ -92,7 +91,7 @@ include <mips/locore.h>
define PAGE_SIZE PAGE_SIZE
# Important offsets into the lwp and proc structs & associated constants
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_WCHAN offsetof(struct lwp, l_wchan)
define L_STAT offsetof(struct lwp, l_stat)

15
sys/arch/mips/mips/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.169 2009/11/27 03:23:11 rmind Exp $ */
/* $NetBSD: locore.S,v 1.170 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 1992, 1993
@ -138,7 +138,8 @@ _C_LABEL(kernel_text):
jal _C_LABEL(mach_init) # mach_init(a0, a1, a2, a3)
nop
lw sp, L_ADDR(MIPS_CURLWP) # switch to lwp0 stack
# XXXuvm_lwp_getuarea
lw sp, L_PCB(MIPS_CURLWP) # switch to lwp0 stack
nop
addu sp, sp, USPACE - FRAME_SIZ - CALLFRAME_SIZ
jal _C_LABEL(main) # main(void)
@ -163,7 +164,7 @@ NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
*/
beq a0, zero, 1f
nop
lw a2, L_ADDR(a0) # a2 = l->l_addr
lw a2, L_PCB(a0)
mfc0 t0, MIPS_COP_0_STATUS
REG_PROLOGUE
REG_S s0, PCB_CONTEXT+SF_REG_S0(a2)
@ -200,7 +201,7 @@ NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
/* Check for restartable atomic sequences (RAS) */
lw t1, L_PROC(MIPS_CURLWP)
lw a0, L_ADDR(MIPS_CURLWP)
lw a0, L_PCB(MIPS_CURLWP) # XXXuvm_lwp_getuarea
lw v1, P_RASLIST(t1)
addu t0, a0, USPACE - FRAME_SIZ
beq v1, zero, 1f
@ -208,7 +209,7 @@ NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
move a0, t1
jal _C_LABEL(ras_lookup)
lw a1, FRAME_EPC(t0)
lw a0, L_ADDR(MIPS_CURLWP)
lw a0, L_PCB(MIPS_CURLWP) # XXXuvm_lwp_getuarea
li v1, -1
beq v1, v0, 1f
addu t0, a0, USPACE - FRAME_SIZ
@ -217,13 +218,13 @@ NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
/* New context is now active */
#ifdef IPL_ICU_MASK
# restore ICU state
lw a0, L_ADDR(MIPS_CURLWP)
lw a0, L_PCB(MIPS_CURLWP)
lw t0, PCB_PPL(a0)
sw t0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
#endif /* IPL_ICU_MASK */
lw a0, L_ADDR(MIPS_CURLWP)
lw a0, L_PCB(MIPS_CURLWP)
move v0, s6 # Save return value
REG_PROLOGUE
REG_L t0, PCB_CONTEXT+SF_REG_SR(a0)

14
sys/arch/mips/mips/locore_mips1.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore_mips1.S,v 1.65 2009/05/30 18:26:06 martin Exp $ */
/* $NetBSD: locore_mips1.S,v 1.66 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 1992, 1993
@ -311,7 +311,7 @@ NESTED_NOPROFILE(mips1_UserGenException, CALLFRAME_SIZ, ra)
*/
lw k1, CPUVAR(CURLWP)
nop
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
nop
addu k1, k1, USPACE - FRAME_SIZ
sw AT, FRAME_AST(k1)
@ -404,7 +404,7 @@ NESTED_NOPROFILE(mips1_SystemCall, CALLFRAME_SIZ, ra)
*/
lw k1, CPUVAR(CURLWP)
nop
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
nop
addu k1, k1, USPACE - FRAME_SIZ
#sw AT, FRAME_AST(k1)
@ -586,11 +586,11 @@ END(mips1_KernIntr)
* mips1_UserIntr --
*
* Handle an interrupt from user mode.
* Note: we save minimal state in the u.u_pcb struct and use the standard
* Note: we save minimal state in the PCB struct and use the standard
* kernel stack since there has to be a u page if we came from user mode.
* If there is a pending software interrupt, then save the remaining state
* and call softintr(). This is all because if we call switch() inside
* cpu_intr(), not all the user registers have been saved in u.u_pcb.
* cpu_intr(), not all the user registers have been saved in PCB.
*
* Results:
* None.
@ -609,7 +609,7 @@ NESTED_NOPROFILE(mips1_UserIntr, CALLFRAME_SIZ, ra)
*/
lw k1, CPUVAR(CURLWP)
nop
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
nop
addu k1, k1, USPACE - FRAME_SIZ
sw AT, FRAME_AST(k1)
@ -1114,7 +1114,7 @@ END(mips1_setfunc_trampoline)
LEAF_NOPROFILE(mips1_cpu_switch_resume)
lw a1, L_MD_UPTE_0(a0) # a1 = upte[0]
lw a2, L_MD_UPTE_1(a0) # a2 = upte[1]
lw s0, L_ADDR(a0) # va = l->l_addr
lw s0, L_PCB(a0) # XXXuvm_lwp_getuarea
li s2, MIPS_KSEG2_START
blt s0, s2, resume
nop

4
sys/arch/mips/mips/locore_mips3.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore_mips3.S,v 1.94 2009/11/27 03:23:11 rmind Exp $ */
/* $NetBSD: locore_mips3.S,v 1.95 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@ -427,7 +427,7 @@ END(mips3_sd)
*/
#if defined(_MIPS_BSD_API) && _MIPS_BSD_API != _MIPS_BSD_API_LP32
LEAF(badaddr64)
lw v1, L_ADDR(MIPS_CURLWP)
lw v1, L_PCB(MIPS_CURLWP)
la v0, _C_LABEL(baderr64)
/* Enable KX */

24
sys/arch/mips/mips/mipsX_subr.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: mipsX_subr.S,v 1.33 2009/10/24 13:28:16 he Exp $ */
/* $NetBSD: mipsX_subr.S,v 1.34 2009/12/10 05:10:02 rmind Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@ -679,10 +679,10 @@ NESTED_NOPROFILE(MIPSX(UserGenException), CALLFRAME_SIZ, ra)
.set noat
.mask 0x80000000, -4
/*
* Save all of the registers except for the kernel temporaries in u_pcb.
* Save all of the registers except for the kernel temporaries in pcb.
*/
lw k1, CPUVAR(CURLWP)
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
addu k1, k1, USPACE - FRAME_SIZ
REG_S AT, FRAME_AST(k1)
REG_S v0, FRAME_V0(k1)
@ -836,14 +836,14 @@ END(MIPSX(UserGenException))
/*
* mipsN_SystemCall
*
* Save user context in u_pcb, then call syscall() to process a system call.
* Save user context in PCB, then call syscall() to process a system call.
* The context can be manipulated alternatively via curlwp->p_md.md_regs;
*/
NESTED_NOPROFILE(MIPSX(SystemCall), CALLFRAME_SIZ, ra)
.set noat
.mask 0x80000000, -4
lw k1, CPUVAR(CURLWP)
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
#nop # -slip-
addu k1, k1, USPACE - FRAME_SIZ
#REG_S AT, FRAME_AST(k1)
@ -1173,11 +1173,11 @@ END(MIPSX(KernIntr))
* mipsN_UserIntr --
*
* Handle an interrupt from user mode.
* Note: we save minimal state in the u.u_pcb struct and use the standard
* kernel stack since there has to be a u page if we came from user mode.
* Note: we save minimal state in the PCB and use the standard kernel
* stack since there has to be a u page if we came from user mode.
* If there is a pending software interrupt, then save the remaining state
* and call softintr(). This is all because if we call switch() inside
* cpu_intr(), not all the user registers have been saved in u.u_pcb.
* cpu_intr(), not all the user registers have been saved in PCB.
*
* Results:
* None.
@ -1191,11 +1191,11 @@ NESTED_NOPROFILE(MIPSX(UserIntr), CALLFRAME_SIZ, ra)
.set noat
.mask 0x80000000, -4
/*
* Save the relevant user registers into the u_pcb.
* Save the relevant user registers into the PCB.
* We don't need to save s0 - s8 because the compiler does it for us.
*/
lw k1, CPUVAR(CURLWP)
lw k1, L_ADDR(k1)
lw k1, L_PCB(k1) # XXXuvm_lwp_getuarea
addu k1, k1, USPACE - FRAME_SIZ
REG_S AT, FRAME_AST(k1)
REG_S v0, FRAME_V0(k1)
@ -1281,7 +1281,7 @@ NESTED_NOPROFILE(MIPSX(UserIntr), CALLFRAME_SIZ, ra)
beq v0, zero, 1f # if no, skip ast processing
lw MIPS_CURLWP, MIPS_CURLWP_FRAME(a1)# restore curlwp reg
/*
* We have pending asynchronous traps; save remaining user state in u_pcb.
* We have pending asynchronous traps; save remaining user state in PCB.
*/
REG_S s0, FRAME_S0(a1)
REG_S s1, FRAME_S1(a1)
@ -2049,7 +2049,7 @@ LEAF_NOPROFILE(MIPSX(cpu_switch_resume))
#if !defined(ENABLE_MIPS_16KB_PAGE)
lw a1, L_MD_UPTE_0(a0) # a1 = upte[0]
lw a2, L_MD_UPTE_1(a0) # a2 = upte[1]
lw v0, L_ADDR(a0) # va = l->l_addr
lw v0, L_PCB(a0) # XXXuvm_lwp_getuarea
li s0, MIPS_KSEG2_START
blt v0, s0, resume
nop

4
sys/arch/mvme68k/mvme68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.32 2009/11/23 00:11:44 rmind Exp $
# $NetBSD: genassym.cf,v 1.33 2009/12/10 05:10:02 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -123,7 +123,7 @@ define MVMEPROM_BRDID_SIZE sizeof(struct mvmeprom_brdid)
define MVMEPROM_BRDID_MODEL_OFFSET offsetof(struct mvmeprom_brdid, model)
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/news68k/news68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.24 2009/11/23 00:11:44 rmind Exp $
# $NetBSD: genassym.cf,v 1.25 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -99,7 +99,7 @@ define PGSHIFT PGSHIFT
define USRSTACK USRSTACK
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/next68k/next68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.23 2009/11/23 00:11:45 rmind Exp $
# $NetBSD: genassym.cf,v 1.24 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -120,7 +120,7 @@ define USRSTACK USRSTACK
define NEXT_RAMBASE NEXT_RAMBASE
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/powerpc/ibm4xx/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.15 2008/02/23 19:34:53 matt Exp $
# $NetBSD: genassym.cf,v 1.16 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -148,7 +148,7 @@ define PCB_FAULT offsetof(struct pcb, pcb_onfault)
define PM_CTX offsetof(struct pmap, pm_ctx)
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_STAT offsetof(struct lwp, l_stat)
define L_CPU offsetof(struct lwp, l_cpu)
define L_PRIORITY offsetof(struct lwp, l_priority)

6
sys/arch/powerpc/include/asm.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: asm.h,v 1.27 2009/11/26 00:19:20 matt Exp $ */
/* $NetBSD: asm.h,v 1.28 2009/12/10 05:10:03 rmind Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -175,8 +175,8 @@ y: .quad .y,.TOC.@tocbase,0; \
stint tmp2,CI_INTRDEPTH(tmp1); \
li tmp2,0; \
stptr tmp2,-CALLFRAMELEN(er); /* terminate idle stack chain */\
lis tmp1,_C_LABEL(lwp0)+L_ADDR@ha; \
stptr er,_C_LABEL(lwp0)+L_ADDR@l(tmp1); \
lis tmp1,_C_LABEL(lwp0)+L_PCB@ha; /* XXXuvm_lwp_getuarea */ \
stptr er,_C_LABEL(lwp0)+L_PCB@l(tmp1); \
addi er,er,USPACE; /* stackpointer for proc0 */ \
addi sp,er,-FRAMELEN; /* stackpointer for proc0 */ \
/* er = end of mem reserved for kernel */ \

4
sys/arch/powerpc/oea/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.14 2008/02/23 19:34:53 matt Exp $
# $NetBSD: genassym.cf,v 1.15 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -162,7 +162,7 @@ define PCB_PM offsetof(struct pcb, pcb_pm)
define PCB_SP offsetof(struct pcb, pcb_sp)
define PCB_FAULT offsetof(struct pcb, pcb_onfault)
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_STAT offsetof(struct lwp, l_stat)
define L_CPU offsetof(struct lwp, l_cpu)
define L_PRIORITY offsetof(struct lwp, l_priority)

6
sys/arch/powerpc/powerpc/locore_subr.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore_subr.S,v 1.38 2009/06/07 23:21:26 martin Exp $ */
/* $NetBSD: locore_subr.S,v 1.39 2009/12/10 05:10:03 rmind Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@ -178,7 +178,7 @@ ENTRY(cpu_switchto)
CFRAME_LRSAVE(%r1)
stptru %r1,-SFRAMELEN(%r1) /* still running on old stack */
SWITCHFRAME_SAVE(%r1) /* save USER_SR, CR, R2, non-volatile */
ldptr %r4,L_ADDR(%r30) /* put PCB addr in r4 */
ldptr %r4,L_PCB(%r30) /* put PCB addr in r4 */
streg %r1,PCB_SP(%r4) /* store old lwp's SP */
switchto_restore:
@ -207,7 +207,7 @@ switchto_restore:
#ifdef MULTIPROCESSOR
stptr %r7,L_CPU(%r31) /* update cpu pointer */
#endif
ldptr %r4,L_ADDR(%r31) /* put PCB addr in r4 */
ldptr %r4,L_PCB(%r31) /* put PCB addr in r4 */
stptr %r4,CI_CURPCB(%r7) /* using a new pcb */
ldptr %r3,PCB_PM(%r4)
stptr %r3,CI_CURPM(%r7) /* and maybe a new pmap */

3
sys/arch/sh3/sh3/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.17 2008/06/01 01:43:20 uwe Exp $
# $NetBSD: genassym.cf,v 1.18 2009/12/10 05:10:03 rmind Exp $
#-
# Copyright (c) 2002 The NetBSD Foundation, Inc.
@ -29,7 +29,6 @@
include <sys/param.h>
include <sys/proc.h>
include <sys/mbuf.h>
include <sys/user.h>
include <sys/errno.h>
include <uvm/uvm_extern.h>
include <sh3/vmparam.h>

4
sys/arch/sparc/sparc/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.58 2009/11/21 04:16:51 rmind Exp $
# $NetBSD: genassym.cf,v 1.59 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -106,7 +106,7 @@ define BSD BSD
define USRSTACK USRSTACK
# proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PROC offsetof(struct lwp, l_proc)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/sparc/sparc/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.248 2009/11/26 00:19:22 matt Exp $ */
/* $NetBSD: locore.s,v 1.249 2009/12/10 05:10:03 rmind Exp $ */
/*
* Copyright (c) 1996 Paul Kranenburg
@ -4951,7 +4951,7 @@ Lnosaveoldlwp:
* we need afterwards.
*/
ld [%g3 + L_ADDR], %g5 ! newpcb = l->l_addr;
ld [%g3 + L_PCB], %g5 ! newpcb
ld [%g5 + PCB_PSR], %g2 ! cwpbits = newpcb->pcb_psr;
/* traps off while we switch to the new stack */

8
sys/arch/sparc64/sparc64/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.61 2009/11/25 02:34:34 mrg Exp $
# $NetBSD: genassym.cf,v 1.62 2009/12/10 05:10:03 rmind Exp $
#
# Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -78,7 +78,6 @@ include <sys/proc.h>
include <sys/mbuf.h>
include <sys/msgbuf.h>
include <sys/syscall.h>
include <sys/user.h>
include <sys/device.h>
include <sys/disklabel.h>
include <sys/disk.h>
@ -127,9 +126,6 @@ define P_VMSPACE offsetof(struct proc, p_vmspace)
define P_PID offsetof(struct proc, p_pid)
define P_RASLIST offsetof(struct proc, p_raslist)
# user structure fields
define USIZ sizeof(struct user)
# VM structure fields
define VM_PMAP offsetof(struct vmspace, vm_map.pmap)
@ -200,7 +196,7 @@ define SYS_exit SYS_exit
define EFAULT EFAULT
define ENAMETOOLONG ENAMETOOLONG
# PCB fields
# PCB fields and size
define PCB_NSAVED offsetof(struct pcb, pcb_nsaved)
define PCB_ONFAULT offsetof(struct pcb, pcb_onfault)
define PCB_PSTATE offsetof(struct pcb, pcb_pstate)

4
sys/arch/sparc64/sparc64/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.300 2009/12/05 22:25:51 mrg Exp $ */
/* $NetBSD: locore.s,v 1.301 2009/12/10 05:10:03 rmind Exp $ */
/*
* Copyright (c) 1996-2002 Eduardo Horvath
@ -1313,7 +1313,7 @@ pmap_screwup:
* keeping a `red zone' pointer; if %sp becomes less than this, we panic.
* This is expensive and is only enabled when debugging.
*/
#define REDSIZE (USIZ) /* Mark used portion of user structure out of bounds */
#define REDSIZE (PCB_SIZE) /* Mark used portion of pcb structure out of bounds */
#define REDSTACK 2048 /* size of `panic: stack overflow' region */
.data
_ALIGN

4
sys/arch/sun2/sun2/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.10 2008/09/20 18:29:05 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.11 2009/12/10 05:10:04 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -157,7 +157,7 @@ define ENAMETOOLONG ENAMETOOLONG
#
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/sun2/sun2/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.21 2009/11/26 00:19:22 matt Exp $ */
/* $NetBSD: locore.s,v 1.22 2009/12/10 05:10:04 rmind Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@ -155,7 +155,7 @@ L_high_code:
| Setup process zero user/kernel stacks.
lea _C_LABEL(lwp0),%a0 | lwp0
movl %a0@(L_ADDR),%a1 | get lwp0 pcb addr
movl %a0@(L_PCB),%a1 | XXXuvm_lwp_getuarea
lea %a1@(USPACE-4),%sp | set SSP to last word
movl #USRSTACK-4,%a2
movl %a2,%usp | init user SP

4
sys/arch/sun3/sun3/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.11 2008/09/20 18:29:06 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.12 2009/12/10 05:10:04 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -154,7 +154,7 @@ define ENAMETOOLONG ENAMETOOLONG
#
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/sun3/sun3/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.90 2009/11/26 00:19:22 matt Exp $ */
/* $NetBSD: locore.s,v 1.91 2009/12/10 05:10:04 rmind Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@ -153,7 +153,7 @@ L_high_code:
| Setup process zero user/kernel stacks.
lea _C_LABEL(lwp0),%a0 | lwp0
movl %a0@(L_ADDR),%a1 | get lwp0 pcb addr
movl %a0@(L_PCB),%a1 | XXXuvm_lwp_getuarea
lea %a1@(USPACE-4),%sp | set SSP to last word
movl #USRSTACK-4,%a2
movl %a2,%usp | init user SP

4
sys/arch/sun3/sun3x/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.10 2008/09/20 18:29:06 tsutsui Exp $
# $NetBSD: genassym.cf,v 1.11 2009/12/10 05:10:04 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -145,7 +145,7 @@ define ENAMETOOLONG ENAMETOOLONG
#
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)

4
sys/arch/sun3/sun3x/locore.s
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.58 2009/11/26 00:19:23 matt Exp $ */
/* $NetBSD: locore.s,v 1.59 2009/12/10 05:10:04 rmind Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@ -167,7 +167,7 @@ L_high_code:
| Setup process zero user/kernel stacks.
lea _C_LABEL(lwp0),%a0 | get lwp0
movl %a0@(L_ADDR),%a1 | get lwp0 pcb addr
movl %a0@(L_PCB),%a1 | XXXuvm_lwp_getuarea
lea %a1@(USPACE-4),%sp | set SSP to last word
movl #USRSTACK-4,%a2
movl %a2,%usp | init user SP

4
sys/arch/vax/vax/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.43 2008/06/04 11:30:26 ad Exp $
# $NetBSD: genassym.cf,v 1.44 2009/12/10 05:10:04 rmind Exp $
#
# Copyright (c) 1997 Ludd, University of Lule}, Sweden.
# All rights reserved.
@ -52,7 +52,7 @@ include <machine/trap.h>
include <machine/uvax.h>
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_CPU offsetof(struct lwp, l_cpu)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)

16
sys/arch/vax/vax/subr.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: subr.S,v 1.27 2009/11/26 00:19:23 matt Exp $ */
/* $NetBSD: subr.S,v 1.28 2009/12/10 05:10:04 rmind Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -123,19 +123,19 @@ to: movw $0xfff,_C_LABEL(panic) # Save all regs in panic
# save end of symtab
3: addl3 _C_LABEL(esym),$0x3ff,%r0 # Round symbol table end
bicl3 $0x3ff,%r0,%r1 #
movl %r1,_C_LABEL(lwp0)+L_ADDR # save lwp0 uarea pointer
movl %r1,_C_LABEL(lwp0)+L_PCB # lwp0 pcb, XXXuvm_lwp_getuarea
bicl2 $0x80000000,%r1 # get phys lwp0 uarea addr
mtpr %r0,$PR_PCBB # Save in IPR PCBB
addl3 $USPACE,%r1,%r0 # Get kernel stack top
mtpr %r0,$PR_KSP # put in IPR KSP
movl %r0,_C_LABEL(Sysmap) # SPT start addr after KSP
movl _C_LABEL(lwp0)+L_ADDR,%r0 # get PCB virtual address
movl _C_LABEL(lwp0)+L_PCB,%r0 # get PCB virtual address
mfpr $PR_PCBB,PCB_PADDR(%r0) # save PCB physical address
movab IFTRAP(%r0),ESP(%r0) # Save trap address in ESP
mtpr 4(%r0),$PR_ESP # Put it in ESP also
# Set some registers in known state
movl %r1,%r0 # get lwp0.l_addr
movl %r1,%r0 # get lwp0 pcb
clrl P0LR(%r0)
clrl P1LR(%r0)
mtpr $0,$PR_P0LR
@ -319,7 +319,7 @@ softint_cleanup:
movl L_CPU(%r0),%r1 /* get cpu_info */
incl CI_MTX_COUNT(%r1) /* increment mutex count */
clrl L_CTXSWTCH(%r0) /* clear l_ctxswtch of old lwp */
movl L_ADDR(%r0),%r1 /* get PCB of softint LWP */
movl L_PCB(%r0),%r1 /* get PCB of softint LWP */
softint_exit:
popr $0x3 /* restore r0 and r1 */
rei /* return from interrupt */
@ -333,7 +333,7 @@ softint_process:
calls $2,_C_LABEL(softint_dispatch) /* dispatch it */
/* We can use any register because ldpctx will overwrite them */
movl L_ADDR(%r6),%r3 /* get pcb */
movl L_PCB(%r6),%r3 /* get pcb */
movab softint_exit,PCB_PC(%r3)/* do a quick exit */
#ifdef MULTIPROCESSOR
movl L_CPU(%r6),%r8
@ -356,7 +356,7 @@ softint_common:
mfpr $PR_SSP,%r6 /* Get curlwp */
movl L_CPU(%r6),%r8 /* get cpu_info */
movl CI_SOFTLWPS(%r8)[%r0],%r2 /* get softlwp to switch to */
movl L_ADDR(%r2),%r3 /* Get pointer to its pcb. */
movl L_PCB(%r2),%r3 /* Get pointer to its pcb. */
movl %r6,PCB_R6(%r3) /* move old lwp into new pcb */
movl %r1,PCB_R7(%r3) /* move IPL into new pcb */
#ifdef MULTIPROCESSOR
@ -420,7 +420,7 @@ JSBENTRY(Swtchto)
/* We can know use any register because ldpctx will overwrite them */
/* New LWP already in %r1 */
movl L_ADDR(%r1),%r3 # Get pointer to new pcb.
movl L_PCB(%r1),%r3 # Get pointer to new pcb.
movl %r0,PCB_R0(%r3) # move r0 into new pcb (return value)
#ifdef MULTIPROCESSOR
movl L_CPU(%r0), %r8 /* get cpu_info of old lwp */

4
sys/arch/x68k/x68k/genassym.cf
View File

@ -1,4 +1,4 @@
# $NetBSD: genassym.cf,v 1.30 2009/11/23 00:11:45 rmind Exp $
# $NetBSD: genassym.cf,v 1.31 2009/12/10 05:10:04 rmind Exp $
#
# Copyright (c) 1982, 1990, 1993
@ -103,7 +103,7 @@ define PGSHIFT PGSHIFT
define USRSTACK USRSTACK
# lwp & proc fields and values
define L_ADDR offsetof(struct lwp, l_addr)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_STAT offsetof(struct lwp, l_stat)
define L_WCHAN offsetof(struct lwp, l_wchan)