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It makes more sense to map the expansion bus registers in ixpsip

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instead of the pci bridge driver.
This commit is contained in:
scw 2003-11-02 21:24:39 +00:00
parent 21f388f6e0
commit e9cd075343
4 changed files with 24 additions and 21 deletions
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11
sys/arch/arm/xscale/ixp425.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $ */
/* $NetBSD: ixp425.c,v 1.8 2003/11/02 21:24:39 scw Exp $ */
/*
* Copyright (c) 2003
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.7 2003/10/23 09:32:17 scw Exp $");
__KERNEL_RCSID(0, "$NetBSD: ixp425.c,v 1.8 2003/11/02 21:24:39 scw Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -74,13 +74,6 @@ ixp425_attach(struct ixp425_softc *sc)
0, &sc->sc_gpio_ioh))
panic("%s: unable to map GPIO registers", sc->sc_dev.dv_xname);
/*
* Mapping for Expansion Bus Registers
*/
if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
0, &sc->sc_exp_ioh))
panic("%s: unable to map EXP registers", sc->sc_dev.dv_xname);
/*
* Invoke the board-specific PCI initialization code
*/

14
sys/arch/arm/xscale/ixp425_sip.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixp425_sip.c,v 1.4 2003/10/08 14:55:04 scw Exp $ */
/* $NetBSD: ixp425_sip.c,v 1.5 2003/11/02 21:24:39 scw Exp $ */
/*
* Copyright (c) 2003
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ixp425_sip.c,v 1.4 2003/10/08 14:55:04 scw Exp $");
__KERNEL_RCSID(0, "$NetBSD: ixp425_sip.c,v 1.5 2003/11/02 21:24:39 scw Exp $");
/*
* Slow peripheral bus of IXP425 Processor
@ -61,6 +61,7 @@ CFATTACH_DECL(ixpsip, sizeof(struct ixpsip_softc),
ixpsip_match, ixpsip_attach, NULL, NULL);
extern struct bus_space ixpsip_bs_tag;
struct ixpsip_softc *ixpsip_softc;
int
ixpsip_match(struct device *parent, struct cfdata *cf, void *aux)
@ -74,8 +75,17 @@ ixpsip_attach(struct device *parent, struct device *self, void *aux)
struct ixpsip_softc *sc = (void *) self;
sc->sc_iot = &ixpsip_bs_tag;
ixpsip_softc = sc;
printf("\n");
if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
0, &sc->sc_ioh)) {
printf("%s: Can't map expansion bus control registers!\n",
sc->sc_dev.dv_xname);
return;
}
/*
* Bootstrap the timer (needed for delay(9))
*/

10
sys/arch/arm/xscale/ixp425_sipvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixp425_sipvar.h,v 1.2 2003/06/01 01:49:56 ichiro Exp $ */
/* $NetBSD: ixp425_sipvar.h,v 1.3 2003/11/02 21:24:39 scw Exp $ */
/*
* Copyright (c) 2003
* Ichiro FUKUHARA <ichiro@ichiro.org>.
@ -47,6 +47,8 @@ struct ixpsip_softc {
bus_space_handle_t sc_ioh;
};
extern struct ixpsip_softc *ixpsip_softc;
struct ixpsip_attach_args {
bus_space_tag_t sa_iot; /* Bus tag */
bus_addr_t sa_addr; /* i/o address */
@ -55,4 +57,10 @@ struct ixpsip_attach_args {
int sa_intr;
};
#define EXP_CSR_WRITE_4(sc, reg, data) \
bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, data)
#define EXP_CSR_READ_4(sc, reg) \
bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg)
#endif /* _IXPSIPVAR_H_ */

10
sys/arch/arm/xscale/ixp425var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: ixp425var.h,v 1.6 2003/10/23 09:32:17 scw Exp $ */
/* $NetBSD: ixp425var.h,v 1.7 2003/11/02 21:24:39 scw Exp $ */
/*
* Copyright (c) 2003
@ -58,13 +58,6 @@
#define GPIO_CONF_READ_4(sc, reg) \
bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
#define EXP_CSR_WRITE_4(sc, reg, data) \
bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh, \
reg, data)
#define EXP_CSR_READ_4(sc, reg) \
bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg)
#define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
#define PCI_CONF_UNLOCK(s) restore_interrupts((s))
@ -78,7 +71,6 @@ struct ixp425_softc {
/* Handles for the various subregions. */
bus_space_handle_t sc_pci_ioh; /* PCI mem handler */
bus_space_handle_t sc_gpio_ioh; /* GPIOs handler */
bus_space_handle_t sc_exp_ioh; /* Expansion Bus handler */
/* Bus space, DMA, and PCI tags for the PCI bus */
struct bus_space sc_pci_iot;