ep93xx processor system tick timer and microtime()/delay() impl
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joff
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/* $NetBSD: epclk.c,v 1.1 2004/12/22 19:09:29 joff Exp $ */
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/*
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* Copyright (c) 2004 Jesse Off
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the ep93xx clock tick.
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*
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* We use the 64Hz RTC interrupt as its the only thing that allows for timekeeping
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* of a second (crystal error only). There are two general purpose timers
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* on the ep93xx, but they run at a frequency that makes a perfect integer
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* number of ticks per second impossible. Note that there was an errata with
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* the ep93xx processor and many early boards (including the Cirrus eval board) have
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* a broken crystal oscillator input that may make this 64Hz unreliable. However,
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* not all boards are susceptible, the Technologic Systems TS-7200 is a notable
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* exception that is immune to this errata. --joff
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: epclk.c,v 1.1 2004/12/22 19:09:29 joff Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <arm/cpufunc.h>
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#include <arm/ep93xx/epsocvar.h>
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#include <arm/ep93xx/epclkreg.h>
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#include <arm/ep93xx/ep93xxvar.h>
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static int epclk_match(struct device *, struct cfdata *, void *);
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static void epclk_attach(struct device *, struct device *, void *);
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void rtcinit(void);
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/* callback functions for intr_functions */
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static int epclk_intr(void* arg);
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struct epclk_softc {
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struct device sc_dev;
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bus_addr_t sc_baseaddr;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_space_handle_t sc_teoi_ioh;
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int sc_intr;
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};
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static struct epclk_softc *epclk_sc = NULL;
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static u_int32_t tmark;
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/* This is a quick ARM way to multiply by 983040/1000000 */
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#define US_TO_TIMER4VAL(x) { \
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u_int32_t hi, lo, scalar = 4222124650UL; \
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asm volatile ( \
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"umull %0, %1, %2, %3;" \
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: "=&r"(lo), "=&r"(hi) \
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: "r"((x)), "r"(scalar) \
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); \
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(x) = hi; \
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}
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/* This is a quick ARM way to multiply by 1000000/983040 */
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#define TIMER4VAL_TO_US(x) { \
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u_int32_t hi, lo, scalar = 2184533333UL; \
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asm volatile ( \
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"umull %0, %1, %2, %3;" \
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"mov %1, %1, lsl #1;" \
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"mov %0, %0, lsr #31;" \
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"orr %1, %1, %0;" \
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: "=&r"(lo), "=&r"(hi) \
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: "r"((x)), "r"(scalar) \
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); \
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(x) = hi; \
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}
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CFATTACH_DECL(epclk, sizeof(struct epclk_softc),
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epclk_match, epclk_attach, NULL, NULL);
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#define TIMER4VAL() (*(volatile u_int32_t *)(EP93XX_APB_VBASE + \
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EP93XX_APB_TIMERS + EP93XX_TIMERS_Timer4ValueLow))
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static int
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epclk_match(struct device *parent, struct cfdata *match, void *aux)
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{
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return 2;
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}
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static void
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epclk_attach(struct device *parent, struct device *self, void *aux)
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{
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struct epclk_softc *sc;
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struct epsoc_attach_args *sa;
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printf("\n");
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sc = (struct epclk_softc*) self;
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sa = aux;
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sc->sc_iot = sa->sa_iot;
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sc->sc_baseaddr = sa->sa_addr;
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sc->sc_intr = sa->sa_intr;
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if (epclk_sc == NULL)
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epclk_sc = sc;
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if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size,
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0, &sc->sc_ioh))
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panic("%s: Cannot map registers", self->dv_xname);
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if (bus_space_map(sa->sa_iot, EP93XX_APB_HWBASE + EP93XX_APB_SYSCON +
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EP93XX_SYSCON_TEOI, 4, 0, &sc->sc_teoi_ioh))
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panic("%s: Cannot map registers", self->dv_xname);
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/* clear and start the debug timer (Timer4) */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_TIMERS_Timer4Enable, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_TIMERS_Timer4Enable, 0x100);
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}
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/*
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* epclk_intr:
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*
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* Handle the hardclock interrupt.
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*/
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static int
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epclk_intr(void *arg)
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{
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struct epclk_softc* sc;
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tmark = TIMER4VAL();
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sc = epclk_sc;
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bus_space_write_4(sc->sc_iot, sc->sc_teoi_ioh, 0, 1);
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hardclock((struct clockframe*) arg);
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return (1);
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}
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/*
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* setstatclockrate:
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*
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* Set the rate of the statistics clock.
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*
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* We assume that hz is either stathz or profhz, and that neither
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* will change after being set by cpu_initclocks(). We could
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* recalculate the intervals here, but that would be a pain.
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*/
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void
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setstatclockrate(int hz)
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{
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/* use hardclock */
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}
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/*
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* cpu_initclocks:
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*
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* Initialize the clock and get them going.
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*/
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void
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cpu_initclocks(void)
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{
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struct epclk_softc* sc;
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sc = epclk_sc;
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stathz = profhz = 0;
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if (hz != 64) panic("HZ must be 64!");
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/* clear 64Hz interrupt status */
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bus_space_write_4(sc->sc_iot, sc->sc_teoi_ioh, 0, 1);
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ep93xx_intr_establish(sc->sc_intr, IPL_CLOCK, epclk_intr, NULL);
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}
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/*
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* microtime:
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*
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* Fill in the specified timeval struct with the current time
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* accurate to the microsecond.
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*/
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void
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microtime(register struct timeval *tvp)
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{
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u_int oldirqstate;
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u_int tmarknow, delta;
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static struct timeval lasttv;
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#ifdef DEBUG
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if (epclk_sc == NULL) {
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printf("microtime: called before initialize epclk\n");
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tvp->tv_sec = 0;
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tvp->tv_usec = 0;
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return;
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}
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#endif
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oldirqstate = disable_interrupts(I32_bit);
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tmarknow = TIMER4VAL();
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/* Fill in the timeval struct. */
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*tvp = time;
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if (__predict_false(tmarknow < tmark)) { /* overflow */
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delta = tmarknow + (UINT_MAX - tmark);
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} else {
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delta = tmarknow - tmark;
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}
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TIMER4VAL_TO_US(delta);
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tvp->tv_usec += delta;
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/* Make sure microseconds doesn't overflow. */
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while (__predict_false(tvp->tv_usec >= 1000000)) {
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tvp->tv_usec -= 1000000;
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tvp->tv_sec++;
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}
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/* Make sure the time has advanced. */
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if (__predict_false(tvp->tv_sec == lasttv.tv_sec &&
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tvp->tv_usec <= lasttv.tv_usec)) {
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tvp->tv_usec = lasttv.tv_usec + 1;
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if (tvp->tv_usec >= 1000000) {
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tvp->tv_usec -= 1000000;
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tvp->tv_sec++;
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}
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}
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lasttv = *tvp;
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restore_interrupts(oldirqstate);
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}
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/*
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* delay:
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*
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* Delay for at least N microseconds.
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*/
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void
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delay(unsigned int len)
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{
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u_int32_t start, end, ticks;
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#ifdef DEBUG
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if (epclk_sc == NULL) {
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printf("delay: called before start epclk\n");
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return;
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}
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#endif
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ticks = start = TIMER4VAL();
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US_TO_TIMER4VAL(len);
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end = start + len;
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while (start <= ticks && ticks > end) {
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/* wait for Timer4ValueLow wraparound */
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ticks = TIMER4VAL();
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}
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while (ticks <= end) {
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ticks = TIMER4VAL();
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}
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}
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void
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resettodr(void)
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{
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}
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void
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inittodr(time_t base)
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{
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time.tv_sec = base;
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time.tv_usec = 0;
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}
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